181 results about "Single crystal substrate" patented technology

The utility model discloses a rotary device and epitaxial reaction furnace for epitaxial reaction, the rotary device includes the rotary base for supporting wafer tray, rotating mechanism and drive mechanism, rotating mechanism is connected with rotary base through a transmission mechanism and drives rotary base rotation, and drive mechanism is used for driving rotating mechanism rotation. Based on the rotary device, can avoid the graphite particle adhesion monocrystal substrate in epitaxial reaction process, reduces the defect quantity of monocrystal substrate, improves epitaxial layer growth quality.

The invention discloses a silicon-based high-mobility wide-band-gap tin-based oxide film, a preparation method thereof and a transistor, and belongs to the technical field of low-power-consumption electronic devices. The preparation method of the tin-based oxide thin film provided by the invention comprises the following steps: firstly, sequentially preparing a sacrificial layer and a single crystal tin-based oxide thin film on a temporary growth substrate to obtain an oxide heterostructure; then preparing a supporting layer, and adhering the single crystal tin-based oxide thin film by using the supporting layer to realize stripping of the single crystal tin-based oxide thin film from the single crystal substrate; and finally, transferring the single crystal tin-based oxide thin film to the silicon substrate to realize compatible integration of the single crystal tin-based oxide thin film and the silicon substrate. The single crystal tin-based oxide thin film is transferred to the silicon substrate through a substrate-free transfer technology, dependence on a high-cost specific substrate is eliminated, a mature silicon-based process is compatible, and a foundation is laid for large-scale integrated circuit application; and finally, the thin film transistor with low power consumption, high performance and low cost is prepared, the cost advantage is remarkable, and the application prospect is wide.

A Schottky barrier diode, including a first n-type semiconductor layer including a β-Ga2O3-based single crystal epitaxial layer and having a first carrier concentration that determines reverse breakdown voltage and forward voltage, a second n-type semiconductor layer including a β-Ga2O3-based single crystal substrate and having a second carrier concentration that is higher than the first carrier concentration and determines forward voltage, a Schottky electrode provided on a surface of the first n-type semiconductor layer on the opposite side to the second n-type semiconductor layer, and an ohmic electrode provided on a surface of the second n-type semiconductor layer on the opposite side to the first n-type semiconductor layer. The β-Ga2O3-based single crystal substrate includes a surface that has a plane orientation rotated by an angle of not more than 37.5° from a (010) plane.

The application provides a yttrium barium copper oxide photonic crystal and a preparation method thereof. 7‑x The photonic crystal structure is composed of periodic yttrium barium copper oxide (YBa2Cu3O 7‑x ) superconducting material circular crystal columns, the lattice constant is 2630nm, and the radius of the circular crystal column is 500nm. The photonic crystal can change the position and width of the band gap by changing the light incidence angle, so that the middle infrared band gap is realized. The photonic crystal is prepared by adopting a magnetron sputtering method to prepare a yttrium barium copper oxide film on a strontium titanate single crystal substrate, and then adopting a focused ion beam method to process the yttrium barium copper oxide film into a periodic nanostructure composed of yttrium barium copper oxide circular crystal columns, so that the yttrium barium copper oxide photonic crystal is obtained. The preparation method of the yttrium barium copper oxide photonic crystal is simple and easy to control.

The invention belongs to the field of film sensors, and discloses a preparation method of a lanthanum aluminate / strontium titanate nanostructure for hydrogen detection, which comprises the following steps: preparing a strontium titanate single crystal substrate, depositing a single crystal epitaxial lanthanum aluminate film on the strontium titanate single crystal substrate by pulse laser to obtain a single crystal epitaxial lanthanum aluminate / strontium titanate material; then, a stripe-shaped periodic surface nanostructure is formed on the surface of the single crystal epitaxial lanthanum aluminate thin film through femtosecond laser induction, a lanthanum aluminate / strontium titanate nanostructure is obtained, and then precious metal nanoparticles are deposited on the surface of the lanthanum aluminate / strontium titanate nanostructure. According to the preparation method, the highly-ordered single-crystal lanthanum aluminate / strontium titanate heterogeneous film is obtained by accurately controlling pulse laser deposition process parameters, and a nano stripe periodic structure is prepared on the surface of lanthanum aluminate by accurately controlling pulse femtosecond laser processing parameters, so that the specific surface area is effectively increased, gas adsorption sites are increased, and the specific surface area of the lanthanum aluminate / strontium titanate heterogeneous film is increased. And the gas charge transmission capability of the lanthanum aluminate / strontium titanate interface two-dimensional electron gas is improved.

The invention aims to provide a method for dividing a single crystal substrate that suppresses the occurrence of chipping. According to one embodiment of the invention, the method relates to a single-crystal substrate with a cleavage plane (7) inclined with respect to a scoring surface and a fracture surface (2), and includes steps to form a scoring line (L2) on the scoring surface (3), to apply an adhesive separating strip (9) to the scoring surface (3), to turn over a single-crystal substrate (1) and place it on a crushing table 11 such that the scoring surface (3) faces the crushing table (11), to bring a crushing plate (13) into contact with the fracture surface (2) along a fracture line (B) which is separated from a reference line (R) by a transverse line (C) at which a vertical plane extending from the scoring line (L2) in a direction orthogonal to the scoring surface (3) and the fracture surface (2) intersects the fracture surface (2).where the cleavage plane (7), extending from the scribe line (L2), crosses the fracture surface (2), is positioned at a distance, and an external force is applied from the fracture plate (13) to the fracture surface (2) to split the single crystal substrate (1) along the cleavage planes (7).

A semiconductor substrate (1) includes: an SiC single crystal substrate (10SB), a first graphene layer (11GR1) disposed on an Si plane of the SiC single crystal substrate 10SB; an SiC epitaxial growth layer (12RE) formed above the SiC single crystal substrate via the first graphene layer; and a second graphene layer (11GR2) disposed on an Si plane of the SiC epitaxial growth layer. There is also included an SiC polycrystalline substrate (16P) provisionally bonded onto the SiC epitaxial growth layer via the second graphene layer. The SiC single crystal substrate is able to be reused by being separated from the SiC epitaxial growth layer. This semiconductor substrate further includes an SiC polycrystalline growth layer (18PC) CVD grown on the C plane of the SiC epitaxial growth layer; and the SiC epitaxial growth layer is transferred to the SiC polycrystalline growth layer.

The application provides a PN diode based on a non-doped single crystal substrate and a preparation method thereof. ‑ a GaN layer, a p + GaN layer and an anode metal layer; wherein the non-doped single crystal structure comprises a non-doped drift layer on a front surface and an ion implantation layer on a back surface, the ion implantation layer is in contact with the cathode metal layer as a substrate of the PN diode, and the non-doped drift layer is in contact with the p ‑ GaN layer to form a PN junction. The PN diode based on the non-doped single crystal substrate and the preparation method thereof have the advantages of simplifying the preparation process, reducing the manufacturing cost, reducing the interface pollution, and improving the electrical performance and long-term reliability of the device.

The invention discloses a low-defect-density gallium nitride semiconductor chip epitaxial structure, and relates to the technical field of chip epitaxial equipment.The epitaxial structure comprises an epitaxial furnace used for carrying out an epitaxial process on a single crystal substrate, the epitaxial furnace comprises an outer shell, a driving mechanism is fixedly installed at the bottom of an inner cavity of the outer shell, and an output shaft of the driving mechanism is in transmission connection with a bearing part; a hydraulic cylinder set is fixedly installed on the top of an inner cavity of the outer shell, and a hollow shaft rod is in transmission connection with the interior of the hydraulic cylinder set. A low-defect-density gallium nitride semiconductor chip epitaxial structure is characterized in that for the arrangement of a bearing part and a structure on the bearing part, when a single crystal substrate is subjected to an epitaxial process and special gas is conveyed into an inner cavity of an outer shell through a hollow shaft rod, the single crystal substrate placed on a supporting block can be adsorbed, and the single crystal substrate is subjected to the epitaxial process; and the phenomenon of deviation caused by the impact of centrifugal force and special gas is avoided, so that the epitaxy precision and quality of the equipment on the single crystal substrate are effectively improved.

The invention provides a preparation method of a tin-doped scaly nano gallium oxide thin film solar blind ultraviolet photoelectric detector. The preparation method comprises the following steps: carrying out cleaning pretreatment on a single crystal GaN substrate; depositing an Au thin film on the pretreated single crystal GaN substrate to serve as a catalyst layer; the preparation method comprises the following steps: mixing Ga2O3, diamond and SnO2 powder according to a certain mass ratio to prepare a precursor; putting the single crystal GaN substrate deposited with the Au thin film and a precursor into a CVD furnace, and growing according to preset gas flow, pressure intensity, reaction temperature and reaction time to obtain a tin-doped scaly nano gallium oxide thin film; and respectively preparing electrodes on the surface of the tin-doped scaly nano gallium oxide thin film and the surface of the GaN substrate by adopting a radio frequency magnetron sputtering method. The conductivity of the thin film is improved through tin doping, the specific surface area and light absorption are increased through the scaly nanostructure, high-performance deep ultraviolet photoelectric detection is achieved, and the technical problem that in the prior art, the dark current of a device is high is solved.

The invention discloses a large-size and low-resistivity 4H-SiC monocrystal crystal bar and a 4H-SiC monocrystal substrate, and belongs to the technical field of 4H-SiC monocrystal preparation. The thickness of the 4H-SiC single-crystal crystal bar is 15 mm or above, the resistivity of the 4H-SiC single-crystal crystal bar at any position is larger than 6 m omega.cm and smaller than 12 m omega.cm, and the resistivity variation coefficient of any cross section of the 4H-SiC single-crystal crystal bar is smaller than or equal to 5%. The 4H-SiC monocrystal crystal bar is high in thickness, lower in resistivity and more uniform in distribution, the on resistance of a power device can be remarkably reduced, and the use stability of the device is improved.

The application discloses an epitaxial structure and method of a high-linearity AlGaN / GaN heterojunction, which sequentially comprises a single-crystal substrate, an AlN nucleation layer, a GaN buffer layer, a GaN channel layer, an AlGaN channel layer, a first AlGaN barrier layer and a second AlGaN barrier layer. The technical scheme uses epitaxial technologies such as metal organic chemical vapor deposition (MOCVD), adopts a high-temperature and low-rate process for the GaN channel layer, improves the crystallization quality and surface morphology of the GaN channel layer, and is favorable for reducing the defect density of the subsequent AlGaN channel layer and barrier layer. The AlGaN channel layer structure is introduced, the small conduction band step of the AlGaN channel layer / GaN channel layer is used, three-dimensional distribution of an electron gas in the GaN / AlGaN composite channel layer is realized, the first AlGaN barrier layer structure of polarization modulation doping is introduced, the electron gas penetrates into the barrier layer, and the three-dimensional depth of the electron gas is further widened, the second AlGaN barrier layer with strong polarization is used, the electron gas surface density and the transconductance peak value are improved, and the application is suitable for the development of a high-linearity GaN radio frequency device.

The objective is to provide a method and apparatus for manufacturing silicon carbide single crystal substrates with high flatness. [Solution] The method for manufacturing a silicon carbide single crystal substrate is characterized by measuring the first thickness of the central part of the silicon carbide single crystal substrate and the second thickness of the outer peripheral part located on the outer peripheral side of the central part, measuring the first pressure applied to the central part of the silicon carbide single crystal substrate and the second pressure applied to the outer peripheral part of the silicon carbide single crystal substrate, and determining the relationship between the first index obtained from the first pressure and the second pressure and the second index obtained from the first thickness and the second thickness.

Additive manufacturing of single crystal materials results in polycrystalline layers or grains, which may be reduced or eliminated by treatment with Al or optionally Pt. The thinning of the polycrystalline layer may be performed without mechanical or chemical removal of the polycrystalline material. A workpiece formed by the process may include a single crystal substrate; an interdiffusion region on the substrate; and a thermal barrier coating over the interdiffusion region, and the interdiffusion region diffuses the polycrystalline layer such that post-processing required to remove the polycrystalline layer is not required.

The invention relates to the technical field of lithium ion battery materials, in particular to an electrolyte-carbon fiber coated positive electrode material and a preparation method and application thereof. The preparation method of the material comprises the following steps: mixing and sintering an ultrahigh nickel single crystal precursor, a lithium source and a doping agent to obtain a primary sintered product; obtaining a composite spinning solution containing a high-molecular polymer and a solid electrolyte; the surface of a primary sintered product is coated with composite nanofibers through a fluidized bed assisted electrostatic spinning technology, and then a final product is obtained through pre-oxidation and carbonization treatment. Three-dimensional uniform coating is realized on the surface of a single crystal substrate by adopting a fluidized bed assisted electrostatic spinning process, and a stable electrolyte-carbon fiber composite coating layer is constructed. The coating layer is used as a functional interface layer, and a compatible interface is introduced between the positive electrode and the solid electrolyte, so that the side reaction of the interface is effectively inhibited, the bonding firmness of the interface is enhanced, and the cycling stability of the battery is remarkably improved while high specific capacity is maintained.

The present invention provides a monocrystalline SiC substrate with an asymmetric shape for enhancing substrate stiffness against thermal induced deformations, the substrate comprising: a main region, and an asymmetric region located at a peripheral region of the substrate and adjacent to the main region, wherein the asymmetric region is inclined inwards, relative to the main region, to provide an asymmetric shape to the substrate. The present invention also provides a method of producing one or more substrates with an asymmetric shape, comprising: performing a multi-wire sawing process in which one or more substrates are cut with an wire-sawing web from an ingot placed on a stage, and cutting the one or more substrates with the asymmetric shape by controlling a relative movement between the wire-sawing web and the stage, the relative movement causing the wire-sawing web to describe a non-linear sawing path across the ingot to cut the asymmetric shape.

The application relates to the technical field of semiconductor materials, in particular to a preparation method of a semi-insulating silicon carbide substrate, which comprises the following steps: mixing high-purity silicon powder and carbon powder according to a preset ratio to synthesize silicon carbide particles; performing crystal growth to obtain a silicon carbide crystal ingot; cutting, grinding and polishing the silicon carbide crystal ingot to obtain a silicon carbide single crystal substrate; and performing high-temperature annealing and impurity removal treatment on the silicon carbide single crystal substrate to obtain a high-purity semi-insulating silicon carbide substrate. In the cutting process, the following steps are included: cutting after pre-annealing treatment is performed on the silicon carbide crystal ingot; collecting contact pressure data, temperature data, cutting speed data, cooling liquid flow and integrity data in the cutting process, and then determining the optimal contact pressure and the optimal cutting temperature, so as to determine the adjustment mode of the cutting parameters. The application effectively improves the cutting quality and shortens the cutting time.

This invention relates to the field of semiconductor materials, specifically to an aluminum nitride thin film with different crystal orientations, its preparation method, and its applications. The invention provides a method for preparing aluminum nitride thin films with different crystal orientations, comprising the following steps: S1, selecting a single-crystal substrate with a corresponding crystal orientation according to the crystal orientation requirements of the target aluminum nitride thin film; S2, annealing the single-crystal substrate and introducing a nitrogen ion source to activate the surface of the single-crystal substrate by ion bombardment; S3, performing pre-bombardment and thin film deposition using pulsed laser deposition, and obtaining an aluminum nitride thin film with the target crystal orientation by controlling the growth temperature and growth gas pressure. This invention provides a universal, efficient, and controllable solution by organically combining three steps: "substrate crystal orientation selection - surface activation modification - synergistic control of growth parameters," successfully achieving high-quality and controllable preparation of aluminum nitride thin films with multiple crystal orientations on a single-pulse laser deposition platform.

SiC epitaxy wafer (10), comprising: a 4H-SiC single-crystal substrate (1) having a surface with a deviating angle with respect to a c-plane as the main surface (1a) and a chamfered portion (1A) on a circumferential portion; and a SiC epitaxial film (2) formed on the 4H-SiC single crystal substrate (1) with a film thickness of 20 µm or more, where the density of an interfacial dislocation extending from an outer circumferential edge (2a) of the SiC epitaxial layer (2) is 10 lines / cm or less.

Substrate structure, including: a single crystal substrate heterogeneous to a nitride semiconductor (100) and a crystallized inorganic thin film (130') having several leg parts (130a) configured to contact the substrate (100) such that an integrated cavity (C) is defined between the leg parts (130a) and the substrate (100), and an upper surface (130b) formed continuously so that it extends from the several leg parts (130a) and parallel to the substrate (100), wherein the crystallized inorganic thin film (130') has the same crystal structure as the substrate (100) and wherein the several leg parts (130a) each have a hollow tube shape.

The present application provides a technique for suppressing current degradation of a GaN device having a pn junction like a pn diode. A manufacturing method for a gallium nitride laminated substrate for manufacturing a device having a pn junction includes the following steps: preparing an n-type gallium nitride single crystal substrate having a diameter of 50 mm or more and a low-index crystal plane closest to a main surface being a (0001) plane; growing an n-type gallium nitride single crystal layer on the substrate; performing dehydrogenation treatment on the laminated substrate on which the n-type gallium nitride single crystal layer is grown; growing a p-type gallium nitride single crystal layer on the laminated substrate on which the dehydrogenation treatment is performed; and further performing dehydrogenation treatment on the laminated substrate on which the p-type gallium nitride single crystal layer is grown.

A modified object includes a single crystal substrate, an internal modification trace and a surface processing trace. The single crystal substrate has a first surface and a second surface facing away from the first surface. The first surface and the second surface of the single crystal substrate are arranged in a thickness direction of the single crystal substrate. The internal modification trace is formed between the first surface and the second surface of the single crystal substrate. The surface processing trace are formed on the second surface of the single crystal substrate. The internal modification trace and the surface processing trace overlap in the thickness direction of the single crystal substrate. In addition, a method for manufacturing the modified object is also provided.

The application relates to a preparation method of an Sb4 self-assembled structure and belongs to the technical field of nanometer materials. A gold single crystal substrate is prepared; antimony powder is evaporated and deposited on the gold single crystal substrate to obtain a substrate and Sb4 molecular self-assembled chains deposited on the substrate, and the deposition process controls the temperature of the gold single crystal substrate to be 25-30 DEG C; the substrate and the Sb4 molecular self-assembled chains deposited on the substrate are subjected to first temperature rising to a growth temperature for heat preservation treatment to obtain small-area and dispersed Sb4 molecular self-assembled islands; then, the small-area self-assembled islands prepared are used as nucleation sites for growth, that is, the antimony powder is evaporated and deposited on the surface of the gold single crystal substrate with the small-area self-assembled islands to obtain a gold single crystal substrate with coexistence of small-area Sb4 molecular self-assembled islands and Sb4 molecular self-assembled chains, and the deposition process controls the temperature of the substrate to be 25-30 DEG C; the obtained gold single crystal substrate with coexistence of small-area Sb4 molecular self-assembled islands and Sb4 molecular self-assembled chains is subjected to second temperature rising to a growth temperature for heat preservation treatment to obtain large-area Sb4 molecular self-assembled islands. The Sb4 molecular self-assembled structure prepared by the application has regular shape structure, and the width of the self-assembled structure is mostly above 100 nm.

This invention relates to a method for preparing low-surface-defect epitaxial wafers on high-COP silicon single-crystal substrates, comprising the following steps: S1, substrate preparation: selecting a high-COP silicon single-crystal substrate; S2, single-sided polishing: polishing the high-COP silicon single-crystal substrate using conventional single-sided polishing equipment to remove the mechanical damage layer on the substrate surface and obtain a preliminarily planarized surface; S3, improved polishing and cleaning process; S4, epitaxial growth of qualified substrate: performing epitaxial growth on the qualified substrate to prepare a low-surface-defect epitaxial wafer. This invention improves the polishing and cleaning processes, thoroughly removing residues within COP voids and suppressing the generation of epitaxial stacking faults, thereby achieving the preparation of high-quality, low-surface-defect epitaxial wafers.

This technology suppresses the generation of thermal strain during crystal growth, enabling the realization of high-quality SiC single crystals with a low crystal defect density. [Solution] A SiC single crystal substrate is used, comprising a first main surface and a second main surface located opposite the first main surface, wherein the first main surface is a surface inclined with an off-angle of 0° to 8° with respect to the {0001} plane. Here, incident light having two mutually orthogonal polarization components and a wavelength of 520 nm is incident on the first main surface, and the phase difference between the first emitted light and the second emitted light emitted from the second main surface is measured. In the distribution of phase differences obtained, the average value of the phase difference is 10 nm or less, and the maximum value of the phase difference is 70 nm or less.

A gallium nitride single crystal substrate in which a low-index crystal plane closest to a principal surface of the substrate is a (0001) plane, wherein resistivity of the substrate at 200° C. is 1×10−2 Ω·cm or lower, and thermal conductivity of the substrate along a thickness direction at 200° C. is 80 W / mk or higher.

A gallium arsenide single-crystal substrate has a main surface with a circular shape and features R1, R2, R3, R4, R5, and R6, each of which is a first integrated intensity ratio. The first integrated intensity ratio is obtained by determining a spectrum of the detection intensity of a 3d electron of arsenic with respect to a binding energy of a photoelectron emitted outwards from the gallium arsenide single-crystal substrate based on X-ray photoelectron spectroscopy, in which X-rays are applied centrally to the main surface under specific conditions. The first integrated intensity ratio is a ratio of an integrated intensity of an arsenic element present as diarsene pentoxide to the sum of the integrated intensity of the arsenic element present as diarsene pentoxide and the integrated intensity of an arsenic element present as arsenic trioxide.an integrated intensity of an arsenic element present as gallium arsenide and an integrated intensity of an arsenic element present as metallarsene, and wherein R2 and / or R3 and / or R4 is the largest among R1, R2, R3, R4, R5 and R6.

The application discloses a method for preparing a low-density defect epitaxial layer on a high L-Pits silicon single crystal substrate, and belongs to the technical field of silicon epitaxial wafer growth. The method comprises the following steps: (1) placing the high L-Pits silicon single crystal substrate in an epitaxial furnace, heating to 1200-1250 DEG C, and introducing HCl gas to remove the L-Pits aggregates near the surface of the silicon single crystal substrate; (2) cooling to 800-1100 DEG C, continuously introducing HCl gas to clean the surface of the silicon single crystal substrate, and obtaining a pretreated substrate; and (3) adjusting the temperature to the epitaxial growth process temperature to grow an epitaxial layer, and obtaining a low-density defect epitaxial wafer. According to the method, the surface of the high L-Pits silicon single crystal substrate is pretreated at high and low temperatures, and the L-Pits defects on the surface of the silicon substrate are reduced or eliminated. The silicon epitaxial wafer obtained by the method has low-density surface microdefects, and the surface particles are extremely few, so that the quality of the silicon epitaxial wafer is improved.

This invention provides a method for manufacturing a diamond wire saw for cutting silicon carbide single-crystal substrates. First, impurities are removed from the diamond micro-powder abrasive. During the abrasive application process, the abrasive density *a* on the steel wire is monitored in real-time via images and videos, and the feeding rate of the diamond micro-powder abrasive in the feeding container is controlled accordingly, achieving a first-step closed-loop control. In the subsequent nickel plating thickening process, the concentricity of the thickened layer on the steel wire and the continuous stability of its thickness are controlled. Before winding, the wire saw diameter *d* is measured using a laser method. Based on the mapping relationship between the wire diameter *d*, abrasive density *a*, and plating thickness *c*, a second closed-loop control is implemented for the entire wire saw production process. The two closed-loop controls operate nested together, ensuring precise control throughout the entire process. The diamond wire saw obtained by this method exhibits high continuous stability in various performance indicators, ensuring good process stability during the cutting of single-crystal silicon carbide substrates, thereby reducing cutting risks.

The invention belongs to the technical field of semiconductor manufacturing, and particularly relates to a three-step wet chemical cleaning method for a gallium nitride single crystal substrate. The method comprises the following steps: pre-cleaning the surface of a GaN single crystal substrate, cleaning with concentrated sulfuric acid and hydrogen peroxide, and flushing with deionized water; soaking in a BOE solution and then washing with deionized water; soaking in a mixed solution of hydrochloric acid and hydrogen peroxide, washing with deionized water, and finally drying. According to the method, step-by-step targeted removal and synergistic interaction of different pollutants are realized through a specific three-step sequential cleaning method. The pre-cleaning step aims at removing large-size particles attached to the substrate in the machining and transporting process, a consistent starting point is provided for follow-up fine chemical cleaning, and macroscopic pollutants are prevented from interfering with chemical reactions or causing secondary pollution.