646 results about "Single crystal substrate" patented technology

To provide a high resistivity polycrystalline substrate, and a method for manufacturing the high resistivity polycrystalline substrate.SOLUTION: A method contains steps of: forming a polycrystalline substrate having a high resistibility (e.g., 1×10^5 or 1E+5 ohmic centimeter or more); forming a single crystal substrate by fusing a semiconductor grade silicon with a high grade, and thereafter, using a seed crystal, and starting a formation of the single crystal; bonding a second surface of the polycrystalline substrate when the polycrystalline substrate and the single crystal substrate are formed to a third surface of the single crystal substrate by using a surface active bonding (SAB) technique; and removing one part of the single crystal substrate.SELECTED DRAWING: Figure 4A

Silicon carbide single crystal substrate (100), wherein the silicon carbide single crystal substrate (100) has a diameter of not less than 100 mm, the silicon carbide single crystal substrate (100) has an oxygen concentration of no more than 1 × 10 17 cm -3 exhibits the silicon carbide single crystal substrate (100) has a dislocation density of no more than 2 × 10 4 cm -2 exhibits, and the silicon carbide single crystal substrate (100) has a stacking fault area ratio of no more than 2.0%.

The invention relates to the field of crystal preparation, in particular to a production device and a preparation method of monocrystalline silicon, the monocrystalline silicon and an insulated gate bipolar transistor. The apparatus for producing monocrystalline silicon comprises: a crucible for placing and melting a raw material; the heating module is arranged around the crucible and comprises a fixed heater at the upper part and a movable heater at the lower part, and the movable heater moves along the lifting direction of the crystal bar so as to accurately control the crystal growth temperature gradient and the oxygen diffusion transmission mode at different stages of crystal growth; and the magnetic field module is used for applying an asymmetric hook-shaped magnetic field in the crystal growth process so as to inhibit convection of raw materials in the crucible, reduce the oxygen concentration and improve the radial uniformity of oxygen. According to the technical scheme, on the basis of 300mm N-type monocrystalline silicon, under low oxygen (lt; 5ppma), ROGlt; and on the basis of 10%, the target of low potential type defect density can also be achieved, so that the high-quality requirements, including ultralow oxygen content, low defect density and the like, of an IGBT (Insulated Gate Bipolar Translator) on a silicon single crystal substrate are met. The efficient preparation of the ultralow-oxygen N-type silicon single crystal is realized by combining a heater with a novel structure with a CUSP magnetic field technology and matching with crystal pulling process parameter optimization. According to the silicon single crystal prepared by the method, the performance and the reliability of an IGBT (Insulated Gate Bipolar Translator) can be remarkably improved, the production cost is reduced, and the requirements of modern power electronic devices on high-performance silicon-based materials are met.

The invention discloses a deposition system for chemical vapor deposition silicon carbide ring production, and relates to the field of high-end equipment manufacturing. The deposition system for producing the chemical vapor deposition silicon carbide ring comprises a furnace body, wherein a reaction chamber and a heating module are arranged in the furnace body; the plurality of spray head groups are connected with gas pipelines; the graphite support is installed at the inner bottom of the bottom cover, the graphite support is used for supporting the annular single crystal substrate, and the graphite support is detachable; the stabilizing mechanism comprises a lifting seat, the supporting arm is fixed to the lifting seat, and the clamping assembly is installed on the supporting arm; the device comprises a furnace body, a nozzle group, a conveying mechanism and a lifting mechanism, and is characterized in that gas containing silicon and carbon is sprayed into the furnace body through the nozzle group, so that the gas containing silicon and carbon can be quickly and uniformly dispersed into a reaction chamber in the furnace body, and the deposition rate and uniformity of silicon carbide on an annular single crystal substrate are ensured; the detachable graphite support is formed by combining a plurality of splicing columns, horizontal supporting rods and clamping needles, and the influence of the graphite support on airflow is reduced by adjusting the number of the splicing columns.

The invention relates to a CMP (chemical mechanical polishing) composition for obtaining a high-quality SiC single crystal substrate surface. The CMP composition is prepared from the following raw materials in percentage by weight: 20-50 wt% of a polishing abrasive, 3-5 wt% of an oxidizing agent, 0.1-0.5 wt% of a surfactant, 0.2-0.5 wt% of a hydrogen bond regulator, 0.2-1 wt% of a polishing accelerant, 0.01-0.05 wt% of a defoaming agent and the balance of water, the CMP composition is neutral. According to the CMP composition, silicon oxide is adopted as a grinding material, a hydrogen bond regulator, a polishing accelerant and an oxidizing agent are introduced, the CMP polishing rate of a silicon carbide wafer is increased, the surface roughness Ra of the cleaned silicon surface can reach 0.07 nm or below, the cleaned surface is free of large particles (larger than 0.2 micron), meanwhile, the silicon oxide raw material does not need to be treated, and the CMP composition has excellent long-term storage stability; and the system does not have particle aggregation and sedimentation phenomena along with the prolonging of the storage time, and excellent polishing surface quality can be obtained in the subsequent polishing process.

A SiC epitaxial wafer (1) of the present invention is a SiC epitaxial wafer having a SiC epitaxial film (E) on a main surface of a SiC single crystal substrate (W), in which an orientation flat or a notch is provided thereon, a height (h) of an epi crown (Ec), which is present on an outer circumferential portion of the SiC epitaxial film, with respect to a level surface of the SiC epitaxial film (E) at a position on a wafer diameter intersecting a longitudinal center of the orientation flat or a groove bottom of the notch is 30% or less of a thickness (Et) of the SiC epitaxial film (E) at a wafer center (C), and the SiC epitaxial film (E) does not have triangular defects in a region less than 1 mm from an edge in a direction toward the wafer center.

The invention relates to the technical field of processing methods of optoelectronic materials, and mainly relates to a grinding and polishing process of a magnetic thin film epitaxial substrate material-calcium magnesium zirconium doped gadolinium gallium garnet (Ca, Mg, Zr: GGG, hereinafter abbreviated as SGGG) single crystal substrate. Comprising the key steps of disc loading, thinning and leveling, mechanical grinding and polishing, chemical mechanical polishing (CMP) and the like, as shown in figure 1. The invention also relates to a special binder, a grinding liquid and a polishing liquid in the SGGG substrate processing process, and the ultra-smooth (the roughness is less than or equal to 0.5 nm) and ultra-flat (the flatness is less than or equal to 5 [mu] m) SGGG single crystal substrate can be obtained through the technological process, the corresponding grinding liquid and the corresponding chemical polishing liquid, so that the epitaxial growth requirement of a YIG or RIG magnetic film is met.

The invention discloses a method for preparing a gallium nitride nanowire array by a flux method. The method comprises the following steps: providing a liquid phase system of an alloy catalytic material containing Ga and a transition metal element with a catalytic property, and a Ga-Na liquid phase alloy; under the condition of isolating water and oxygen, enabling the liquid phase system to be in contact with the gallium nitride single crystal substrate, under the atmosphere of high-pressure nitrogen, enabling the metal sodium to dissociate nitrogen at high temperature, and realizing c-direction growth of the gallium nitride nanowire array on the gallium nitride single crystal substrate under the catalytic action of the alloy catalytic material. The preparation of the raw materials only needs to be completed at one time, the substrate does not need to be specially treated, only gallium, sodium, nickel and nitrogen are used as the raw materials, and the cost is low; compared with a traditional sodium fluxing agent method for growing gallium nitride single crystals, the method has the advantages that a sodium-gallium-transition metal melt liquid-phase system with the catalytic property of the sodium fluxing agent is utilized, and the high-density gallium nitride nanowire is innovatively prepared.

The invention relates to the technical field of semiconductor photoelectric detectors, in particular to a gallium oxide-based laminated structure ultraviolet detector and a preparation method thereof. The detector comprises a gallium nitride single crystal substrate, a GaON thin film layer and a beta-Ga2O3 thin film layer which are tightly stacked from bottom to top, and an electron transport layer and a hole blocking layer which are symmetrically arranged on the surface of one side, away from the gallium nitride single crystal substrate, of the beta-Ga2O3 thin film layer, and metal electrodes are arranged on the electron transport layer and the hole blocking layer. The material of the electron transport layer is ZnO, and the material of the hole blocking layer is TiO2. The device has the advantages that the device structure is stable, the response time can reach microsecond magnitude, and the descending time is short; the adverse effect caused by the inherent continuous photoconductive effect of the gallium oxide material is effectively overcome, the internal defects are obviously reduced, and the ultraviolet photoconductive gain is increased while the inherent continuous photoconductive effect of the gallium oxide is inhibited.

The invention discloses a titanium nitride single-crystal thin film and a preparation method and application thereof, and the preparation method comprises the following steps: S1, cleaning a single-crystal substrate, and feeding the single-crystal substrate into a sputtering chamber of magnetron sputtering equipment; s2, vacuumizing the sputtering chamber, and heating the single crystal substrate; s3, nitrogen and argon are introduced into the sputtering chamber, a high-purity titanium target is used as a sputtering target material, a radio-frequency power supply or a direct-current power supply is turned on, and pre-sputtering is conducted; s4, the power of a power source is set, the flow ratio of nitrogen to argon is adjusted to be 0.1-0.5, and a titanium nitride film grows on the single crystal substrate through magnetron sputtering; and S5, turning off the power supply, keeping the air pressure in the original cavity unchanged, and cooling to obtain the titanium nitride single crystal film. According to the method, the titanium nitride single crystal film is prepared by adopting a magnetron sputtering technology, and the stress between crystal lattices of the TiN film can be changed by adjusting the growth atmosphere and introducing nitrogen and argon mixed gas according to a certain proportion, so that the superconducting transition temperature is increased.

The invention discloses a p-type gallium oxide material and a preparation method and application thereof, and relates to the technical field of semiconductor materials. The method for preparing the p-type gallium oxide material comprises the following steps: placing a beta-Ga2O3 single crystal substrate in a cavity of a deposition system, introducing an organic gallium source and N2O, and carrying out homoepitaxial growth on the beta-Ga2O3 single crystal substrate through an organic metal chemical vapor deposition method to obtain the p-type nitrogen-doped beta-Ga2O3 material. In the process of homoepitaxial growth on a beta-Ga2O3 single crystal substrate, N atoms in N2O are doped into beta-Ga2O3 in a displacement doping form, so that the p-type nitrogen-doped beta-Ga2O3 material is formed. The preparation of the p-type beta-Ga2O3 material is realized in a homoepitaxy mode, and the p-type beta-Ga2O3 material can be used for preparing a transverse device and a longitudinal device, so that popularization and application of gallium oxide devices are facilitated.

The invention relates to the technical field of defect characterization of silicon carbide single crystal substrate materials, in particular to a silicon carbide corrosion device and a working method thereof. The silicon carbide corrosion device comprises a crucible furnace, an inner lifting shaft and a basket; the crucible furnace comprises a furnace body and a furnace cover, a heating element is arranged outside the furnace body, the furnace body is provided with an oxygen inlet used for introducing oxygen and a gas discharge port used for discharging gas, the furnace cover covers the furnace body, the top of the furnace cover protrudes upwards to form an outer lifting shaft used for lifting the furnace cover, and the outer lifting shaft is provided with a through hole; the inner lifting shaft is inserted into the through hole of the outer lifting shaft, and the basket is installed at the bottom end of the inner lifting shaft and used for containing wafers. According to the method, different dislocation morphologies of the heavily nitrogen-doped substrate can be accurately distinguished, the corrosion efficiency is improved, the safety of operators is guaranteed, meanwhile, the operation process is simplified, and large-scale popularization and application are facilitated.

The group III-V compound semiconductor single crystal substrate has a circular main surface, wherein the main surface has an orientation flat or a notch and has a first region that is inside a first virtual line passing through a point 5 mm away inward from an outer periphery thereof, and a first reference line that is a virtual line segment extending from a center of the main surface to the first virtual line in a direction going from the center of the main surface toward the orientation flat or the notch; on the main surface, the number of particles having a particle size of 0.079 μm or more at each of measurement points at nine points in total is measured, and a standard deviation and an average value of the number of the particles calculated based on the measurement satisfy a relationship of standard deviation / average value≤0.9.

The invention belongs to the technical field of machining and cutting, and particularly relates to a temperature-sensing diamond cutter with local boron-doped cutting edges and a manufacturing method of the temperature-sensing diamond cutter. The temperature-sensing diamond cutter with the local boron-doped cutting edge comprises a diamond single crystal substrate, the diamond single crystal substrate has a certain thickness, a local boron-doped diamond single crystal layer is deposited at a corner position of the top surface of the diamond single crystal substrate, the corner position is used for arranging the cutter cutting edge, and the local boron-doped diamond single crystal layer is deposited at the corner position of the top surface of the diamond single crystal substrate. The local boron-doped diamond single crystal layer can be used as a temperature sensor to sense the temperature of an ultra-precise cutting edge micro-area by using the negative temperature coefficient thermosensitive characteristic of the local boron-doped diamond single crystal layer as a P-type semiconductor. Insulation of the outer surface of the boron-doped diamond layer is achieved, and the problem that when the tool cuts various workpieces with high conductivity, due to the fact that the thermal sensitive characteristic of the boron-doped diamond layer is affected by electric conduction between the tool and chips, the cutting temperature cannot be measured is solved.

The invention discloses a method for manufacturing a high-power nitride semiconductor microwave transistor on a gallium nitride substrate. The method mainly solves the problems that an existing device has a parasitic electric leakage channel at a homoepitaxial interface and is low in breakdown voltage. According to the scheme, the method comprises the following steps: firstly, selecting a p-type gallium nitride single-crystal substrate, carrying out surface pretreatment on the p-type gallium nitride single-crystal substrate to obtain a p-type gallium nitride single-crystal substrate containing a p-type AlN electric leakage isolation layer, and then sequentially growing a GaN channel layer, an AlN insertion layer and a barrier layer on the pretreated substrate; and finally, preparing an insulated gate dielectric layer and a gate electrode on the barrier layer, and manufacturing a source electrode and a drain electrode on two sides to complete device manufacturing. Through in-situ compensation of donor impurities based on the p-type AlN electric leakage isolation layer and ion implantation, complete isolation of a parasitic electric leakage channel at a homoepitaxial interface and a 2DEG conductive channel at a homoepitaxial GaN heterojunction interface is realized, transverse electric leakage of the device is effectively inhibited, and the voltage endurance capability and the output power of the device are improved.

The invention discloses a silicon substrate gallium nitride semiconductor wafer and a preparation method and application thereof, and relates to the technical field of semiconductor materials. The silicon substrate gallium nitride semiconductor wafer is composed of a silicon single crystal substrate, a silicon carbide single crystal thin film barrier layer, an ultrathin porous titanium nitride weak bonding decoupling layer, an aluminum nitride single crystal thin film nucleating layer template layer and a gallium nitride single crystal thin film quality improving layer which are stacked in sequence. According to the invention, the pore size and the pore density in the ultrathin porous titanium nitride weak bonding decoupling layer are regulated and controlled, so that the weak bonding decoupling effect of the aluminum nitride single crystal film nucleating layer template layer on the ultrathin porous titanium nitride weak bonding decoupling layer is regulated and controlled; therefore, large mismatch stress regulation and control and crack-free thickness improvement of the silicon substrate gallium nitride material are realized, and material crystallization quality and preparation efficiency are improved. The silicon substrate gallium nitride semiconductor wafer can be applied to development and production of gallium nitride-based power electronic devices, microwave radio frequency devices and optoelectronic devices.

There is provided a gallium nitride single crystal substrate, which is a gallium nitride single crystal substrate having a diameter of 50 mm or more, with a low-index crystal plane closest to a main surface being (0001), and in which a Mn concentration in the substrate is 5×1017 cm−3 or more; and secondary ion mass spectrometry at a plurality of arbitrary points on the main surface reveals that a variation in the Mn concentration is within ±20% from an average value.

The invention relates to the technical field of semiconductor materials, in particular to a preparation method of a semi-insulating silicon carbide substrate, which comprises the following steps: mixing high-purity silicon powder and carbon powder according to a preset proportion to synthesize silicon carbide particles; performing crystal growth to obtain a silicon carbide crystal ingot; cutting, grinding and polishing the silicon carbide crystal ingot to obtain a silicon carbide single crystal substrate; and carrying out high-temperature annealing and impurity removal treatment on the silicon carbide single crystal substrate to obtain the high-purity semi-insulating silicon carbide substrate. Wherein in the cutting process, the silicon carbide crystal ingot is cut after being subjected to pre-annealing treatment; contact pressure data, temperature data, cutting speed data, cooling liquid flow and integrity data in the cutting process are collected, then the optimal contact pressure and the optimal cutting temperature are determined, and therefore the adjusting mode of cutting parameters is determined. The cutting quality is effectively improved, and the cutting time is shortened.

The invention relates to a femtosecond laser processing method for a periodic ferrocobalt oxide single crystal stripe nanostructure, which comprises the following steps of: firstly, preparing a strontium titanate single crystal substrate, and depositing a single crystal epitaxial ferrocobalt oxide film (CFO) on the substrate through pulsed laser; and the included angle between the polarization direction of the femtosecond laser and the lattice orientation of the film is adjusted according to a preset crystallographic direction, so that the surface of the film is induced by the femtosecond laser to form a stripe-shaped periodic surface structure. The single crystal epitaxial cobalt ferrite film prepared by the method has a highly ordered nano structure, and the specific surface area and surface active sites of the material are remarkably improved, so that the application performance of the material in the fields of gas sensing and the like is enhanced.

The present disclosure provides a composite substrate. The composite substrate includes: a SiC single crystal substrate having an off-angle; and a carbon-containing layer including a laminate of a reconstructed surface layer and a graphene layer, or a graphene layer disposed in contact with a surface of the SiC single crystal substrate. When an outermost surface of the SiC single crystal substrate is a Si-terminated surface, the laminate is disposed above the SiC single crystal substrate, and the graphene layer of the laminate is one or two layers. When the outermost surface of the SiC single crystal substrate is a C-terminated surface, one or two graphene layers are arranged above the SiC single crystal substrate.

The present invention discloses a flexible sensor based on an oxide wrinkle structure and a preparation method thereof, comprising: using a solid-phase method to prepare a Sr3Al2O6 target material and a La-BaTiO3 target material respectively; using a pulsed laser deposition technique to prepare a "La-BaTiO3 / Sr3Al2O6 / SrTiO3" heterostructure using the Sr3Al2O6 target material and the BaTiO3 target material on a SrTiO3 single crystal substrate; using a water-soluble method to electrostatically adsorb a polydimethylsiloxane (PDMS) film on the "La-BaTiO3 / Sr3Al2O6 / SrTiO3" heterostructure. The La-BaTiO3 film was then peeled off from the structure to create a "La-BaTiO3 / PDMS" heterostructure. A gold (Au) electrode was grown on the "La-BaTiO3 / PDMS" heterostructure using magnetron sputtering to create an "Au / PDMS / La-BaTiO3" heterostructure. Another PDMS film was attached to the Au electrode surface of the "Au / PDMS / La-BaTiO3" heterostructure by electrostatic adsorption for encapsulation, resulting in a piezoresistive sensor with the "PDMS / Au / La-BaTiO3 / PDMS" heterostructure. This preparation method offers high process controllability, and the resulting flexible piezoresistive sensor exhibits high precision, high sensitivity, and high reliability. The flexible piezoresistive sensor can adapt to changes in various surfaces and shapes and has a wide range of applications.

According to the method, a high-pressure induction heating furnace is adopted, and under the nitrogen atmosphere of 2-5 MPa, a graphite crucible with the inner wall coated with silicon carbide (SiC) and a porous SiC carbon source are utilized to control the nitrogen content in a silicon melt and stabilize components; by introducing 0.05-0.30 wt% of an aluminum or yttrium cosolvent, the nitrogen dissolving efficiency and wettability are improved, in the method, a 10-30 DEG C temperature gradient of a carbon source region and a seed crystal region is established, convection of a nitrogen-containing silicon melt is induced, epitaxial growth of the beta-SiN single crystal is promoted, and the growth of the beta-SiN single crystal is further improved by controlling the immersion depth and the cooling rate of the seed crystal. And finally, the (0001)-oriented high-quality beta-SiN single crystal substrate with the thickness larger than or equal to 500 m and the dislocation density smaller than or equal to 1 * 10 cm is prepared. Compared with the traditional PVT and CVD methods, the method provided by the invention can effectively reduce the growth temperature and thermal stress, inhibit Si evaporation and significantly improve the crystal size and quality, and is suitable for the field of high-frequency and high-power semiconductor device manufacturing.

There is provided a gallium nitride single crystal substrate, which is a gallium nitride single crystal substrate having a diameter of 50 mm or more, with a low-index crystal plane closest to a main surface being (0001), and in which an average density of etch pits during etching applied to the main surface using an alkaline etching solution is less than 1×106 cm−2; and in histograms of diameters of the etch pits in multiple different regions on the main surface, and among peaks appearing in the histograms, when a diameter of a first peak which is a smallest diameter is denoted as a, a diameter of a second peak which is a second smallest diameter is denoted as b, frequency of the first peak (the number of etch pits) is denoted as A, frequency of the second peak is denoted as B, the number of the etch pits constituting the first peak is denoted as α, and the number of the etch pits constituting the second peak is denoted as β, at least one of the following conditions (1), (2), and (3) is satisfied: (1) variation in a / b values in the multiple histograms is within ±5% of an average value. (2) variation in A / B values in the multiple histograms is within ±15% of an average value. (3) variation in α / β values in the multiple histograms is within ±30% of an average value.

Provided is an epitaxial wafer having a silicon epitaxial film on a silicon single crystal substrate having a resistivity of 10 [Omega] * cm or more and 5000 [Omega] * cm or less, the epitaxial wafer being characterized in that the concentration of carbon atoms in the silicon epitaxial film is 5 * 1017 atoms / cm < 3 > or more and less than 2 * 1019 atoms / cm < 3 >, and carbon defects are formed in the silicon epitaxial film. As a result, provided are: an epitaxial wafer and an SOI wafer which can be manufactured with a small number of steps without using a high-resistivity substrate, are easy to process, and more reliably reduce harmonics; and a method for manufacturing the epitaxial wafer and the SOI wafer.

To provide a semiconductor substrate on which a piezoelectric film having high piezoelectric properties can be formed.SOLUTION: A semiconductor substrate according to the present invention includes a silicon single crystal substrate, a metal film formed on the silicon single crystal substrate and oriented in (111), and an oxide electrode thin film having a metal oxide layer SrRuO3 formed on the metal film, and the orientation of the SrRuO3 film is (001).SELECTED DRAWING: Figure 4

Disclosed is a method for preparing a GaN single crystal substrate, which comprises the following steps: sequentially growing a barrier layer and a first bonding layer on a base plate, and sequentially growing a GaN epitaxial thin film and a second bonding layer on a substrate; bonding the first bonding layer and the second bonding layer, forming a bonding layer, removing the substrate, and obtaining, from the bottom up, the base plate, the barrier layer, the bonding layer, and the GaN epitaxial thin film; by means of wet etching, causing a surface of the side of the GaN epitaxial thin film away from the bonding layer to form a GaN island having a (10-11) crystal face; on the GaN island, growing GaN at 800-1000°C by means of HVPE to form a GaN thick film; removing the bonding layer by means of HF or BOE etching, and separating the base plate from the GaN thick film; and performing surface grinding and polishing on the GaN thick film. The base plate and the GaN thick film of the present invention have consistent coefficients of thermal expansion, no mismatch is present, cracking is not prone to occurring when the film grows thicker, and a large-size GaN single crystal can be prepared.

A SiC epitaxial wafer of the present invention includes a SiC single crystal substrate, and a high concentration layer that is provided on the SiC single crystal substrate and has an average value of an n-type doping concentration of 1×1018 / cm3 or more and 1×1019 / cm3 or less, and in-plane uniformity of the doping concentration of 30% or less.

The invention relates to the field of semiconductor material molecular beam epitaxial growth manufacturing, and discloses a method for controlling As background pressure to reduce InAs / GaSb surface defects, which comprises the following steps: S1, substrate preparation and pretreatment: selecting a proper GaSb single crystal substrate, and carrying out selection, cleaning, degassing and deoxidation treatment on the GaSb substrate; s2, carrying out epitaxial growth of a GaSb buffer layer, and carrying out epitaxial growth of the GaSb buffer layer on the processed GaSb substrate; s3, control of As background pressure intensity: in the growth process of the GaSb buffer layer, the As background pressure intensity in the cavity is controlled and stabilized by adjusting the opening degree of an As needle valve; s4, growth of an InAs / GaSb superlattice: growing an InAs and GaSb superlattice structure layer by layer under the condition of well controlled As background pressure intensity. By accurately controlling the As background pressure intensity, the'bright spot 'defect and other surface defects formed on the InAs / GaSb surface can be effectively reduced, and the surface quality of the superlattice material is improved.

The invention belongs to the technical field of optical detection, and particularly relates to a broadband self-driven photoelectric detector which sequentially comprises a metal In point electrode, a metal Pd front electrode, a PdTe2 modified Sb2O3 two-dimensional thin film layer, a Si single crystal substrate and a metal In back electrode from top to bottom. The Sb2O3 two-dimensional thin film layer prepared through modification of PdTe2 is prepared through magnetron sputtering, chemical vapor deposition and other methods. Test results show that the prepared thin film device shows good self-driven light detection performance under illumination from deep ultraviolet to infrared light, and has the advantages of stable performance and the like.

The invention belongs to the technical field of condensed physics and material science, and particularly relates to an ultrathin single crystal ferroelectric PZT film and a preparation method thereof. The method comprises the following steps of: bombarding a PZT target material by using pulse laser to grow a single crystal ferroelectric PZT film on a single crystal substrate by using a pulse laser deposition PLD method; the deposition process comprises two stages: a single crystal layer growth stage and a rapid cooling stage; the method is simple and easy to operate, and the growth of the ultrathin ferroelectric single crystal film is realized by controlling the laser energy, the substrate deposition growth temperature and the oxygen pressure during PLD growth. According to the method, the growth process is monitored in real time by using a high-energy electron diffractometer RHEED, the quality and thickness of a thin film crystal during growth are ensured, and the atomic-scale flatness of the surface of a prepared sample is proved by observing the surface morphology of the prepared sample through an atomic force microscope; the PZT thin film grown on the single crystal substrate still keeps ferroelectricity when only two layers of crystal lattices are thinnest, and ferroelectric polarization overturning can be achieved.