271 results about "Single crystal substrate" patented technology

Provided is an epitaxial wafer having a silicon epitaxial film on a silicon single crystal substrate having a resistivity of 10 [Omega] * cm or more and 5000 [Omega] * cm or less, the epitaxial wafer being characterized in that the concentration of carbon atoms in the silicon epitaxial film is 5 * 1017 atoms / cm < 3 > or more and less than 2 * 1019 atoms / cm < 3 >, and carbon defects are formed in the silicon epitaxial film. As a result, provided are: an epitaxial wafer and an SOI wafer which can be manufactured with a small number of steps without using a high-resistivity substrate, are easy to process, and more reliably reduce harmonics; and a method for manufacturing the epitaxial wafer and the SOI wafer.

The invention discloses a method for preparing a silicon epitaxial wafer from a heavily-doped silicon single crystal substrate and a formed epitaxial wafer, and the method comprises the steps: taking a carbon-oxygen co-doped boron or phosphorus heavily-doped czochralski silicon wafer as a substrate, carrying out epitaxial high-temperature hydrogen pretreatment, heating to an epitaxial temperature, and further growing an epitaxial layer to prepare a high-quality silicon epitaxial wafer. In the high-temperature hydrogen pretreatment step, the temperature is increased to 1200-1250 DEG C at the speed of 40-60 DEG C / s, the temperature is kept for 150-300 s, then the temperature is reduced to 600-800 DEG C at the speed of 20-50 DEG C / s, and the temperature is kept for 30-120 s. The silicon epitaxial wafer prepared by the invention can form a certain width of high-density carbon-promoted carbon-oxygen co-precipitation induced stacking fault in a clean area on the surface layer of the substrate after being subjected to a device hot working process, has the characteristic of absorbing from gaps to inhibit boron or phosphorus from diffusing outwards, and can obtain a device with stable pressure resistance and strong gettering capability.

The embodiment of the invention discloses a ferroelectric domain wall neuronal synaptic device, a regulation and control method thereof and a neural network device. The ferroelectric domain wall nerve synapse device comprises a ferroelectric domain wall unit and an electric field forming unit; each ferroelectric domain wall unit comprises a single crystal substrate layer, a bottom electrode layer and a ferroelectric material layer which are stacked in sequence; and the electric field forming unit is used for forming an equivalent electric field according to the received pulse signal and loading the equivalent electric field on the ferroelectric domain wall unit so as to regulate and control the conductivity value of the ferroelectric domain wall unit. According to the embodiment, the electric field forming unit in the ferroelectric domain wall neural synapse device receives the pulse signal to form the equivalent electric field, and the equivalent electric field is loaded on the ferroelectric domain wall unit to regulate and control the conductivity value of the ferroelectric domain wall unit, so that integration of information storage and neural morphology calculation can be realized; the method has the advantages of being low in environmental influence degree, stable in resistance state, low in energy consumption, high in calculation speed and the like, and has wide application prospects.

The invention discloses a preparation method of a gallium oxide semi-insulating substrate and the gallium oxide semi-insulating substrate, which comprises the following steps: performing proton irradiation treatment on a gallium oxide single-crystal substrate to introduce lattice defects into the gallium oxide single-crystal substrate, and performing annealing treatment on the gallium oxide single-crystal substrate into which the lattice defects are introduced to obtain the gallium oxide semi-insulating substrate. According to the technical scheme, lattice defects are introduced into the gallium oxide single crystal substrate by adopting a proton irradiation process to form a deep energy level trap to effectively capture free carriers, so that the carrier concentration of the material is remarkably reduced, and the resistivity of the material is increased, thereby realizing stable conversion from a conductive state to a semi-insulating state; therefore, the conditions of poor doping uniformity, insufficient thermal stability and local resistivity fluctuation existing in a traditional element doping method are overcome, meanwhile, the defects of lattice mismatch, insufficient thermal conductivity and the like caused by a heterogeneous substrate are avoided, and the electrical property uniformity and the material structure integrity of the gallium oxide substrate are effectively improved. The method has the advantages of non-contact, low cost, easy regulation and control and the like.

The utility model discloses a rotary device and epitaxial reaction furnace for epitaxial reaction, the rotary device includes the rotary base for supporting wafer tray, rotating mechanism and drive mechanism, rotating mechanism is connected with rotary base through a transmission mechanism and drives rotary base rotation, and drive mechanism is used for driving rotating mechanism rotation. Based on the rotary device, can avoid the graphite particle adhesion monocrystal substrate in epitaxial reaction process, reduces the defect quantity of monocrystal substrate, improves epitaxial layer growth quality.

The invention discloses a silicon-based high-mobility wide-band-gap tin-based oxide film, a preparation method thereof and a transistor, and belongs to the technical field of low-power-consumption electronic devices. The preparation method of the tin-based oxide thin film provided by the invention comprises the following steps: firstly, sequentially preparing a sacrificial layer and a single crystal tin-based oxide thin film on a temporary growth substrate to obtain an oxide heterostructure; then preparing a supporting layer, and adhering the single crystal tin-based oxide thin film by using the supporting layer to realize stripping of the single crystal tin-based oxide thin film from the single crystal substrate; and finally, transferring the single crystal tin-based oxide thin film to the silicon substrate to realize compatible integration of the single crystal tin-based oxide thin film and the silicon substrate. The single crystal tin-based oxide thin film is transferred to the silicon substrate through a substrate-free transfer technology, dependence on a high-cost specific substrate is eliminated, a mature silicon-based process is compatible, and a foundation is laid for large-scale integrated circuit application; and finally, the thin film transistor with low power consumption, high performance and low cost is prepared, the cost advantage is remarkable, and the application prospect is wide.

The invention provides a polarization signal amplification photoelectric detector based on gallium oxide and a preparation method thereof. The polarization signal amplification photoelectric detector based on gallium oxide comprises a gallium oxide single crystal substrate; the gallium oxide photoelectric detector is arranged on the gallium oxide single crystal substrate, and the gallium oxide photoelectric detector is configured to generate different photoelectric responses to the solar-blind ultraviolet light in different polarization directions by using the in-plane anisotropy of a gallium oxide material and output electric signals changing along with the polarization directions; the gallium oxide transistor is arranged on the gallium oxide single crystal substrate, a grid electrode of the gallium oxide transistor is electrically connected with the signal output end of the gallium oxide photoelectric detector so as to receive an electric signal changing along with the polarization direction to serve as input of the grid electrode, the gallium oxide transistor works in a sub-threshold region, and the change of the polarization direction causes the change of grid electrode voltage; and an electric signal with enhanced amplitude is output from the drain electrode of the gallium oxide transistor, so that on-chip amplification of the polarization signal is realized.

A Schottky barrier diode, including a first n-type semiconductor layer including a β-Ga2O3-based single crystal epitaxial layer and having a first carrier concentration that determines reverse breakdown voltage and forward voltage, a second n-type semiconductor layer including a β-Ga2O3-based single crystal substrate and having a second carrier concentration that is higher than the first carrier concentration and determines forward voltage, a Schottky electrode provided on a surface of the first n-type semiconductor layer on the opposite side to the second n-type semiconductor layer, and an ohmic electrode provided on a surface of the second n-type semiconductor layer on the opposite side to the first n-type semiconductor layer. The β-Ga2O3-based single crystal substrate includes a surface that has a plane orientation rotated by an angle of not more than 37.5° from a (010) plane.

The application provides a yttrium barium copper oxide photonic crystal and a preparation method thereof. 7‑x The photonic crystal structure is composed of periodic yttrium barium copper oxide (YBa2Cu3O 7‑x ) superconducting material circular crystal columns, the lattice constant is 2630nm, and the radius of the circular crystal column is 500nm. The photonic crystal can change the position and width of the band gap by changing the light incidence angle, so that the middle infrared band gap is realized. The photonic crystal is prepared by adopting a magnetron sputtering method to prepare a yttrium barium copper oxide film on a strontium titanate single crystal substrate, and then adopting a focused ion beam method to process the yttrium barium copper oxide film into a periodic nanostructure composed of yttrium barium copper oxide circular crystal columns, so that the yttrium barium copper oxide photonic crystal is obtained. The preparation method of the yttrium barium copper oxide photonic crystal is simple and easy to control.

The invention belongs to the field of film sensors, and discloses a preparation method of a lanthanum aluminate / strontium titanate nanostructure for hydrogen detection, which comprises the following steps: preparing a strontium titanate single crystal substrate, depositing a single crystal epitaxial lanthanum aluminate film on the strontium titanate single crystal substrate by pulse laser to obtain a single crystal epitaxial lanthanum aluminate / strontium titanate material; then, a stripe-shaped periodic surface nanostructure is formed on the surface of the single crystal epitaxial lanthanum aluminate thin film through femtosecond laser induction, a lanthanum aluminate / strontium titanate nanostructure is obtained, and then precious metal nanoparticles are deposited on the surface of the lanthanum aluminate / strontium titanate nanostructure. According to the preparation method, the highly-ordered single-crystal lanthanum aluminate / strontium titanate heterogeneous film is obtained by accurately controlling pulse laser deposition process parameters, and a nano stripe periodic structure is prepared on the surface of lanthanum aluminate by accurately controlling pulse femtosecond laser processing parameters, so that the specific surface area is effectively increased, gas adsorption sites are increased, and the specific surface area of the lanthanum aluminate / strontium titanate heterogeneous film is increased. And the gas charge transmission capability of the lanthanum aluminate / strontium titanate interface two-dimensional electron gas is improved.

The invention aims to provide a method for dividing a single crystal substrate that suppresses the occurrence of chipping. According to one embodiment of the invention, the method relates to a single-crystal substrate with a cleavage plane (7) inclined with respect to a scoring surface and a fracture surface (2), and includes steps to form a scoring line (L2) on the scoring surface (3), to apply an adhesive separating strip (9) to the scoring surface (3), to turn over a single-crystal substrate (1) and place it on a crushing table 11 such that the scoring surface (3) faces the crushing table (11), to bring a crushing plate (13) into contact with the fracture surface (2) along a fracture line (B) which is separated from a reference line (R) by a transverse line (C) at which a vertical plane extending from the scoring line (L2) in a direction orthogonal to the scoring surface (3) and the fracture surface (2) intersects the fracture surface (2).where the cleavage plane (7), extending from the scribe line (L2), crosses the fracture surface (2), is positioned at a distance, and an external force is applied from the fracture plate (13) to the fracture surface (2) to split the single crystal substrate (1) along the cleavage planes (7).

A semiconductor substrate (1) includes: an SiC single crystal substrate (10SB), a first graphene layer (11GR1) disposed on an Si plane of the SiC single crystal substrate 10SB; an SiC epitaxial growth layer (12RE) formed above the SiC single crystal substrate via the first graphene layer; and a second graphene layer (11GR2) disposed on an Si plane of the SiC epitaxial growth layer. There is also included an SiC polycrystalline substrate (16P) provisionally bonded onto the SiC epitaxial growth layer via the second graphene layer. The SiC single crystal substrate is able to be reused by being separated from the SiC epitaxial growth layer. This semiconductor substrate further includes an SiC polycrystalline growth layer (18PC) CVD grown on the C plane of the SiC epitaxial growth layer; and the SiC epitaxial growth layer is transferred to the SiC polycrystalline growth layer.

The present invention provides a semiconductor device that uses a high-quality semiconductor film. The present invention provides a high-performance semiconductor device. The semiconductor device comprises first and second transistors, first and second insulation layers, and first and second single crystal substrates. In the first transistor, a channel is formed in a first single crystal semiconductor of the first single crystal substrate. The second transistor is positioned above the first transistor. In the second transistor, a channel is formed in a second single crystal semiconductor that contacts the first single crystal substrate. The second single crystal substrate is positioned above the second transistor. The first insulation layer is positioned between the first transistor and the second transistor. The second insulation layer is positioned between the first insulation layer and the second transistor and has a first joining surface that contacts the first insulation layer. The first single crystal semiconductor contains silicon, and the second single crystal semiconductor contains a metal oxide.

This method for manufacturing a SiC composite substrate includes: a step of providing a single crystal SiC substrate having a graphene film formed on a main surface; a step of epitaxially growing a single crystal SiC layer on the main surface of the single crystal SiC substrate via the graphene film; a step of peeling the single crystal SiC layer from the graphene film; and a step of laminating the single crystal SiC layer by interposing an adhesive layer containing a metal compound on a main surface of a polycrystalline SiC substrate.

The application provides a PN diode based on a non-doped single crystal substrate and a preparation method thereof. ‑ a GaN layer, a p + GaN layer and an anode metal layer; wherein the non-doped single crystal structure comprises a non-doped drift layer on a front surface and an ion implantation layer on a back surface, the ion implantation layer is in contact with the cathode metal layer as a substrate of the PN diode, and the non-doped drift layer is in contact with the p ‑ GaN layer to form a PN junction. The PN diode based on the non-doped single crystal substrate and the preparation method thereof have the advantages of simplifying the preparation process, reducing the manufacturing cost, reducing the interface pollution, and improving the electrical performance and long-term reliability of the device.

The invention discloses a low-defect-density gallium nitride semiconductor chip epitaxial structure, and relates to the technical field of chip epitaxial equipment.The epitaxial structure comprises an epitaxial furnace used for carrying out an epitaxial process on a single crystal substrate, the epitaxial furnace comprises an outer shell, a driving mechanism is fixedly installed at the bottom of an inner cavity of the outer shell, and an output shaft of the driving mechanism is in transmission connection with a bearing part; a hydraulic cylinder set is fixedly installed on the top of an inner cavity of the outer shell, and a hollow shaft rod is in transmission connection with the interior of the hydraulic cylinder set. A low-defect-density gallium nitride semiconductor chip epitaxial structure is characterized in that for the arrangement of a bearing part and a structure on the bearing part, when a single crystal substrate is subjected to an epitaxial process and special gas is conveyed into an inner cavity of an outer shell through a hollow shaft rod, the single crystal substrate placed on a supporting block can be adsorbed, and the single crystal substrate is subjected to the epitaxial process; and the phenomenon of deviation caused by the impact of centrifugal force and special gas is avoided, so that the epitaxy precision and quality of the equipment on the single crystal substrate are effectively improved.

A silicon carbide single crystal substrate processing method by which the thickening of a desired surface of a SiC single crystal substrate can be achieved in a short time under mild conditions such as room temperature; and a silicon carbide single crystal substrate processing system applicable to the processing method. The silicon carbide single crystal substrate processing method includes performing anodic oxidation, in which a voltage is applied using the silicon carbide single crystal substrate as an anode while at least one main surface of the silicon carbide single crystal substrate is brought into contact with an electrolyte solution that does not contain fluorine anions, to thereby form an oxide film on the main surface.

The invention provides a preparation method of a tin-doped scaly nano gallium oxide thin film solar blind ultraviolet photoelectric detector. The preparation method comprises the following steps: carrying out cleaning pretreatment on a single crystal GaN substrate; depositing an Au thin film on the pretreated single crystal GaN substrate to serve as a catalyst layer; the preparation method comprises the following steps: mixing Ga2O3, diamond and SnO2 powder according to a certain mass ratio to prepare a precursor; putting the single crystal GaN substrate deposited with the Au thin film and a precursor into a CVD furnace, and growing according to preset gas flow, pressure intensity, reaction temperature and reaction time to obtain a tin-doped scaly nano gallium oxide thin film; and respectively preparing electrodes on the surface of the tin-doped scaly nano gallium oxide thin film and the surface of the GaN substrate by adopting a radio frequency magnetron sputtering method. The conductivity of the thin film is improved through tin doping, the specific surface area and light absorption are increased through the scaly nanostructure, high-performance deep ultraviolet photoelectric detection is achieved, and the technical problem that in the prior art, the dark current of a device is high is solved.

The invention relates to a semiconductor structure, a memory device and a manufacturing method thereof. The semiconductor structure comprises a first substrate, a second substrate, a bonding layer, a first conductive layer and a first dielectric layer. The second substrate is disposed on the first substrate. The second substrate is a single crystal substrate. The bonding layer is disposed between the first substrate and the second substrate. The first conductive layer is disposed between the bonding layer and the second substrate. The first dielectric layer is disposed between the first conductive layer and the second substrate.

The invention discloses a large-size and low-resistivity 4H-SiC monocrystal crystal bar and a 4H-SiC monocrystal substrate, and belongs to the technical field of 4H-SiC monocrystal preparation. The thickness of the 4H-SiC single-crystal crystal bar is 15 mm or above, the resistivity of the 4H-SiC single-crystal crystal bar at any position is larger than 6 m omega.cm and smaller than 12 m omega.cm, and the resistivity variation coefficient of any cross section of the 4H-SiC single-crystal crystal bar is smaller than or equal to 5%. The 4H-SiC monocrystal crystal bar is high in thickness, lower in resistivity and more uniform in distribution, the on resistance of a power device can be remarkably reduced, and the use stability of the device is improved.

A gallium arsenide single-crystal substrate is a gallium arsenide single-crystal substrate with a circular main surface, wherein an average value of a dislocation density of the main surface 5 cm -2 or more and 100 cm -2 or less, and in an imaginary lattice formed by laying out squares with a side length of 2 mm on the main surface such that a maximum number of the squares are arranged next to each other without overlapping, a ratio of the number of squares in which no dislocation is present to the total number of squares forming the lattice is 97.0% or more and 99.5% or less, wherein the gallium arsenide single-crystal substrate contains silicon, wherein the silicon concentration is 1.0 × 10 18 cm -3 or more and 5.0×10 19 cm -3 or less, and a carrier concentration of the gallium arsenide single crystal substrate of 1.0×10 18 cm-3 or more and 4.0×10 18 cm -3 or less.

The present invention provides a strontium titanate-based oxide superlattice thin film memristor and a preparation method thereof. The preparation method comprises the following steps: using a niobium-doped strontium titanate single crystal substrate as a bottom electrode; alternately depositing strontium titanate layers and another type of oxide film layer on the surface of the niobium-doped strontium titanate single crystal substrate to prepare a strontium titanate-based oxide superlattice thin film as a storage dielectric layer, wherein the other type of oxide film layer is selected from one of yttrium-doped zirconium oxide, lanthanum cobalt oxide, or bismuth ferrite; and further depositing a metal film as a top electrode on the surface of the substrate coated with the storage dielectric layer obtained in step S2, to obtain a memristor comprising bottom electrode||STO-based oxide superlattice thin film storage dielectric layer||top electrode. The strontium titanate-based oxide superlattice thin film memristor prepared by this preparation method can form a single crystal or a superlattice thin film with high crystal integrity, and the memristor has a low operating voltage and high configuration stability.

The application discloses an epitaxial structure and method of a high-linearity AlGaN / GaN heterojunction, which sequentially comprises a single-crystal substrate, an AlN nucleation layer, a GaN buffer layer, a GaN channel layer, an AlGaN channel layer, a first AlGaN barrier layer and a second AlGaN barrier layer. The technical scheme uses epitaxial technologies such as metal organic chemical vapor deposition (MOCVD), adopts a high-temperature and low-rate process for the GaN channel layer, improves the crystallization quality and surface morphology of the GaN channel layer, and is favorable for reducing the defect density of the subsequent AlGaN channel layer and barrier layer. The AlGaN channel layer structure is introduced, the small conduction band step of the AlGaN channel layer / GaN channel layer is used, three-dimensional distribution of an electron gas in the GaN / AlGaN composite channel layer is realized, the first AlGaN barrier layer structure of polarization modulation doping is introduced, the electron gas penetrates into the barrier layer, and the three-dimensional depth of the electron gas is further widened, the second AlGaN barrier layer with strong polarization is used, the electron gas surface density and the transconductance peak value are improved, and the application is suitable for the development of a high-linearity GaN radio frequency device.

The objective is to provide a method and apparatus for manufacturing silicon carbide single crystal substrates with high flatness. [Solution] The method for manufacturing a silicon carbide single crystal substrate is characterized by measuring the first thickness of the central part of the silicon carbide single crystal substrate and the second thickness of the outer peripheral part located on the outer peripheral side of the central part, measuring the first pressure applied to the central part of the silicon carbide single crystal substrate and the second pressure applied to the outer peripheral part of the silicon carbide single crystal substrate, and determining the relationship between the first index obtained from the first pressure and the second pressure and the second index obtained from the first thickness and the second thickness.

Additive manufacturing of single crystal materials results in polycrystalline layers or grains, which may be reduced or eliminated by treatment with Al or optionally Pt. The thinning of the polycrystalline layer may be performed without mechanical or chemical removal of the polycrystalline material. A workpiece formed by the process may include a single crystal substrate; an interdiffusion region on the substrate; and a thermal barrier coating over the interdiffusion region, and the interdiffusion region diffuses the polycrystalline layer such that post-processing required to remove the polycrystalline layer is not required.

The invention relates to the technical field of lithium ion battery materials, in particular to an electrolyte-carbon fiber coated positive electrode material and a preparation method and application thereof. The preparation method of the material comprises the following steps: mixing and sintering an ultrahigh nickel single crystal precursor, a lithium source and a doping agent to obtain a primary sintered product; obtaining a composite spinning solution containing a high-molecular polymer and a solid electrolyte; the surface of a primary sintered product is coated with composite nanofibers through a fluidized bed assisted electrostatic spinning technology, and then a final product is obtained through pre-oxidation and carbonization treatment. Three-dimensional uniform coating is realized on the surface of a single crystal substrate by adopting a fluidized bed assisted electrostatic spinning process, and a stable electrolyte-carbon fiber composite coating layer is constructed. The coating layer is used as a functional interface layer, and a compatible interface is introduced between the positive electrode and the solid electrolyte, so that the side reaction of the interface is effectively inhibited, the bonding firmness of the interface is enhanced, and the cycling stability of the battery is remarkably improved while high specific capacity is maintained.

The invention provides a grinding and polishing method for a gallium nitride single crystal substrate. The grinding and polishing method comprises the steps that the Ga face of the gallium nitride single crystal substrate is fixed away from a grinding platform; measuring a Ga surface warping value and selecting a first grinding head to grind the Ga surface for the first time; the N surface of the gallium nitride single crystal substrate is fixed away from the grinding platform; measuring the warping value of the N surface, and selecting a second grinding head to grind the N surface for the first time; providing a third grinding head to perform secondary grinding on the N surface of the gallium nitride single crystal substrate; the Ga surface of the gallium nitride single crystal substrate is fixed away from the grinding platform; providing a fourth grinding head to perform secondary grinding on the Ga surface of the gallium nitride single crystal substrate; and performing chemical mechanical polishing on the gallium nitride single crystal substrate. When the Ga surface and the N surface of the gallium nitride single crystal substrate are ground for the first time, according to the warping condition of the Ga surface and the N surface, the grinding head with the difference between the central area and the edge position is selected for different grinding, the grinding and thinning efficiency of the protruding part can be improved, and meanwhile damage to the non-protruding part in the grinding process is reduced.

A method of manufacturing a silicon single crystal substrate having a carbon diffusion layer on a surface, the method comprising: a step of adhering carbon to a surface of a silicon single crystal substrate by RTA-treating the silicon single crystal substrate in a carbon-containing gas atmosphere; a step of forming a 3C-SiC single crystal film on the surface of the silicon single crystal substrate by reacting the carbon and the silicon single crystal substrate; a step of oxidizing the 3C-SiC single-crystal film into an oxide film and diffusing carbon into the interior of the silicon single-crystal substrate by an RTA treatment of the silicon single-crystal substrate on which the 3C-SiC single-crystal film is formed, wherein the RTA treatment is performed in an oxidative atmosphere; and a step of removing the oxide film.

The present invention provides a monocrystalline SiC substrate with an asymmetric shape for enhancing substrate stiffness against thermal induced deformations, the substrate comprising: a main region, and an asymmetric region located at a peripheral region of the substrate and adjacent to the main region, wherein the asymmetric region is inclined inwards, relative to the main region, to provide an asymmetric shape to the substrate. The present invention also provides a method of producing one or more substrates with an asymmetric shape, comprising: performing a multi-wire sawing process in which one or more substrates are cut with an wire-sawing web from an ingot placed on a stage, and cutting the one or more substrates with the asymmetric shape by controlling a relative movement between the wire-sawing web and the stage, the relative movement causing the wire-sawing web to describe a non-linear sawing path across the ingot to cut the asymmetric shape.

The application relates to the technical field of semiconductor materials, in particular to a preparation method of a semi-insulating silicon carbide substrate, which comprises the following steps: mixing high-purity silicon powder and carbon powder according to a preset ratio to synthesize silicon carbide particles; performing crystal growth to obtain a silicon carbide crystal ingot; cutting, grinding and polishing the silicon carbide crystal ingot to obtain a silicon carbide single crystal substrate; and performing high-temperature annealing and impurity removal treatment on the silicon carbide single crystal substrate to obtain a high-purity semi-insulating silicon carbide substrate. In the cutting process, the following steps are included: cutting after pre-annealing treatment is performed on the silicon carbide crystal ingot; collecting contact pressure data, temperature data, cutting speed data, cooling liquid flow and integrity data in the cutting process, and then determining the optimal contact pressure and the optimal cutting temperature, so as to determine the adjustment mode of the cutting parameters. The application effectively improves the cutting quality and shortens the cutting time.