16729 results about "Thermal expansion" patented technology

The present invention provides methods, devices and device components for fabricating patterns on substrate surfaces, particularly patterns comprising structures having microsized and / or nanosized features of selected lengths in one, two or three dimensions. The present invention provides composite patterning devices comprising a plurality of polymer layers each having selected mechanical properties, such as Young's Modulus and flexural rigidity, selected physical dimensions, such as thickness, surface area and relief pattern dimensions, and selected thermal properties, such as coefficients of thermal expansion, to provide high resolution patterning on a variety of substrate surfaces and surface morphologies.

A method of forming a via having a stress buffer collar, wherein the stress buffer collar can absorb stress resulting from a mismatch in the coefficients of thermal expansion of the surrounding materials. Other embodiments are described and claimed.

Chip stacks with decreased conductor length and improved noise immunity are formed by laser drilling of individual chips, such as memory chips, preferably near but within the periphery thereof, and forming conductors therethrough, preferably by metallization or filling with conductive paste which may be stabilized by transient liquid phase (TLP) processes and preferably with or during metallization of conductive pads, possibly including connector patterns on both sides of at least some of the chips in the stack. At least some of the chips in the stack then have electrical and mechanical connections made therebetween, preferably with electroplated solder preforms consistent with TLP processes. The connections may be contained by a layer of resilient material surrounding the connections and which may be formed in-situ. High density circuit packages thus obtained may be mounted on a carrier by surface mount techniques or separable connectors such as a plug and socket arrangement. The carrier may be of the same material as the chip stacks to match coefficients of thermal expansion. High-density circuit packages may also be in the form of removable memory modules in generally planar or prism shaped form similar to a pen or as a thermal conduction module.

Dotted seeds are implanted in a regular pattern upon an undersubstrate. A GaN crystal is grown on the seed implanted undersubstrate by a facet growth method. The facet growth makes facet pits above the seeds. The facets assemble dislocations from neighboring regions, accumulate the dislocations into pit bottoms, and make closed defect accumulating regions (H) on the seeds. The polycrystalline or slanting orientation single crystal closed defect accumulating regions (H) induce microcracks due to thermal expansion anisotropy. The best one is orientation-inversion single crystal closed defect accumulating regions (H). At an early stage, orientation-inverse protrusions are induced on tall facets and unified with each other above the seeds. Orientation-inverse crystals growing on the unified protrusions become the orientation-inverse single crystal closed defect accumulating regions (H).

A gas chamber contains upper and lower chamber bodies forming a cavity, a heating chuck for a wafer, a remote gas source, and an exhaust unit. Gas is injected into the cavity through channels in an injector. Each channel has sections that are bent with respect to each other at a sufficient angle to substantially eliminate entering light rays entering the channel from exiting the channel without reflection. The channels have funnel-shaped nozzles at end points proximate to the chuck. The injector also has thermal expansion relief slots and small gaps between the injector and mating surfaces of the chamber and gas source. The temperature of the injector is controlled by a cooling liquid in cooling channels and electrical heaters in receptacles of the injector. The upper chamber body is funnel-shaped and curves downward at an end of the upper chamber body proximate to the chuck.

A gas inlet manifold for a plasma chamber having a perforated gas distribution plate suspended by a side wall comprising one or more sheets. The sheets preferably provide flexibility to alleviate stress in the gas distribution plate due to thermal expansion and contraction. In another aspect, the side wall provides thermal isolation between the gas distribution plate and other components of the chamber.

A housing accommodating a semiconductor chip is set out. The housing and chip may be used for sending and / or receiving radiation. Popular applications of the housing may be in light emitting diodes. The housing includes a conductor strip that is punched into two electrically isolated portions. The housing further includes a cavity extending inwards from the top of the housing. The conductor portions include respective areas that are exposed at the bottom of the cavity. The semiconductor chip is bonded to one of the exposed areas and a wire bonds the chip to the second exposed area. The conductor portions also terminate in exposed electrodes, which allow for electrical connection of the chip with external devices. A window is formed in the cavity and the walls of the housing that form the cavity may be made of a reflective material. The electrodes remain unexposed to the window but for any residual areas about the chip and bonding wire within the first and second exposed areas. By minimizing the area of the conductor exposed to the window, delamination brought about by the different thermal expansions of the window and conductor are minimized and / or eliminated. Likewise, with a reflective housing covering the base of the cavity that accommodates the window, internal radiation reflection is increased over that which was achieved with an exposed conductor.