4121 results about "Semiconductor package" patented technology

The invention discloses a bonding full-automatic detection system and method based on image recognition, and belongs to the technical field of semiconductor packaging quality detection.The bonding area image is collected through a multi-angle visual sensor, bonding points are recognized and positioned, coordinates, sizes and arc heights of the bonding points are recorded, and a node network model is constructed according to a spatial distribution structure; selecting an initial node in the model to set a reference, transmitting reference values in sequence along a preset path, judging whether the reference is updated or not by each node by comparing a measured value with a received value, and recording a deviation state at the same time; in the process, the reference adjustment amplitude is recorded in real time, the accumulated adjustment amount of each path is calculated, abnormal transmission paths are identified, and deviation node density is counted to mark abnormal areas; and finally, according to the number of the abnormal paths and the area of the abnormal region, carrying out bonding quality judgment, automatically calculating the marking position of an unqualified product, and executing laser marking.

Provided is an arylalkyl-modified indene composition comprising a plurality of compounds, each of the compounds having one or more arylalkyl groups on an indene ring and differing from the others in the number of arylalkyl groups in one molecule. The content of the compound or compounds having a single arylalkyl group in one molecule is 1% or less in the composition at the percentage calculated on the basis of the area ratio in a GPC chart. At least one of the arylalkyl groups present in the composition is an arylalkyl group having a polymerizable unsaturated bond-containing group, while at least one of the arylalkyl groups present in the composition is an arylalkyl group having no polymerizable unsaturated bond-containing group.

Provided is an arylalkyl-modified indene composition that contains a plurality of types of compounds having an arylalkyl group on an indene ring, the compounds having different numbers of arylalkyl groups in one molecule, wherein: the content of a compound in which the number of arylalkyl groups in one molecule is 1 is 1% or less as calculated from the area ratio of the GPC chart; at least one of the arylalkyl groups present in the composition has a polymerizable unsaturated bond-containing group; and at least one of the arylalkyl groups present in the composition does not have a polymerizable unsaturated bond-containing group.

This method for producing an aryl-alkylated indene composition involves: adding an arylalkyl group having a polymerizable unsaturated bond-containing group to an indene compound; and adding an arylalkyl group having no polymerizable unsaturated bond-containing group to the indene compound to which the arylalkyl group having a polymerizable unsaturated bond-containing group is added.

The invention relates to the technical field of semiconductor packaging, in particular to a batch dust-free packaging device for power semiconductor devices and a using method of the batch dust-free packaging device for the power semiconductor devices, and the batch dust-free packaging device comprises a plastic packaging machine main body, a plastic packaging mold and a side frame, an upper plastic packaging mold and a lower plastic packaging mold are installed at the upper end and the lower end of the plastic packaging machine body respectively, a side frame is fixedly connected to one side of the plastic packaging machine body, a cleaning roller storage box is installed on one side of the side frame, and an electric push rod and an air supply and negative pressure unit are arranged in the cleaning roller storage box. Three-step dust-free cleaning of blowing, sucking and shaking is automatically carried out on a mold cavity after each time of plastic packaging; during air blowing, air is expanded and cooled twice through a conical barrel, the mold is synchronously cooled, and stubborn particles are stripped; negative pressure is formed on the surface of the cotton layer during air suction, and all residual scraps are sucked away; after cleaning is finished, the roller body returns to the storage box, the blocking block collides with the toothed plate to enable the roller body to jolt at high frequency, and attachments are shaken off into the box and are sealed and collected.

A semiconductor package has a first semiconductor package which includes a first redistribution structure, a first semiconductor chip on a lower surface of the first redistribution structure, a first encapsulant on at least a portion of the first semiconductor chip, a second redistribution structure on the first encapsulant, and a conductive post electrically connecting the first redistribution structure and the second redistribution structure through the first encapsulant; and a second semiconductor package which is on an upper surface of the first redistribution structure and comprises a third redistribution structure, a second semiconductor chip on the third redistribution structure, and a second encapsulant on at least a portion of the second semiconductor chip, wherein the first encapsulant integrally covers each of a lower surface and a side surface of the first semiconductor chip.

A semiconductor package includes a first semiconductor chip including a first substrate and a first bonding layer disposed on the first substrate, and having a flat first outer surface provided by the first bonding layer; and a second semiconductor chip disposed on the first outer surface of the first semiconductor chip, including a second substrate and a second bonding layer disposed on the second substrate, and having a flat second outer surface provided by the second bonding layer and contacting the first outer surface of the first semiconductor chip. The first bonding layer includes a first outermost insulating layer providing the first outer surface, a first internal insulating layer stacked between the first outermost insulating layer and the first substrate, first external marks disposed in the first outermost insulating layer and spaced apart from each other, and first internal marks interlaced with the first external marks within the first internal insulating layer.

The invention relates to the technical field of semiconductor packaging and cooling, and particularly discloses a diamond-copper composite micro-channel-based cooling and packaging structure which comprises a packaging shell and a diamond-copper heat conduction plate with the bottom in floating lap joint through an elastic sealing ring. A plurality of heat exchange stand columns are integrally formed on the upper surface of the heat conduction plate, and the heat exchange stand columns are inserted into the containing counter bores of the packaging shell to form micro-channel annular gaps. A piezoelectric vibration plate dividing the medium cavity into a storage cavity and a jet flow cavity is integrated in the packaging shell, and the jet flow cavity communicates with a flexible connecting pipe section arranged over the heat exchange stand column in a suspended mode. Spiral fins are arranged on the surfaces of the heat exchange stand columns, horn-shaped flow guide pieces are arranged at orifices of the containing counter bores, and C-shaped groove flow guide fins which are arranged in a staggered mode are arranged on the bottom face of the heat conduction plate. According to the invention, low-thermal-resistance, high-flux and high-reliability direct contact type active heat dissipation for a high-power-density device is realized.

This invention relates to the field of semiconductor packaging technology, and more particularly to a fan-out board-level packaging bonding machine, comprising a support and a cavity. The cavity is fixed inside the support, and a vacuum transfer gate is provided at the front end of the cavity. A pressure applying mechanism is mounted on the top of the support and extends into the cavity. An upper bonding platform is mounted on the bottom of the pressure applying mechanism. A lower bonding platform is provided at the bottom of the cavity. An alignment mechanism and a receiving mechanism are mounted inside the cavity. This invention, through the structural design of the receiving mechanism, alignment mechanism, pressure applying mechanism, and top PIN mechanism, achieves product loading and unloading, high-precision alignment, and bonding. Furthermore, it features high flatness of each bonding layer, high parallelism between bonding surfaces, high uniformity of force acting on the product, and high uniformity of platform temperature. It also allows for controlled temperature rise and fall, enabling the board-level packaging to accommodate more chips, improving production efficiency and reducing costs.

The invention relates to the technical field of industrial robots, in particular to a dynamic simulation damping parameter solving method based on a gravity compensation mechanism, which comprises the following steps of: acquiring a joint basic parameter set of a to-be-tested industrial robot, and determining a test boundary condition according to the joint basic parameter set, and constructing a test task sequence based on the test boundary conditions. According to the method, the fusion weight of the static stiffness and the dynamic stiffness is intelligently adjusted according to the characteristics of the movement speed, the acceleration or the force control frequency band in a specific application task, and the limitation of a single parameter under complex and changeable working conditions is avoided. According to the parameter fusion mechanism aiming at the specific task characteristics, the generated joint comprehensive rigidity parameters can truly reflect the physical response of the robot in different operation stages, and the prediction error between the physical simulation environment and the actual physical operation is reduced; and the strict requirements of high-precision scenes such as semiconductor packaging and the like on micron-level positioning precision and force control stability are met.

The invention discloses an LED semiconductor packaging dispensing detection device which comprises a fixed mounting table, a base frame, a round supporting plate, a sealing cover, an LED semiconductor storage box and an LED semiconductor body, the round supporting plate and the fixed mounting table are installed at the two ends of the top of the base frame respectively, and an equipment mounting frame is fixedly arranged on the outer surface of the fixed mounting table. A detection equipment body used for detecting the dispensing quantity is mounted at the top of the equipment mounting rack, and the size detection mechanism comprises a bearing reversing table used for bearing an LED semiconductor body, and a main clamping plate and an auxiliary clamping plate which are arranged at the two ends of the LED semiconductor body respectively. Through the size detection mechanism, infrared correlation, mechanical clamping and a multi-angle steering mechanism, size detection and position correction can be automatically completed while the dispensing number of an LED semiconductor body is detected, and the problem of inaccurate measurement caused by semiconductor position deviation or size errors in traditional manual detection is solved.

The invention discloses a micro-channel cooling method and system for semiconductor packaging, and belongs to the technical field of semiconductor packaging detection, and the method specifically comprises the steps: constructing a graded micro-channel network in a semiconductor packaging substrate, the graded micro-channel network is composed of a first-stage main channel and a second-stage branch channel with a smaller equivalent hydraulic diameter, and the first-stage main channel and the second-stage branch channel are communicated through a conical transition section; the pump pumps a cooling working medium into the second-stage branch channel through the first-stage main channel, and flow deviation caused by manufacturing tolerance is compensated through diameter difference. During boiling cooling, a cooling working medium absorbs heat in the second-stage branch channel to form a bubble core, and a periodic expansion or contraction structure in the channel regulates and controls bubble growth; a cooling working medium carrying bubbles enters an inertia damping structure comprising a sudden expansion cavity and a vortex generator for pressure stabilization and then enters an external condenser for phase change, the condensed liquid cooling working medium is injected into a primary main channel again through a pump, and efficient cooling circulation is achieved.

Provided is a semiconductor package including a three-dimensional (3D) stacked structure in which an upper second semiconductor chip is stacked on a lower first semiconductor chip. In the semiconductor package, a power distribution network for the first semiconductor chip and a power distribution network for the second semiconductor chip are implemented through circuits of the first semiconductor chip and separated from the first semiconductor chip.

The invention relates to a high-temperature-resistant polymer binder and a preparation method thereof. The binder is composed of a mixture of resin containing a siloxane unit polyimide main chain and an epoxy group side chain and tannic acid. Wherein the main chain containing siloxane and imide units endows the adhesive with excellent heat-resistant stability, excellent processability and excellent adhesion with glass and ceramic materials, and the adhesive can be cured at room temperature through the epoxy side group; the mixed tannic acid can form strong interface bonding with a polymer film and a metal material through a multiple hydrogen bond network, so that the tannic acid has important application prospects in the fields of semiconductor packaging, thermal interface materials and the like.

The invention relates to ultrapure alpha-alumina powder and a preparation method thereof.The preparation method comprises the steps that aluminum scraps, an anhydrous aluminum chloride catalyst and isopropanol are subjected to a reflux reaction at the temperature of 60-80 DEG C, and aluminum isopropoxide is obtained; adding mixed alcohol of n-caprylic alcohol and isopropanol into the aluminum isopropoxide, continuing the reflux reaction, and then filtering the mixture obtained by the reflux reaction while the mixture is hot to obtain liquid composite aluminum alkoxide; carrying out atmospheric distillation on the composite aluminum alkoxide at 80-100 DEG C to remove free alcohol in the composite aluminum alkoxide to obtain dealcoholized composite aluminum alkoxide; adding high-purity water at 80 DEG C or above into the dealcoholized composite aluminum alkoxide, and carrying out two-step hydrolysis to obtain hydrolyzed slurry; carrying out reduced pressure distillation on the hydrolyzed slurry to recover alcohol in the hydrolyzed slurry so as to obtain dealcoholized hydrolyzed slurry; ,...,.... According to the method, an alcohol-aluminum alkoxide-aluminum oxide path is adopted, acid pickling for iron removal is avoided, and the ultra-pure alpha-aluminum oxide powder with the Fe content smaller than or equal to 0.5 ppm and the adjustable particle size is obtained.

A semiconductor package comprises: a package substrate; a semiconductor die mounted on the package substrate and electrically coupled to the package substrate; an encapsulant layer formed on the package substrate to at least encapsulate the semiconductor die; a shielding layer formed on the encapsulant layer to reduce or prevent electromagnetic interference to the semiconductor die from an external environment of the semiconductor package; and an antenna pattern formed on the encapsulant layer; and a set of interconnection structures extending through the encapsulant layer and electrically coupled between the antenna pattern and the package substrate.

The invention relates to the technical field of industrial robot precision assembly, in particular to an intelligent power position cooperative control and precision guarantee method and system which are suitable for micron-level precision scenes such as semiconductor packaging, medical instrument precision assembly and aerospace component butt joint. Real-time sensing of the assembly force-position state, self-adaptive adjustment of parameters, dynamic optimization of a path and online verification of quality can be realized, and the problems of force-position coupling interference, difficulty in guaranteeing precision and easiness in damaging parts in traditional assembly are solved.

The invention discloses a heat dissipation enhanced semiconductor packaging method, which comprises the following steps of: performing deep silicon etching to form a vertical through hole; insulation and metallization are carried out; thinning the wafer; performing hybrid bonding and stacking of multiple layers of chips; a heat dissipation design is adopted to form a vertical heat dissipation path; a three-dimensional thermal through hole network: adding pure copper thermal through holes in a non-functional area; performing microfluid cooling integration; molding and packaging; and thermal performance verification: verifying that the junction temperature can be controlled within 85 DEG C through infrared thermal imaging and finite element simulation. The TSV with the depth-to-width ratio of 10: 1 can be realized by adopting the Bosch process; a three-dimensional integrated TSV array supporting HBM and other high-speed memories is embedded into diamond or graphene heat dissipation columns, a low-heat-resistance vertical heat dissipation path is formed by combining a three-dimensional pure copper heat through hole network, and local hot spots are effectively dispersed; the high-thermal-conductivity epoxy molding compound and the embedded copper block enhance the overall mechanical strength and thermal diffusivity, so that the product can dissipate heat efficiently, and the overall area is not easy to influence.

The invention relates to the technical field of semiconductor packaging equipment, and discloses a mounting head, which comprises a mounting seat, a driving assembly, an elastic force control assembly and a suction nozzle assembly, the mounting base comprises a mounting plate, a first mounting frame, a second mounting frame and a third mounting frame, the side face of the mounting plate is fixedly connected with the first mounting frame, the first mounting frame is provided with a first avoiding hole penetrating along the first axis, and in the extending direction of the first axis, one end of the first mounting frame is fixedly connected with the third mounting frame; a second mounting frame is arranged on the side, away from the third mounting frame, of the first mounting frame, and the second mounting frame is inserted into the first receding hole and fixedly connected with the third mounting frame; wherein the driving assembly is fixedly connected to the second mounting frame, the elastic force control assembly is rotationally connected to the third mounting frame, the driving assembly is in transmission connection with the elastic force control assembly, the suction nozzle assembly is fixedly connected with the elastic force control assembly, and the mounting head of the structure is reasonable in load distribution and beneficial to guaranteeing the mounting precision and the product yield.

A semiconductor package may include a package substrate, a first interposer on the package substrate, a first semiconductor chip and a second semiconductor chip that are on the first interposer, a second interposer on the first semiconductor chip, a third semiconductor chip on the second interposer, and a first through via that extends into the first semiconductor chip and is between the first interposer and the second interposer.

The application relates to a semiconductor package failure detection method based on high harmonic amplitude-phase demodulation, and relates to the technical field of semiconductor package detection. The application is used to solve the problems existing in the prior art semiconductor package defect detection method. The application applies a current excitation to a measured semiconductor package to make the semiconductor package generate heat, and collects a thermal image sequence of the semiconductor package; a same-frequency quadrature reference signal of each harmonic of the thermal image sequence is synthesized according to the current excitation; a demodulation phase is extracted by using the same-frequency quadrature reference signal; a dominant path is extracted according to a fourth-order demodulation phase; the dominant path is verified according to a fifth-order and sixth-order demodulation phase; if the dominant path is verified to be correct, it is determined that the measured semiconductor package has a failure state corresponding to the dominant path; otherwise, the thermal image sequence of the measured semiconductor package is collected again for detection. The application is suitable for the fields of semiconductor package manufacturing and testing, quality and reliability control, failure analysis and the like.

The invention relates to the technical field of semiconductor packaging, and provides a vapor chamber, a heat dissipation cover and a packaging structure, and the vapor chamber comprises a housing which is provided with a vacuum inner cavity, the inner surface of the housing is provided with a first capillary layer, and the housing comprises a first bottom plate and a second bottom plate which are oppositely arranged; the supporting column is arranged in the vacuum inner cavity of the shell, the two ends of the supporting column are connected with a first bottom plate and a second bottom plate respectively, and a second annular capillary layer connected with the first capillary layer is arranged on the outer side face of the supporting column; the supporting column is provided with an inclined side wall, and the cross sectional area of the supporting column is gradually reduced from one side of the first bottom plate to one side of the second bottom plate; and the condensate is positioned in the vacuum inner cavity of the shell. The heat dissipation effect is better improved by arranging the supporting columns with the inclined side walls, and the cross sectional areas of the supporting columns are gradually reduced from one side of the first bottom plate to one side of the second bottom plate.

In an embodiment, a method includes forming a device layer along a substrate; forming a first interconnect structure over the device layer; forming a metal pad over the first interconnect structure; forming first bonding pads over and electrically connected to the first interconnect structure; and forming a second bonding pad over and electrically isolated from the first interconnect structure, in a plan view the first bonding pads comprising four corners of a frame around a portion of the second bonding pad.

The semiconductor device may include a substrate, a first insulating layer on a bottom surface of the substrate, an interconnection structure in the first insulating layer, a second insulating layer on a bottom surface of the first insulating layer, and a plurality of lower pads provided in the second insulating layer. Each lower pad may be provided such that a width of a top surface thereof is smaller than a width of a bottom surface thereof. The lower pads may include first, second, and third lower pads. In a plan view, the first and third lower pads may be adjacent to center and edge portions of the substrate, respectively, and the second lower pad may be disposed therebetween. A width of a bottom surface of the second lower pad may be smaller than that of the first lower pad and may be larger than that of the third lower pad.

A method for forming a semiconductor package includes providing a semiconductor chip containing a bond pad located on a top surface of the semiconductor chip, providing a carrier including a chip mounting pad and a landing pad, mounting the semiconductor chip onto the chip mounting pad with the bond pad facing away from the carrier, and attaching an electrical connecting element between the bond pad and the landing pad, wherein the bond pad is formed from nanowires.

A semiconductor package includes a first redistribution circuit structure, a semiconductor die, and an electrically conductive structure. The semiconductor die is disposed over and electrically coupled to the first redistribution circuit structure. The electrically conductive structure connects a non-active side of the semiconductor die to a conductive feature of the first redistribution circuit structure, where the semiconductor die is thermally coupled to the first redistribution circuit structure through the electrically conductive structure, and the electrically conductive structure includes a structure of multi-layer with different materials.

A semiconductor packaging device includes a packaging module, a heat dissipation cover and a thermal interface material layer. The package module includes a substrate, and a working chip mounted on the substrate. The heat dissipation cover includes a metal cover fixed on the substrate and covering the working chip, an accommodating recess located on the metal cover to accommodate the working chip, and a plurality of protrusive columns respectively formed on the metal cover and distributed within the accommodating recess at intervals. The depth of the accommodating recess is greater than the height of each protrusive column, and the accommodating recess is greater than the working chip. The thermal interface material layer is non-solid, and located within the accommodating recess between the protrusive columns to wrap the protrusive columns and contact with the working chip, the metal cover and the protrusive columns.

A semiconductor package includes first and second semiconductor dies on a buffer die. The first semiconductor die includes first memory blocks on a first semiconductor substrate, a first interlayer dielectric layer, a first through via penetrating the first semiconductor substrate and connected to the buffer die, and first conductive pads on the first interlayer dielectric layer and connected to the first memory blocks. The second semiconductor die includes first calculation blocks on a second semiconductor substrate and configured to calculate data received from the first memory blocks and store results to the first memory blocks, a second interlayer dielectric layer, and second conductive pads below the second interlayer dielectric layer and connected to the first calculation blocks. A top surface of the first interlayer dielectric layer contacts the second interlayer dielectric layer. The first conductive pads contact the second conductive pads.

A semiconductor package includes an interposer, a lower semiconductor chip located on the interposer and including a chip through via, lower stack structures located on the interposer and spaced apart from the lower semiconductor chip in a horizontal direction, a lower molding layer located on the interposer, a redistribution layer located on the lower molding layer, the lower semiconductor chip, and the lower stack structures and electrically connected to the chip through via of the lower semiconductor chip, an upper semiconductor chip located on the redistribution layer and electrically connected to the redistribution layer, upper stack structures spaced apart from the upper semiconductor chip in the horizontal direction, located on the redistribution layer, and electrically connected to the redistribution layer, and an upper molding layer located on the redistribution layer and on side surfaces of the upper semiconductor chip and side surfaces of each of the upper stack structures.

The utility model relates to a solder ball flattening device used for semiconductor packaging, comprising a lifting platen, the upper surface of the lifting platen is a smooth horizontal plane, and two sides of the lifting platen are respectively and symmetrically provided with ear parts; the heating device is fixedly arranged below the lifting table plate, and the heating device is used for heating the lifting table plate; and the two lead screw pairs are arranged on the two sides of the lifting table plate correspondingly, the lead screw pairs are located below the lug parts, the lead screw pairs can lift the height of the lifting table plate in the vertical direction through a driving motor, and the driving motor is fixedly arranged on the working table top.