422 results about "Solder ball" patented technology

The invention relates to the field of packaging substrates, in particular to a modular stacked substrate and a manufacturing method thereof. Comprising a first sub-packaging substrate and a second sub-packaging substrate; the first sub-packaging substrate and the second sub-packaging substrate are connected through a solder ball, and filling glue is arranged between the first sub-packaging substrate and the second sub-packaging substrate; the first sub-packaging substrate comprises a glass core plate, a circuit layer is arranged between the glass core plate and the surface of the first sub-packaging substrate, and the circuit layer is connected through a first metal column; the first sub-packaging substrate comprises a second metal column, the second metal column penetrates through the glass core plate to be connected with the circuit layer, and printing ink is injected into the second metal column. The yield of large-size substrates can be remarkably improved, and meanwhile the manufacturing cost is reduced. The shrinkage phenomenon caused by the state change after the material is pressed, heated and cooled in the pressing process is avoided, and the overall warping is avoided. The method can be applied to packaging of 2.5 D chips, and the technological level of large-size chips is greatly improved.

The invention provides a manufacturing method of a 3D packaging structure of an optical engine module and a CPO module, and relates to the technical field of semiconductor packaging. Firstly, an optical chip wafer is provided, then an electric chip and an optical port protection piece are mounted on the basis of the surface of the optical chip wafer, plastic packaging is carried out on the basis of the upper portion of the optical chip wafer, the electric chip and the optical port protection piece are wrapped by plastic packaging materials, and then the plastic packaging materials are thinned until the optical chip and the optical port protection piece are exposed; the method comprises the following steps: manufacturing a TSV through hole on the basis of an optical chip wafer, thinning the bottom surface of the optical chip wafer until the TSV through hole is exposed, manufacturing an RDL layer and a solder ball on the basis of the bottom surface of the optical chip wafer, connecting the RDL layer with the TSV through hole, removing an optical port protection piece, and finally cutting the optical chip wafer to form a single optical engine module. According to the scheme provided by the invention, the optical chip is prevented from being damaged in the packaging process, and the design flexibility of the optical port is improved.

The utility model relates to a solder ball flattening device used for semiconductor packaging, comprising a lifting platen, the upper surface of the lifting platen is a smooth horizontal plane, and two sides of the lifting platen are respectively and symmetrically provided with ear parts; the heating device is fixedly arranged below the lifting table plate, and the heating device is used for heating the lifting table plate; and the two lead screw pairs are arranged on the two sides of the lifting table plate correspondingly, the lead screw pairs are located below the lug parts, the lead screw pairs can lift the height of the lifting table plate in the vertical direction through a driving motor, and the driving motor is fixedly arranged on the working table top.

A solder alloy consisting of Ag: 3.1 to 4.0% by mass, Cu: 0.6 to 0.8% by mass, Bi: 1.5 to 5.5% by mass, Sb: 1.0 to 6.0% by mass, Co: 0.001 to 0.030% by mass, Fe: 0.02 to 0.05% by mass, As: 0.002 to 0.250% by mass, and a balance Sn.

An electronic device including an IC having a package interconnect including a pillar and a solder cap coupled to a bottom surface of the pillar to reduce the height of the IC package. The IC package includes a substrate comprising an outer metallization layer having a metal pad and a package mold layer adjacent to the outer metallization layer. The pillar has a top surface and a bottom surface. The pillar extends through the package mold layer with the top surface coupled to the metal pad and the bottom surface coupled to the solder cap. In contrast to conventional package interconnects, such as ball grid arrays (BGA), for example, deploying the solder cap on the bottom surface of the pillar advantageously results in using less solder and tighter pitch between adjacent package interconnects because the width of the pillar is less than a solder ball in a BGA.

The invention discloses a three-dimensional stacked multi-channel radio frequency module based on a mixed ceramic material, and relates to the technical field of microelectronic packaging. The invention relates to a radio frequency module which comprises an HTCC tube shell and a DPC tube shell which are arranged in an overlapped mode, the interior of the HTCC tube shell is divided into at least two independent cavities used for installing radio frequency chips through a metal enclosure frame, a control and power supply chip is installed in the DPC tube shell, and a solder ball array is further arranged on the lower surface of the DPC tube shell; the three-dimensional stacked packaging structure further comprises a radio frequency vertical interconnection piece, the radio frequency vertical interconnection piece is vertically arranged in the DPC tube shell and extends upwards, and the HTCC tube shell and the DPC tube shell are fixedly connected through the radio frequency vertical interconnection piece to form the three-dimensional stacked packaging structure. The invention provides a three-dimensional stacked multi-channel radio frequency module based on a mixed ceramic material, which can significantly reduce the overall packaging cost and complexity through heterogeneous material integration and three-dimensional stacking on the premise of ensuring high-efficiency heat dissipation and high channel isolation of a high-power radio frequency chip. And the multi-channel radio frequency SiP packaging with high performance, miniaturization and low cost is realized.

Provided are a solder alloy, a solder paste, a solder ball, and a solder joint which have a low melting point, are excellent in ductility, shear strength, and heat cycle resistance, further suppress the occurrence of open defects, and in addition, have reduced residual voids even at the time of joining in a large area. A solder alloy has an alloy composition of, by mass %, Bi: 35.0 to 68.0%, Sb: 0.1 to 2.0%, Ni: 0.010 to 0.050%, Ge: 0.007 to 0.090%, with the balance being Sn. Preferably, the alloy composition further contains, by mass %, at least one of Co, Ti, Al, Mn, As, Fe, Pd, Zn, Zr, Pb, In, Ce, P, and Ga: 0.1% or less in total. Further, this solder alloy can be suitably used for solder pastes, solder balls, and solder joints.

A double-sided partially molded SIP module. A semiconductor device has a substrate and a first component disposed above a first surface of the substrate. A connector is disposed above the first surface of the substrate. A first sealant is deposited above the first component, while the connector remains outside the first sealant. A shielding layer is formed above the first sealant, while the connector remains outside the shielding layer. A second component is disposed above a second surface of the substrate. Solder bumps are disposed above the second surface of the substrate. A second sealant is deposited above the second surface of the substrate. An opening is formed through the second sealant to expose the solder bumps. Solder balls are disposed in the openings. The solder balls and solder bumps are reflowed to form a combined solder bump.

The present invention employs a lead-free and antimony-free solder alloy which has an alloy composition that contains from 1.0% by mass to 4.0% by mass of Ag, from 0.1% by mass to 1.0% by mass of Cu, from 0.1% by mass to 9.0% by mass of Bi, from 0.005% by mass to 0.3% by mass of Ni and from 0.001% by mass to 0.015% by mass of Ge, with the balance being made up of Sn.

The application relates to a method for improving the thermal fatigue resistance of a lead-free solder interconnection BGA package joint, and relates to the field of electronic packaging welding. The surface of a PCB substrate is processed by superfast laser to have a well-shaped micro-nano structure, the well-shaped micro-nano structure is a grid-shaped straight-line groove microstructure formed by a plurality of transverse parallel lines and a plurality of longitudinal parallel lines, the adjacent interval between the plurality of transverse parallel lines and the plurality of longitudinal parallel lines is 80-120 mu m, the groove width is 10-20 mu m, the groove depth is about 30-50 um, the groove parameters are adjusted by adjusting the superfast laser processing parameters, and a large number of micro-particles are covered on the inside and around the groove; the solder ball is planted on a bare chip through a heating plate, and the chip and the processed PCB substrate are welded and packaged through a hot air welding machine. The specific surface area and structural richness of the surface are improved, and the problems of poor thermal fatigue resistance and poor durability of the existing BGA package joint can be solved.

Provided is a component with solder bumps comprising: a substrate; and a plurality of electrodes positioned on the substrate and having solder bumps. In some of the electrodes, the solder bumps are high bumps having a solder base part formed on the electrode surface and a solder protruding part formed on the solder base part surface, and in the remaining electrodes, the solder bumps are small bumps having a solder base part formed on the electrode surface.

The invention discloses a semiconductor packaging method, which comprises the following steps of: preparing a wafer or a chip with a first rewiring layer; mounting a wafer or a chip, or the wafer or the chip and a support material on a carrier plate, carrying out plastic packaging, removing the carrier plate, and exposing the first rewiring layer; manufacturing a second rewiring layer, an electroplating metal circuit layer and a supporting frame on the first rewiring layer; and after a plurality of rewiring layers are manufactured as required, electroplating a lead frame or manufacturing solder ball bumps, and finally cutting into single packaging bodies. According to the invention, the solid support material with high modulus and low thermal expansion coefficient is embedded in the second rewiring layer, so that a local stress suppression skeleton is constructed in the packaging structure, and free shrinkage and expansion of the polymer dielectric layer in the subsequent thermal process are effectively restrained. Therefore, thermal stress generated by mismatch of thermal expansion coefficients is greatly offset, the overall bending deformation of the packaging body is fundamentally inhibited from the interior of the structure, and the overall rigidity and the anti-warping capability of the packaging body are improved.

The invention provides an alloy solder and a solder ball. The alloy solder comprises the following components in percentage by weight: 1.0 to 5.0 weight percent of silver, 0.01 to 1.0 weight percent of copper, 0.01 to 1.0 weight percent of nickel, 0.005 to 0.015 weight percent of germanium, 0.05 to 1 weight percent of bismuth, 0.01 to 1.0 weight percent of indium and the balance of tin. The silver can significantly improve the heat-resistant cycle performance and adjust the melting point characteristic. The copper can improve the wettability of the alloy. Nickel can restrain overgrowth of intermetallic compounds on a welding spot interface, and the mechanical reliability of the welding spot is improved. And germanium can improve the oxidation resistance. Bismuth can maintain high shearing force, and meanwhile, the tensile strength and the yield strength of a welding spot are remarkably improved. The indium can improve the toughness of the solder and the binding force of the interface IMC. According to the alloy solder, the alloy variety and content are controlled within the range, and the heat-resistant cycle performance and reliability of the alloy solder can be improved.

The application provides a solder ball coating method and device and a semiconductor packaging production line, relates to the field of solder ball surface coating, and is used for solving the problems of mechanical contact, surface damage, pollution introduction, incomplete coating and uneven thickness during solder ball surface coating. The solder ball coating method comprises the following steps: generating an ultrasonic standing wave field; placing a solder ball to be processed at a standing wave node position of the ultrasonic standing wave field, so that the acoustic radiation force generated by the standing wave node position can make the solder ball to be processed suspended in a non-contact state; feeding an organic coating material into the standing wave node position; and making the organic coating material deposited on the surface of the solder ball to be processed to form an organic coating. By constructing the ultrasonic standing wave field, the solder ball to be processed is suspended at the standing wave node by the acoustic radiation force, the organic coating material is coated in the suspended state, the collision friction and impurity pollution are reduced, the coating completeness and uniformity of the solder ball surface are improved, and the subsequent welding reliability and packaging yield are improved.

The utility model provides a mortise and tenon packaging structure capable of enhancing heat dissipation performance. The mortise and tenon packaging structure comprises a substrate, a chip, a thermal interface material and a heat dissipation cover, the chip is welded and packaged with the substrate through a welding ball on the substrate, the lower surface of the heat dissipation cover is connected with the chip through the thermal interface material, and the edge position of the heat dissipation cover is connected with the substrate through an adhesive; a tenon is formed on the first surface of the thermal interface material, and a mortise groove matched with the tenon is formed in the second surface of the heat dissipation cover; or, a mortise groove is formed in the first surface of the thermal interface material, and a tenon is formed on the second surface of the heat dissipation cover; the mortise groove and the tenon are embedded with each other, so that the contact area of the thermal interface material and the heat dissipation cover is increased, warping of the heat dissipation cover is inhibited, layering of the heat dissipation cover and the thermal interface material is reduced, and the reliability of the device is improved.

Microelectronic assemblies with a die stack positioned such that a face of each die in the stack is orthogonal to a face of a base are disclosed. Each die has a first face and a second face opposite the first face. The die stack includes multiple dies, with the faces of each die parallel to the faces of the other dies in the die stack. The die stack is positioned on the base such that the faces of each die are substantially orthogonal to the face of the base. Each die in the die stack can have a corresponding conductive contact, and the conductive contact on each die in the die stack can be coupled to a conductive contact on the base via an interconnect. The interconnect can be a solder joint, such as a solder bump or solder ball.

An auxiliary system for an electronic packaging device, comprising a ball feed mechanism, a ball feed assembly (400), and auxiliary tooling, wherein the ball feed assembly (400) is disposed above the ball feed mechanism, and the ball feed assembly (400) delivers a target component to a placement site of the ball feed mechanism; the auxiliary tooling comprises a pressure assembly disposed on each of a leading side and a trailing side of the ball feed assembly relative to a direction of motion thereof. While the ball feed assembly (400) is in motion, the pressure assembly on the leading side of the ball feed assembly (400) presses downward to exert pressure on the ball feed mechanism, while the pressure assembly on the side of the ball feed assembly (400) opposite to the direction of motion is raised. During a ball spreading process, the pressure assembly on the leading side of the ball feed assembly (400) is driven by a cylinder (652) to descend and press a solder ball stencil (200), while the pressure assembly on the side opposite to the direction of motion is driven by the cylinder (652) to rise and separate from the solder ball stencil (200), so that the solder ball stencil (200) at the placement site is in flush contact with a substrate, thereby ensuring solder balls are properly seated in apertures of the solder ball stencil (200), and therefore improving ball placement yield.

The present invention provides solder alloys, solder pastes, solder balls, solder preforms, and solder joints that have excellent resistance to drop impact and heat cycling, suppress the occurrence of chipping, bridging, and icicle formation, and also suppress the occurrence of electromigration. [Solution] The solder alloy has an alloy composition consisting of, by mass%, Ag: 0.3~1.9%, Cu: 0.40~1.00%, Bi: 0.5~4.9%, P: 0.00100~0.02000%, and the remainder being Sn. The alloy composition may further contain Ge, Co, and Ga in amounts of 0.06% or less by mass, and at least one of each. The alloy composition may also further contain As, In, Zr, Mn, Ti, Zn, Fe, Al, Ni, Au, Mg, Cr, and Pt in amounts of 0.06% or less by mass, and at least one of each.

The present description concerns a method of manufacturing an ultrasonic device comprising an electronic circuit and an electroacoustic component, the method comprising the forming of first connection pads bonded to a plate comprising one electroacoustic component or a plurality thereof, the forming of solder balls on the first pads, the melting of the solder balls so that they adhere to the first pads, optionally the cutting of the plate to separate the electroacoustic components, the forming of second connection pads bonded to the electronic circuit, the application of the electroacoustic component to the electronic circuit so that the solder balls come into contact with the second pads, and the melting of the solder balls so that they adhere to the first pads and to the second pads.

The application provides a wafer-level surface acoustic wave filter and a radio frequency module chip, and the wafer-level surface acoustic wave filter comprises a substrate, a finger assembly, a dam, a cover plate, a metal column, a metal common ground layer and a solder ball, wherein the finger assembly comprises fingers, bus bars and metal plates formed on the substrate by photoetching and silk printing; the dam is fixed to the substrate; the cover plate is arranged on the dam and is provided with a plurality of through holes; the metal column is fixed to the substrate and is inserted into a corresponding through hole; the metal common ground layer is arranged on the side of the cover plate away from the finger assembly, and part of the metal columns are electrically connected with the metal common ground layer to form a common ground signal end, and the other part of the metal columns are insulated from the metal common ground layer to form a signal input end and a signal output end; and the solder ball is arranged on the end of each metal column away from the substrate. The wafer-level surface acoustic wave filter has simple structure, good wear resistance and high WLP packaging reliability.

The application discloses a kind of ball grid array package chip solder ball bubble defect automatic detection method and system, it is related to chip intelligent detection technical field, the method is guided by designing semantic cross-layer fusion framework, realizes multi-scale feature balanced fusion in neck network by introducing feature alignment and redistribution module, strengthens small target details and semantic information using local semantic enhancement module, and the positioning accuracy of bubble is optimized in combination with smooth geometry positioning loss function.The application significantly improves the detection capability of small, fuzzy and occluded bubbles, has strong robustness and generalization, and can be widely used in solder ball bubble, material porosity and surface defect industrial vision detection scene.

This method for manufacturing a circuit member with a solder bump includes: a deposition step S02 for depositing a solder layer 11 onto a region, including a peak surface 3a of a pillar 3, on one surface of a substrate 2 on which the electroconductive pillar 3 is provided; a reduction step S03 for reducing the solder layer 11 under an atmosphere of a reducing gas and forming a solder bump 4 on the peak surface 3a of the pillar 3; a removal step S04 for removing an excess solder layer 12 remaining on the one surface of the substrate 2 after the reduction step; and a re-reduction step S05 for re-reducing the solder bump 4 on the peak surface 3a of the pillar 3 under an atmosphere of a reducing gas, and forming, on an interface between the pillar 3 and the solder bump 4, an alloy layer 6 composed of a constituent material of the pillar 3 and a constituent material of the solder bump 4.

A stacked transistor arrangement and process of manufacture thereof are provided. Switched electrodes of first and second transistor chips are accessible on opposite sides of the first and second transistor chips. The first and second transistor chips are stacked one on top of the other. Switched electrodes of adjacent sides of the transistor chips are coupled together by a conductive layer positioned between the first and second transistor chips. Switched electrodes on sides of the first transistor chip and the second transistor chip that are opposite the adjacent sides are coupled to a lead frame by bond wires or solder bumps.

The utility model relates to a chip test carrier and chip test equipment. The chip test carrier comprises a base, an accommodating groove, a test needle and a ventilation groove, the containing groove is located in the base, a groove opening of the containing groove is located in the top face of the base, the testing needle is fixed in the containing groove, and the first end of the testing needle protrudes out of the bottom face of the containing groove. When the to-be-tested chip is placed in the accommodating groove, the first end of the test pin is electrically connected with a solder ball of the to-be-tested chip. The ventilation groove is located in the side, provided with the containing groove, of the base and comprises a first opening, a second opening and a third opening, the first opening is located in the top face of the base, the second opening is located in the side face of the base, the third opening is located in the groove wall of the containing groove, the second opening and the third opening are opposite in position, and the ventilation groove is communicated with the containing groove through the third opening. According to the technical scheme, the heat dissipation structure of the chip test carrier can be improved, the heat accumulation effect of the solder ball end during chip test can be avoided, and the ball melting phenomenon during chip test can be avoided.

The present invention relates to a radiation-resistant packaging structure and a method for manufacturing same. The structure comprises: a first redistribution layer; a protective layer disposed below the first redistribution layer; metal pillars disposed above the first redistribution layer; a processor chip module disposed above the first redistribution layer; a protective cover covering the processor chip module; a molding layer that molds and encapsulates the metal pillars, the processor chip module and the protective cover; a second redistribution layer disposed above the molding layer; a detector chip module disposed above the second redistribution layer; and solder balls. In the radiation-resistant packaging structure provided by the present invention, the protective cover is disposed above the processor chip module, and the protective layer is disposed below the processor chip module, thereby providing three-dimensional protection for the processor chip module, such that external radiation to the processor chip module can be effectively reduced and the service life of the packaging structure is prolonged.

A method for forming a plurality of solder contact pins (7) on a contact pad layout of a substrate (6) is provided, wherein the contact pad layout comprises a plurality of contact pads (5), comprising the steps of: a) arranging a plurality of first solder balls (2) at a plurality of arrangement positions of an arrangement layout of a transport tool (1), wherein the arrangement layout of the transport tool (1) corresponds to the contact pad layout of the substrate (6), b) placing the transport tool (1) opposite the substrate (6) such that the plurality of first solder balls (2) is associated with the plurality of contact pads (5), c) placing the plurality of first solder balls (2) on the plurality of contact pads (5), d) melting the plurality of first solder balls (2) and releasing the plurality of first solder balls (2) from the transport tool (1) onto the plurality of contact pads (5), such that a plurality of solder balls (2a) is formed on the plurality of contact pads (5).e) Retracting the transport tool (1) from the substrate (6), f) Arranging a plurality of second solder balls (3) at the arrangement positions of the arrangement layout of the transport tool (1), g) Positioning the transport tool (1) opposite the substrate (6) such that the plurality of second solder balls (3) is associated with the plurality of solder bumps (2a), h) Placing the plurality of second solder balls (3) onto the plurality of solder bumps (2a), i) Melting the plurality of second solder balls (3) and releasing the plurality of second solder balls (3) from the transport tool (1) onto the plurality of solder bumps (2a) such that a plurality of monolithic solder contact pins (7) is formed on the plurality of contact pads (5), and j) Retracting the transport tool (1) from the substrate (6).

The solder ball welding device with the cleaning structure comprises a bottom plate, a welding table, a supporting frame and a welding mechanism, an air blower is fixedly installed on the top of the supporting frame, the output end of the air blower is communicated with a ventilation pipe, the other end of the ventilation pipe is connected with the top of the welding table, and the welding table is fixedly installed on the bottom plate. And collecting hoppers are fixedly connected to the left side and the right side of the welding table. By arranging the air blower, the ventilating pipe and the collecting hopper, generated wind power can be conveyed to the top of the welding table through the ventilating pipe by starting the air blower, so that scraps generated by solder ball welding can be blown to the interior of the collecting hopper, and the problem that the device is not provided with a cleaning structure and cannot be cleaned easily is solved. The problems that when an existing solder ball welding device conducts welding work, if the temperature is too high or the welding time is long, small solder balls or chippings are inevitably generated, and manual cleaning is troublesome, and the working efficiency is reduced are solved, and the effect of facilitating cleaning is achieved.

The present application relates to the technical field of tin ball manufacturing, and discloses an upper die and a lower die matched with the upper die, the upper die comprises a press block capable of moving up and down, a plurality of support rods are connected below the press block, a feeding plug is connected below the support rods, a feeding hole is formed on the feeding plug, the feeding plug is embedded in the center of the upper die-casting module, the lower die comprises a die base plate, a lower die-casting module is arranged at the center of the die base plate, the feeding plug is also embedded in the center of the lower die-casting module, and a feeding port is formed at the bottom center of the die base plate, the feeding port is communicated with the feeding channel of the feeding plug. The device can directly die-cast tin ball products through the press block, the lower die-casting module, the upper die-casting module, the feeding path in the die-casting die and the tin ball die, and the whole upper die-casting module can be matched without gap during die-casting cooperation, so that the oxidation of tin balls during die-casting can be effectively reduced.

A semiconductor package includes a package substrate, a semiconductor chip on a first surface of the package substrate, a molding member on the first surface of the package substrate and covering the semiconductor chip, and solder ball structures on a second surface of the package substrate, the second surface of the package substrate being opposite the first surface of the package substrate, each of the solder ball structures including a first solder ball and a second solder ball, wherein the first solder ball has a first melting temperature and contacts a lower substrate pad on the second surface of the package substrate, and wherein the second solder ball has a second melting temperature lower than the first melting temperature and contacts at least a portion of a surface of the first solder ball.

A semiconductor package includes a partitioned package substrate that is composed of multiple discrete substrates arranged in a side-by-side manner. The discrete substrates include a central substrate and peripheral substrates surrounding the central substrate. At least one integrated circuit die is mounted on a first surface of the partitioned package substrate. A plurality of solder balls is mounted on a second surface of the partitioned package substrate opposite to the first surface.