3076results about "Stacked capacitors" patented technology

An electrical-energy-storage unit (EESU) has as a basis material a high-permittivity composition-modified barium titanate ceramic powder. This powder is double coated with the first coating being aluminum oxide and the second coating calcium magnesium aluminosilicate glass. The components of the EESU are manufactured with the use of classical ceramic fabrication techniques which include screen printing alternating multilayers of nickel electrodes and high-permittivitiy composition-modified barium titanate powder, sintering to a closed-pore porous body, followed by hot-isostatic pressing to a void-free body. The components are configured into a multilayer array with the use of a solder-bump technique as the enabling technology so as to provide a parallel configuration of components that has the capability to store electrical energy in the range of 52 kW·h. The total weight of an EESU with this range of electrical energy storage is about 336 pounds.

Improved termination features for multilayer electronic components are disclosed. Monolithic components are provided with plated terminations whereby the need for typical thick-film termination stripes is eliminated or greatly simplified. Such termination technology eliminates many typical termination problems and enables a higher number of terminations with finer pitch, which may be especially beneficial on smaller electronic components. The subject plated terminations are guided and anchored by exposed internal electrode tabs and additional anchor tab portions which may optionally extend to the cover layers of a multilayer component. Such anchor tabs may be positioned internally or externally relative to a chip structure to nucleate additional metallized plating material. External anchor tabs positioned on one or both of top and bottom surfaces of a monolithic structure can facilitate the formation of selective wrap-around plated terminations. The disclosed technology may be utilized with a plurality of monolithic multilayer components, including interdigitated capacitors, multilayer capacitor arrays, and integrated passive components. A variety of different plating techniques and termination materials may be employed in the formation of the subject self-determining plated terminations.

In a multilayer capacitor, a first dielectric layered product including a first body principal face is formed to be thicker than a second dielectric layered product including a second body principal face in a stacking direction thereof. A first external electrode and a second external electrode extend only to the first body principal face from a first body end face and a second body end face. Alternatively, the first external electrode and the second external electrode extend at least to the first body principal face from the first body end face and the second body end face and extend also to at least one of the second body principal face, a first body lateral face, and a second body lateral face.

First and second external terminal electrodes are formed on the same principal surface of a capacitor main body. The connection between first internal electrodes in the capacitor main body, the first external terminal electrode and the mutual connection between the plurality of first internal electrodes is achieved by a first connection portion. The connection between second internal electrodes, the second external terminal electrode and the mutual connection between the plurality of second internal electrodes is achieved by a second connection portion. The first and second connection portions are arranged alternately. Currents flow through the connection portions in opposite directions with the result that components of magnetic flux generated by such currents are cancelled and the ESL is reduced.

A multilayer electronic component includes a plurality of dielectric layers interleaved with a plurality of internal electrodes. Internal and/or external anchor tabs may also be selectively interleaved with the dielectric layers. Portions of the internal electrodes and anchor tabs are exposed along the periphery of the electronic component in respective groups. Each exposed portion is within a predetermined distance from other exposed portions in a given group such that termination structures may be formed by deposition and controlled bridging of a thin-film plated material among selected of the exposed internal conductive elements. Electrolytic plating may be employed in conjunction with optional cleaning and annealing steps to form directly plated portions of copper, nickel or other conductive material. Once an initial thin-film metal is directly plated to a component periphery, additional portions of different materials may be plated thereon.

A laminate is prepared in which adjacent internal electrodes are electrically insulated from each other at an end surface at which the internal electrodes are exposed, a space between the adjacent internal electrodes, which is measured in the thickness direction of insulating layers, is about 10 μm or less, and a withdrawn distance of the adjacent internal electrodes from the end surface is about 1 μm or less. In an electroplating step, electroplating deposits deposited on the ends of the adjacent internal electrodes are grown so as to be connected to each other.

A high energy density, high power density capacitor having an energy density of at least about 0.5 J/cm3 is provided. The capacitor comprises a plurality of interleaved metal electrode layers separated by a polymer layer. The interleaved metal electrode layers terminate at opposite ends in a solder termination strip. The high energy density aspect of the capacitors of the invention is achieved by at least one of the following features: (a) the dielectric thickness between the interleaved metal electrode layers is a maximum of about 5 mu m; (b) the polymer is designed with a high dielectric constant kappa of at least about 3.5; (c) the metal electrode layers within the polymer layer are recessed along edges orthogonal to the solder termination strips to prevent arcing between the metal electrode layers at the edges; and (d) the resistivity of the metal electrode layers is within the range of about 10 to 500 ohms per square, or a corresponding thickness of about 200 to 30 ANGSTROM .

A laminated body is prepared, in which at an end surface at which internal electrodes are exposed, the internal electrodes disposed adjacently are electrically isolated from each other, and a distance between the internal electrodes disposed adjacently is about 20 μm or less when measured along the thickness direction of an insulator layer, and a withdrawn-depth of the internal electrodes is about 1 μm or less when measured from the end surface. In a step of electroless plating, plating deposits formed at the end portions of the plurality of internal electrodes are increased in size so as to be connected to each other.

A multilayer ceramic capacitor includes a laminated body and first and second external electrodes respectively on both end surfaces of the laminated body. When regions where first internal electrodes or second internal electrodes are not present are regarded as side margin portions in a cross section of the laminated body as viewed from the laminating direction, the side margin portions include multiple side margin layers, and the content of Si in the side margin layer closest to the internal electrode is lower than that in the side margin layer other than the side margin layer closest to the internal electrode.

An elevated feedthrough is attachable to a top or a side of an active implantable medical device. The feedthrough includes a conductive ferrule and a dielectric substrate. The dielectric substrate is defined as comprising a body fluid side and a device side disposed within the conductive ferrule. The dielectric substrate includes a body fluid side elevated portion generally raised above the conductive ferrule. At least one via hole is disposed through the dielectric substrate from the body fluid side to the device side. A conductive fill is disposed within the at least one via hole forming a hermetic seal and electrically conductive between the body fluid side and the device side. A leadwire connection feature is on the body fluid side electrically coupled to the conductive fill and disposed adjacent to the elevated portion of the dielectric substrate.

High-temperature, multiple-layer polymer (MLP) capacitors with a stacked electrode arrangement are disclosed. The capacitor electrodes are separated by a polymer dielectric that is stable at high temperatures. In some embodiments, the polymer dielectric also has a high permittivity and is filled with high-permittivity nanoparticles, which enables the capacitor to achieve a very high capacitance density.

A dielectric capacitor is provided which has a reduced leakage current. The surface of a first electrode (38) of the capacitor is electropolished and a dielectric film (40) and a second electrode (37) are successively laminated on it. The convex parts pointed end (38a) existing on the surface of the first electrode is very finely polished uniformly by dissolving according to electropolishing, a spherical curved surface in which the radius of curvature has been enlarged is formed, and the surface of the first electrode is flattened. Therefore, concentration of electrolysis can be prevented during the operation at the interface of the first electrode and the dielectric film, and the leakage current can be reduced considerably.

An electrical-energy-storage unit (EESU) has as a basis material a high-permittivity composition-modified barium titanate ceramic powder. This powder is single coated with aluminum oxide and then immersed in a matrix of poly(ethylene terephthalate) (PET) plastic for use in screen-printing systems. The ink that is used to process the powders via screen-printing is based on a nitrocellulose resin that provide a binder burnout, sintering, and hot isostatic pressing temperatures that are allowed by the PET plastic. These lower temperatures that are in the range of 40° C. to 150° C. also allows aluminum powder to be used for the electrode material. The components of the EESU are manufactured with the use of conventional ceramic and plastic fabrication techniques which include screen printing alternating multilayers of aluminum electrodes and high-permittivity composition-modified barium titanate powder, sintering to a closed-pore porous body, followed by hot-isostatic pressing to a void-free body. The 31,351 components are configured into a multilayer array with the use of a solder-bump technique as the enabling technology so as to provide a parallel configuration of components that has the capability to store at least 52.22 kW·h of electrical energy. The total weight of an EESU with this amount of electrical energy storage is 281.56 pounds including the box, connectors, and associated hardware.

The present invention relates to an interposer substrate for interconnecting between active electronic componentry such as but not limited to a single or multiple integrated circuit chips in either a single or a combination and elements that could comprise of a mounting substrate, substrate module, a printed circuit board, integrated circuit chips or other substrates containing conductive energy pathways that service an energy utilizing load and leading to and from an energy source. The interposer will also possess a multi-layer, universal multi-functional, common conductive shield structure with conductive pathways for energy and EMI conditioning and protection that also comprise a commonly shared and centrally positioned conductive pathway or electrode of the structure that can simultaneously shield and allow smooth energy interaction between grouped and energized conductive pathway electrodes containing a circuit architecture for energy conditioning as it relates to integrated circuit device packaging. The invention can be employed between an active electronic component and a multilayer circuit card. A method for making the interposer is not presented and can be varied to the individual or proprietary construction methodologies that exist or will be developed.

A capacitor comprising: a capacitor body including a plurality of laminated dielectric layers, a plurality of inner electrode layers which are respectively disposed between mutually adjacent ones of the dielectric layers, a first main surface located in a laminated direction of the dielectric layers, and a second main surface opposite to the first main surface; a first outer electrode formed on the first main surface of the capacitor body and electrically connected to the inner electrode layers; a second outer electrode formed on the second main surface of the capacitor body and electrically connected to the inner electrode layers; a first dummy electrode formed on the first main surface of the capacitor body; and a second dummy electrode formed on the second main surface of the capacitor body.

Multilayer capacitors incorporate both low inductance (ESL) and controlled Equivalent Series Resistance (ESR) features into a cost-effective unitary device. Internal electrode patterns generally include one or more pairs of mother electrodes adapted for external connection (e.g., to a circuit, another electrical component, circuit board, or other mounting environment), and multiple pairs of daughter electrodes adapted only for internal connection to other electrodes (e.g., other daughter electrodes and/or selected mother electrodes) without direct connection to an external circuit. Mother and daughter electrodes are interdigitated with electrode tab features, where daughter electrodes have internal-connection tabs, and mother electrodes have both internal-connection tabs and circuit-connection tabs, all of which are connected to respective internal-connection or circuit-connection terminals. ESR is increased by the parallel connection between mother and daughter electrodes as well as other optional features such as but not limited to resistive terminations, resistive connectors, serpentine terminations and increased current path lengths.

An electronic component structure is proposed, wherein an interposer thin film capacitor structure is employed between an active electronic component and a multilayer circuit card. A method for making the interposer thin film capacitor is also proposed. In order to eliminate fatal electrical shorts in the overlying thin film regions that arise from pits, voids, or undulations on the substrate surface, a thick first metal layer, on the order of 0.5-10 mu m thick, is deposited on the substrate upon which the remaining thin films, including a dielectric film and second metal layer, are then applied. The first metal layer includes of Pt or other electrode metal, or a combination of Pt, Cr, and Cu metals, and a diffusion barrier layer. Additional Ti layers may be employed for adhesion enhancement. The thickness of the first metal layers are approximately: 200 A for the Cr layer; 0.5-10 mu m for the Cu layer; 1000 A-5000 A for the diffusion barrier; and 100 A-2500 A for a Pt layer.

A multilayered high performance capacitor formed of two or more conductors with a dielectric layer and one or more a dielectric-conductor interface layer sandwiched in between the conductors. The capacitor may be fabricated using many thin layers, at the nano level, providing a nanocapacitor. The capacitor may employ an interleaved structured where numerous conductor layers are interleaved with other conductor layers. The dielectric layers may be multilayered or a single layer and may consist of materials with high dielectric constants ranging from 800 to over 1 million, including materials in the perovskite-oxide family. The capacitor can be shaped, sized and the appropriate materials selected to obtain breakdown voltages within the range of 0.1 to over 11 MV/cm and to obtain specific energies and energy densities equivalent to or exceeding the power characteristics of known capacitors, fuel cells, and batteries. The nanocapacitor may be combined with other nanocapacitors to form stacks, packs, or grids of cells where the cells may be connected in series, parallel or both to provide increased energy or power characteristics

The invention relates to a thin film capacitor with a carrier substrate, at least two interdigitated electrodes, and a dielectric. A staggered arrangement of at least one interdigitated electrode below the dielectric with respect to an interdigitated electrode above the dielectric results in a breakdown-resistant thin film capacitor which can be manufactured in the same production process as a standard monolayer capacitor.

In order to provide a built-in capacitor type wiring board capable of preventing misalignment of the capacitor, a capacitor built-in type wiring board is provided which includes a core board; a multilayer portion disposed on at least one side of the core board and formed by a plurality of interlayer insulating layers; and a plurality of conductor layers alternately laminated on the core board. The capacitor is of a chip-like shape with first and second main surfaces and includes a dielectric layer; electrode layers laminated on the dielectric layer; and a hole portion opening at least at the second main surface. The capacitor is embedded in the interlayer insulating layers so that the second main surface faces the core board.

A multilayer ceramic capacitor includes flat-shaped inner electrodes that are laminated. An interposer includes an insulating substrate that is larger than contours of the multilayer ceramic capacitor. A first mounting electrode that mounts the multilayer ceramic capacitor is located on a first principal surface of the insulating substrate, and a first external connection electrode for connection to an external circuit board located on a second principal surface. The multilayer ceramic capacitor is mounted onto the interposer in such a way that the principal surfaces of the inner electrodes are parallel or substantially parallel to the principal surface of the interposer, that is, the first and second principal surfaces of the insulating substrate.

A bismuth sodium titanate (Bi_0.5Na_0.5TiO₃) base material is modified by the partial substitution of aliovalent A-site cations such as barium (as BaO) or strontium (as SrO), as well as certain b-site donor/acceptor dopants and sintering aids to form a multi-phase system, much like known “core/shell” X7R dielectrics based solely on BaTiO₃. The resulting ceramic dielectric composition is particularly suitable for producing a multilayer ceramic capacitor (10) that maintains high dielectric constant (and thus the capability of maintaining high capacitance) over a broad temperature range of from about 150° C. to about 300° C. Such capacitors (10) are appropriate for high temperature power electronics applications in fields such as down-hole oil and gas well drilling.

An improved manufacturing and packaging process for optimizing the size of various implanted medical devices is disclosed. Specifically, complex shapes involving ceramic capacitors with various other shapes are manufactured to optimize fit and shapes within the device housing. The manufacturing process includes various techniques and electrode material selections, including manufacturing processes that enable high energy discharge capacitors to be made in compliant shapes to fit in small ICD footprints.

This invention provides a method to make core-shell structured dielectric particles which consist of a conductive core and at least one layer of insulating dielectric shell for the application of multilayer ceramic capacitors (MLCC). The use of said core-shell instead of conventionally solid dielectric particles as the capacitor's active layers simplifies the MLCC manufacturing processes and effectively improves the MLCC properties. In particular, the use of core-shell particles with a thin shell of high permittivity dielectric material improves the capacitance volumetric efficiency, and the use of core-shell particles with a thick shell of dielectric will improve capacitor device's energy storage capacity as the results of improved electrical and mechanical strength.

In a sintered ceramic body including side gap portions arranged between sides of first and second internal electrodes and first and second side surfaces of the sintered ceramic body and between sides of the effective layer portion and the first and second side surfaces of the sintered ceramic body, regions of the side gap portions at least adjacent to the first and second internal electrodes are Mg-rich regions each having a Mg concentration greater than that of the effective layer portion.

There is provided a multilayer ceramic capacitor including: a ceramic body; first and second internal electrodes including respective lead-out portions having an overlapping area, the overlapping area being exposed to one surface of the ceramic body; first and second external electrodes extended from the one surface of the ceramic body to side surfaces thereof in a y-direction, in which the first and second internal electrodes are laminated, and connected to the respective lead-out portions; and an insulation layer formed on the one surface of the ceramic body.

A method for manufacturing a laminated electronic component includes the steps of preparing a component main body having a laminated structure, the component main body including a plurality of internal electrodes formed therein, and each of the internal electrodes being partially exposed on an external surface of the component main body, and forming an external terminal electrode on the external surface of the component main body such that the external terminal electrode is electrically connected to the internal electrodes. The step of forming the external terminal electrode includes the steps of forming a metal layer on exposed surfaces of the internal electrodes of the component main body, applying a water repellant on at least a surface of the metal layer and on a section of the external surface of the component main body at which an end edge of the metal layer is located, and then forming a conductive resin layer on the metal layer having the water repellant applied thereon.

A multilayer ceramic capacitor includes an element body of roughly rectangular solid shape which is constituted by dielectric layers alternately stacked with internal electrode layers having different polarities, with a pair of cover layers formed on it to cover the top and bottom faces in the direction of lamination of the foregoing, and which has a pair of principal faces, a pair of end faces, and a pair of side faces, wherein external electrodes are formed on the pair of end faces and at least one of the pair of principal faces of the element body, and Tt representing the thickness of the external electrode and Tc representing the thickness of the cover layer satisfy the relationship of Tt≦Tc. The multilayer ceramic capacitor has large capacitance and also exhibits excellent thermal shock resistance while sufficiently suppressing generation of cracks.

A thin film layered product is composed of at least two deposition units, each of which includes at least a first thin film layer and a second thin film layer. At least one of the first thin film layer and the second thin film layer in each of the at least two deposition units is laminated so as to have an area decreased in a direction from a lower layer toward an upper layer. Thus, the reliability of connection between layers can be improved, and when a protective layer is formed on side faces, the formability and adhesion strength can be improved.

A multilayer ceramic electronic component includes external terminal electrodes that are formed by depositing metal plating films on exposed portions of internal conductors embedded in a ceramic body, depositing a copper plating films that cover the metal plating films and make contact with the ceramic body around the metal plating films, and heat-treating the ceramic body to generate a copper liquid phase, an oxygen liquid phase, and a copper solid phase between the copper plating films and the ceramic body. The mixed phase including these phases forms a region at which a copper oxide is present in a discontinuous manner inside the copper plating film at least at the interfaces between the ceramic body and the copper plating films. The copper oxide securely attaches the copper plating films to the ceramic body and enhances the bonding force of the external terminal electrodes.