2049 results about "Film capacitor" patented technology

It is an object of the invention to provide a variable capacitor constituted such that, even when an external control voltage is applied, a stable dielectric constant of the dielectric layer can be obtained. A variable capacitor constituted such that a dielectric layer whose dielectric constant is changed by the application of an external voltage is held between an upper electrode layer and a lower electrode layer, wherein a plurality of capacitance-producing regions a, b are connected to each other.

A highly efficient fast charger for high capacity batteries and methods for fast charging high capacity batteries. The fast charger preferably comprises a rectified AC input of single or preferably three phases, with an optional power factor corrected input, minimally filtered with high frequency, high ripple current capacitors, which is switched with a power switching circuit in the “buck” configuration into an inductor / capacitor output filter. Metallized film capacitors are employed, to minimize the rectified 360 Hertz AC component filtering while providing transient switch protection and ripple current requirements for the buck regulator, to provide a high current fast charger with substantially improved power factor. High power, high frequency switching with minimized output filter size provides a highly filtered DC output. The fast charger is adapted to be constructed in a modular design for simple maintenance.

An electronic component structure is proposed, wherein an interposer thin film capacitor structure is employed between an active electronic component and a multilayer circuit card. A method for making the interposer thin film capacitor is also proposed. In order to eliminate fatal electrical shorts in the overlying thin film regions that arise from pits, voids, or undulations on the substrate surface, a thick first metal layer, on the order of 0.5-10 mu m thick, is deposited on the substrate upon which the remaining thin films, including a dielectric film and second metal layer, are then applied. The first metal layer includes of Pt or other electrode metal, or a combination of Pt, Cr, and Cu metals, and a diffusion barrier layer. Additional Ti layers may be employed for adhesion enhancement. The thickness of the first metal layers are approximately: 200 A for the Cr layer; 0.5-10 mu m for the Cu layer; 1000 A-5000 A for the diffusion barrier; and 100 A-2500 A for a Pt layer.

The invention relates to a thin film capacitor with a carrier substrate, at least two interdigitated electrodes, and a dielectric. A staggered arrangement of at least one interdigitated electrode below the dielectric with respect to an interdigitated electrode above the dielectric results in a breakdown-resistant thin film capacitor which can be manufactured in the same production process as a standard monolayer capacitor.

A highly efficient fast charger for high capacity batteries and methods for fast charging high capacity batteries. The fast charger preferably comprises a rectified AC input of single or preferably three phases, with an optional power factor corrected input, minimally filtered with high frequency, high ripple current capacitors, which is switched with a power switching circuit in the “buck” configuration into an inductor / capacitor output filter. Metallized film capacitors are employed, to minimize the rectified 360 Hertz AC component filtering while providing transient switch protection and ripple current requirements for the buck regulator, to provide a high current fast charger with substantially improved power factor. High power, high frequency switching with minimized output filter size provides a highly filtered DC output. The fast charger is adapted to be constructed in a modular design for simple maintenance.

An excitation circuit for a flux switching motor. The circuit includes a low-value film capacitor across the DC side of a bridge rectifier. A plurality of electronic switches are arranged in an H-bridge configuration for switching current flow through an armature winding of the motor in accordance with a PWM control scheme and single-pulse control scheme controlled by a microcontroller. A start-up diode is placed across the field winding of the motor and is electronically switched out of the circuit after a startup phase of the motor has completed. The circuit implements armature energy recirculation through the field winding during startup to promote more uniform and quicker startup of the motor. The use of a film capacitor improves the power factor of the circuit, helps to eliminate the introduction of harmonics into the AC voltage source, and helps in mitigating EMI. Reverse commutation is used to bring the motor to a quick stop when it is powered off.

A semiconductor device is disclosed that includes an interposer and a semiconductor chip. The interposer includes a Si substrate; multiple through vias provided through an insulating material in corresponding through holes passing through the Si substrate; a thin film capacitor provided on a first main surface of the Si substrate so as to be electrically connected to the through vias; and multiple external connection terminals provided on a second main surface of the Si substrate so as to be electrically connected to the through vias. The second main surface faces away from the first main surface. The semiconductor chip is provided on one of the first main surface and the second main surface so as to be electrically connected to the through vias. The Si substrate has a thickness less than the diameter of the through holes.

The invention provides a film capacitor and its manufacturing method suited to car-mount application, excellent in heat cycle tolerance and humidity resistance, and high in productivity, while maintaining low heat generation and low inductance characteristic. A film capacitor comprises a film capacitor element 1, a bus bar 3 as metal terminal connected to electrode 2 of this film capacitor element 1, and a case 8 for containing them, in which the film capacitor element 1 and bus bar 3 are packed within the case 8 by plural layers of epoxy resin compositions 6, 7, and the plural layers of epoxy resin compositions 6, 7 are formed in layers, and are composed so that the coefficient of linear expansion may be smallest in the epoxy resin composition 7 disposed in the uppermost layer, and therefore resin cracks can be prevented at the time of heat cycle, and a film capacitor of high reliability excellent inhumidity resistance is obtained.

A system that incorporates teachings of the present disclosure may include, for example, a first solid electrode, a second electrode separated into subsections, and a dielectric medium separating the subsections from the first solid electrode, where the subsections of the second electrode include a first group of subsections and a second group of subsections, where the first group of subsections are connectable with a first terminal for receiving an input signal, and where the second group of subsections is connectable with a second terminal for providing an output signal. Other embodiments are disclosed.

A method of fabricating an integrated circuit package, comprising prefabricating a film capacitor including forming a first conductive layer, depositing a dielectric layer on the first conductive layer, and depositing a second conductive layer on the dielectric layer; forming a substrate; and laminating the prefabricated film capacitor to the substrate.

A metallization film capacitor that achieves both high heat resistance and high withstand voltage at the same time. A metal-deposited electrode is formed on a PEN film in each of a pair of metalized films. These metalized films are wound such that the metal-deposited electrodes face each other via the dielectric film in between. A metalized contact electrode is formed on both end faces of these wound metalized films to configure the metallization film capacitor. A divisional electrode is provided on the metal-deposited electrode. In addition, a fuse is coupled to this divisional electrode for providing a self-maintaining function. Pass rate a / b of a deposition pattern is set to 4.0 or smaller, where ‘a’ is the fuse width, and ‘b’ is the length of the divisional electrode in a lengthwise direction of the metalized films.

A capacitor and a dynamic random access memory (DRAM) incorporating such a capacitor, includes a first layer of conducting, doped perovskite material, a second layer of another conducting, doped perovskite of opposite polarity in contact with the first layer, and a depletion layer formed at an interface between the first and second layers of conducting perovskite materials, the depletion layer being an insulating layer of the capacitor. Another capacitor and DRAM incorporating such a capacitor, includes a first electrode, a second electrode opposing the first electrode, and a thin-film of high dielectric constant perovskite material sandwiched between the first and second electrodes. At least one of the first and second electrodes is formed from substantially the same perovskite material, as the thin-film, in conducting, doped form.

Examples of the present invention include high electric energy density polymer film capacitors with high dielectric constant, low dielectric dissipation tangent, and low leakage current in a broad temperature range. More particularly, examples include a polymer film capacitor in which the dielectric layer comprise a copolymer of a first monomer (such as tetrafluoroethylene) and a second polar monomer. The second monomer component may be selected from vinylidene fluoride, trifluoroethylene or their mixtures, and optionally other monomers may be included to adjust the mechanical performance. The capacitors can be made by winding metallized films, plain films with metal foils, or hybrid construction where the films comprise the new compositions. The capacitors can be used in DC bus capacitors and energy storage capacitors in pulsed power systems.

Examples of the present invention relate generally to high electric energy density polymer film capacitors with high charge-discharge efficiency and fast discharge speed. For example, a high energy density polymer capacitor may be fabricated using a polymer blend comprising one or more high dielectric constant PVDF-based polymers (including homopolymers, copolymers and / or terpolymers) and one or more other polymer with low dielectric loss and high volume resistivity compared to the one or more PVDF-based polymers. An example film capacitor may comprise a high temperature fluoropolymer with dielectric loss lower than 0.2% and good film manufacturability. Polymer films can be stretched and orientated at least in one direction to make thinner films with improved performance. Film capacitors can be made by winding metallized films, plain films with metal foils, or using a hybrid construction where the dielectric films comprise the new compositions. Capacitors can also have a multilayer construction where the films are metallized.

In a thin film transistor, each of an upper electrode and a lower electrode is formed of at least one material selected from the group consisting of a metal and a metal nitride, represented by TiN, Ti, W, WN, Pt, Ir, Ru. A capacitor dielectric film is formed of at least one material selected from the group consisting of ZrO2, HfO2, (Zrx, Hf1-x)O2 (0<x<1), (Zry, Ti1-y)O2 (0<y<1), (Hfz, Ti1-z)O2 (O<z<l), (Zrk, Til, Hfm)O2 (0<k, l, m<1, k+l+m=1), by an atomic layer deposition process. The thin film transistor thus formed has a minimized leakage current and an increased capacitance.

A method of embedding thick-film capacitors includes covering capacitor layers with a protective coating prior to etching to prevent etching solutions from coming in contact with and damaging the capacitor layers.

A film capacitor element including a base dielectric film layer 12, a vapor-deposition metal film layer 14 formed on the base dielectric film layer 12 and consisting of a first film portion 20 and a second film portion 22 that are spaced apart from each other by a margin portion 18, and a dielectric covering film layer 16 which is formed integrally on the second film portion 22 by vapor-deposition polymerization or coating and which has a covering portion 30 which fills the margin portion 18 and covers an entire area of an end face of the second film portion 22 on the side of the margin portion 18. The first film portion 20 including a non-covered portion 34 which is not covered by the dielectric covering film layer 16.

An intermediate substrate includes a substrate core formed by a main core body portion constructed of a sheet of polymer material and having a subsidiary core accommodation portion formed therein. A ceramic subsidiary core portion, which is constructed of a ceramic sheet, is accommodated in the subsidiary core accommodation portion and is of a thickness matching that of the main core body portion. A thin film capacitor is formed on a first main surface side of a plate-like base of the core portion and includes first and second thin film electrodes separated from each other by a thin film dielectric layer so as to provide direct current isolation between the electrodes. First and second direct current isolated terminals of a first terminal array are electrically connected to the first and second thin film electrodes.

An interposer 2 comprising a base 10 formed of a plurality of resin layers 26, 34, 42, 52, 56; a thin-film capacitor 12 buried in the base 10, including a lower electrode 20, a capacitor dielectric film 22 and an upper electrode 24; a first through-electrode 14b formed through the base 10 and electrically connected to the upper electrode 24 of the thin-film capacitor 12; and a second through-electrode 14a formed through the base 10 and electrically connected to the lower electrode 20 of the thin-film capacitor 12, further comprising: an interconnection 48 buried in the base 10 and electrically connected to the respective upper electrodes 24 of a plurality of the thin-film capacitors 12, a plurality of the first through-electrodes 14b being electrically connected to the upper electrodes 24 of said plurality of the thin-film capacitors 12 via the interconnection 48, and said plurality of the first through-electrodes 14b being electrically interconnected by the interconnections 48.

The present invention is to provide a metallized film capacitor having a compact size, a large capacitance and a low inductance whereas number of parts is reduced. The metallized film capacitor comprises: a plurality of capacitor elements (1) provided with metallized contact electrodes (2) on both ends in the width direction; a bus-bar (3) to connect each of a plurality of electrodes (2) on one end; and a capacitor case (5) to house a plurality of capacitor elements (1), wherein a plurality of capacitor elements (1) are arranged in the capacitor case such that one side of electrodes (2) faces the opening surface of capacitor case (1) and each electrode (2) of one of both ends of each capacitor element (1) are positioned generally coplanarly.

A hard start capacitor replacement unit has a plurality of capacitors in a container sized to fit in existing hard start capacitor space. The capacitors are 4 metallized film capacitors wound in a single cylindrical capacitive element. The container has a common terminal and capacitors value terminals for the plurality of capacitors, which may be connected singly or in combination to provide a selected capacitance. An electronic or other relay connects the selected capacitance in parallel with a motor run capacitor. The hard start capacitor replacement unit is thereby adapted to replace a wide variety of hard start capacitors.

The invention belongs to the field of photovoltaic power generation, applies a power decoupling circuit to reduce the capacity of a capacitor at the side of a DC (Direct Current) bus for prolonging the service life and improving the reliability of the inverter, replaces an electrolytic capacitor with high capacity and a short service life with a thin film capacitor with low capacity and a long service life and designs a miniature photovoltaic grid-connected inverter. To fulfill the aims, the invention adopts the technical scheme that the miniature photovoltaic grid-connected inverter with an optimized DC bus capacitor comprises a main circuit and a control and driving circuit, wherein the main circuit is formed by a photovoltaic cell panel, a phase-shift full-bridge circuit, a high frequency transformer, a full-bridge rectifying circuit, the DC bus capacitor, the power decoupling circuit and an inverter circuit which are sequentially connected; the control and driving circuit comprises a photovoltaic output current sampling circuit, a photovoltaic output voltage sampling circuit, a power MOSFET (Metal Oxide Semiconductor Field Effect Transistor) driving circuit, a capacitor voltage sampling circuit, a grid-connected current sampling circuit, a phase-locked loop circuit and a DSP (Digital Signal Processor) controller. The miniature photovoltaic grid-connected inverter is mainly applied to photovoltaic power generation.

A thin-film capacitor (2) in which a lower electrode (6), a dielectric thin-film (8), and an upper electrode (10) are formed in order on a substrate (4). The dielectric thin-film (8) is made of a composition for thin-film capacitance devices. The composition includes a bismuth layer-structured compound whose c-axis is oriented vertically to the substrate and which is expressed by a formula: (Bi2O2)<2+>(Am-1BmO3m+1)<2->, or Bi2Am-1BmO3m+3 wherein "m" is an even number, "A" is at least one element selected from Na, K, Pb, Ba, Sr, Ca and Bi, and "B" is at least one element selected from Fe, Co, Cr, Ga, Ti, Nb, Ta Sb, V, Mo and W. The temperature characteristics of the dielectric constant are excellent. Even if the dielectric thin-film is made more thinner, the dielectric constant is relatively high, and the loss is small. The leak characteristics are excellent, the break-down voltage is improved and the surface smoothness is excellent.

A capacitor strap that is applied to a security tag coil or antenna to form and properly tune an EAS or an RFID security tag. The capacitor strap is a thin film capacitor formed of two metal foils in between which is a dielectric material having ends that are electrically coupled to different points of a security tag coil or antenna. The capacitor strap may include an RFID integrated circuit, either in series or in parallel with the capacitor, which is then applied to security tag coil at a particular location to tune the tag to a predetermined frequency.

The invention provides an online monitoring method for a DC-link capacitor of a three-phase system. The method comprises that voltage of the DC-link capacitor is collected, and a voltage drop curve of the DC-link capacitor is obtained; three-phase output current is collected, and capacitive current is reconstructed according to the three-phase output current; and the capacitance (C) and equivalent serial resistance (ESR) of the DC-link capacitor are obtained according to the voltage drop curve and the capacitive current of the DC-link capacitor. The voltage drop curve and the three-phase output current of the DC-link capacitor as well as control signals of a semiconductor switch are monitored in the process that power equipment as a three-phase frequency converter is switched off, so that the C and ESR of the DC-link capacitor are calculated accurately, and non-invasive online monitoring for the DC-link capacitor of the AC / DC / AC system is realized. The method can be applied to online monitoring for an aluminum electrolytic capacitor, other capacitors as a film capacitor as well as other three-phase systems including a wind power converter, a photovoltaic AC / DC / AC system and a three-phase aviation power system.

A system and method for the fabrication of high reliability capacitors (1011), inductors (1012), and multi-layer interconnects (1013) (including resistors (1014)) on various thin film hybrid substrate surfaces (0501) is disclosed. The disclosed method first employs a thin metal layer (0502) deposited and patterned on the substrate (0501). This thin patterned layer (0502) is used to provide both lower electrodes for capacitor structures (0603) and interconnects (0604) between upper electrode components. Next, a dielectric layer (0705) is deposited over the thin patterned layer (0502) and the dielectric layer (0705) is patterned to open contact holes (0806) to the thin patterned layer. The upper electrode layers (0907, 0908, 1009, 1010) are then deposited and patterned on top of the dielectric (0705).