661 results about "Diffusion barrier" patented technology

The invention discloses a semiconductor device structure, a preparation method thereof and a chip, and belongs to the technical field of semiconductor devices. The semiconductor device structure comprises a gold-silver alloy bump and a UBM layer, and the UBM layer is composed of a seed layer, a diffusion barrier layer and an adhesion layer or composed of the diffusion barrier layer and the adhesion layer. The diffusion barrier layer is composed of a platinum group element simple substance and / or an alloy containing a platinum group element, preferably composed of platinum, rhodium, iridium or an alloy thereof; the bottom of the gold-silver alloy bump is connected with the seed layer or the diffusion barrier layer, and the adhesion layer is connected with a chip electrode. By improving the UBM layer, the combination reliability of the gold-silver alloy bump and the UBM layer is improved, the obtained semiconductor device structure can pass a high-end chip reliability test, and a flip chip is prepared by replacing gold with gold-silver alloy.

The invention relates to a diffusion-resistant layer enhanced high-temperature oxidation-resistant composite ceramic coating for a niobium surface and a preparation process thereof. The coating system is composed of a diffusion layer, an anti-diffusion layer and a composite ceramic coating in sequence. In the preparation process, the Al2O3 diffusion-resistant layer is accurately constructed by adopting a slurry spin-coating method, and the method can realize accurate regulation and control of the thickness of the diffusion-resistant layer, so that uniform distribution of the Al2O3 layer is ensured. The introduction of the diffusion-resistant layer significantly improves the high-temperature stability and oxidation resistance of the coating, effectively delays the oxidation process of the material under an extreme high-temperature condition, and greatly prolongs the service life of the material.

The invention mainly provides a nuclear fuel cladding composite material and a preparation method thereof. The nuclear fuel cladding composite material comprises a zirconium alloy matrix, the niobium-rich diffusion barrier layer is formed on the surface of the zirconium alloy matrix; the Cr coating covers the niobium-rich diffusion barrier layer; and an Al-rich layer formed on the surface of the Cr coating. The preparation method comprises the following steps: firstly, carrying out surface pretreatment on the zirconium alloy matrix; a niobium-rich diffusion barrier layer is formed on the surface of the zirconium alloy matrix through ion implantation; then depositing a Cr coating on the niobium-rich layer; and finally, an Al element is injected into the surface of the Cr coating, and an Al-rich layer is formed so that an Al2O3 protective layer can be formed under the high-temperature working condition. According to the technical scheme, interface mutual diffusion can be effectively inhibited, the stability of the coating is improved, meanwhile, the Cr coating structure is optimized, the oxidation process is delayed, a gradient protection system is constructed, and the oxidation resistance of a high-temperature material is enhanced.

A method for fabricating a thin film transistor comprises disposing a semiconductor layer including a channel area, and a first and second electrode areas, disposing a gate insulating layer covering the semiconductor layer, disposing a diffusion barrier layer covering the gate insulating layer, disposing first and second electrode holes corresponding to the first and second electrode areas, and disposing a gate electrode overlapping the channel area, first and second electrodes electrically connected to the first and second electrode areas through the first and second electrode holes. The disposing of the first electrode hole, and the second electrode hole includes patterning the diffusion layer with a patterning mask disposed on the diffusion barrier layer. The disposing of the gate electrode and the first and second electrodes may include disposing a conductive material layer covering the diffusion barrier layer, and patterning the conductive material layer.

A semiconductor IC structure includes a stacked transistor that has a top transistor stacked upon a bottom transistor. The bottom transistor includes at least a bottom source / drain region. The semiconductor IC structure further includes a replacement bottom source / drain region contact that includes a deep via region through at least the top semiconductor IC device and a monolithic region within the bottom semiconductor IC device directly coupled against a top surface of the bottom source / drain region. There is no interfacial impedance between the deep via region and the monolithic region. For example, there is no liner (e.g., such as a diffusion barrier, adhesion liner, or the like) between the deep via region and the monolithic region.

The utility model discloses a TOPCon solar cell structure, which relates to the field of solar cells and sequentially comprises a first silver electrode, a first antireflection film layer, a boron doping layer, a silicon substrate, a tunneling layer and a polycrystalline silicon doping layer in a single direction, and further comprises a second antireflection film layer, a diffusion barrier layer and a second silver electrode. One grid line of the diffusion barrier layer is arranged between two adjacent grid lines of the second antireflection film layer, and the grid line of the second silver electrode is located on the grid line of the diffusion barrier layer; a titanium nitride layer TiN or a titanium oxynitride layer TiON is deposited between the polycrystalline silicon layer and the metal electrode to serve as a diffusion barrier layer, and the second silver electrode is of a grid line structure instead of full coverage; according to the structure, the characteristics of high conductivity and electron selective transmission of titanium nitride or titanium oxynitride are utilized, so that electrons have low resistance during transmission, and electron collection is facilitated. And by adopting a grid line structure, the absorption of titanium nitride or titanium oxynitride on long-wave-band light is effectively avoided, and the double-sided topcon battery is very suitable for the existing double-sided topcon battery.

The invention discloses a fast ion conductor coated sodium ion battery manganese-based positive electrode material and a preparation method thereof, and belongs to the technical field of sodium ion battery positive electrode materials. The method comprises the following steps: S1, synthesizing a Zn < x > Mg < y > Mn < 1-x-y > CO < 3 > precursor based on a coprecipitation reaction; s2, carrying out coating modification on the precursor by using an aluminum source; and S3, roasting the coated modified precursor and a sodium source at high temperature to obtain the fast ion conductor coated sodium ion battery manganese-based positive electrode material. According to the material, a co-doped precursor material is obtained by doping zinc and magnesium elements in a manganese-based oxide at a precursor end, the doping of zinc and magnesium enables the material to have a wide lattice spacing, and the diffusion barrier of Na < + > in the charging and discharging process is reduced; sodium metaaluminate formed on the surface of the material is uniformly distributed, so that the direct reaction between the positive electrode material and electrolyte in the charging and discharging process is inhibited; and meanwhile, the fast ion conductor coating layer can also improve the ionic conductivity of the material and improve the rate capability.

A hybrid bonding structure, a manufacturing method thereof, and a semiconductor device. The hybrid bonding structure includes a dielectric layer, including a first dielectric layer and a second dielectric layer which are bonded; a bonding interface layer between the first dielectric layer and the second dielectric layer; a metal structure in the dielectric layer; and a diffusion barrier layer in the dielectric layer, the diffusion barrier layer isolating the bonding interface layer. The hybrid bonding structure can improve device performance.

The disclosed technology generally relates to forming a titanium nitride-based thin films, and more particularly to a conformal and smooth titanium nitride-based thin films and methods of forming the same. In one aspect, a method comprises forming a diffusion barrier comprising TiSiN having a modulus exceeding 290 GPa and a Si content exceeding 2.7 atomic % by exposing a semiconductor substrate to one or more first deposition phases alternating with one or more second deposition phases. Exposing the semiconductor substrate to the one or more first deposition phases comprises alternatingly exposing the semiconductor substrate to a titanium (Ti) precursor and a nitrogen (N) precursor. Exposing the semiconductor substrate to the one or more second deposition phases comprises sequentially exposing the semiconductor substrate to the Ti precursor, followed by a silicon (Si) precursor, followed by the N precursor.

Various embodiments of the present disclosure are directed towards an integrated chip having an interconnect structure overlying a substrate. The interconnect structure includes a conductive wire disposed in a dielectric structure. The conductive wire comprises a body structure. A passivation structure overlies the interconnect structure. A bond pad overlies the passivation structure. The bond pad comprises an upper pad structure on the passivation structure and a plurality of lower bond structures extending through the passivation structure to the conductive wire. The lower bond structures respectively comprise a vertical bond structure and a diffusion barrier layer disposed along a lower surface and opposing sidewalls of the vertical bond structure. The upper pad structure comprises a first conductive layer vertically stacked with a second conductive layer

A ferroelectric field effect transistor includes a channel layer, a gate electrode facing the channel layer, a ferroelectric layer provided between the channel layer and the gate electrode, an oxygen-deficient layer provided between the channel layer and the ferroelectric layer, a diffusion barrier layer provided between the channel layer and the oxygen-deficient layer and configured to reduce or prevent oxygen exchange between the channel layer and the oxygen-deficient layer, and a source electrode and a drain electrode, electrically connected to the channel layer, wherein the channel layer and the oxygen-deficient layer include an oxide semiconductor material, and a concentration of oxygen vacancies in the oxygen-deficient layer may be greater than a concentration of oxygen vacancies in the channel layer.

The invention discloses a strong-combination wide-temperature-range wear-resistant composite coating, and relates to the technical field of solid lubricating materials, the composite coating comprises a transition layer, a functional inner layer, a diffusion barrier layer and a functional outer layer which are sequentially formed on the surface of a matrix, the transition layer is a Mo layer and a Mo2N layer, the functional inner layer is a MoAgN layer, the diffusion barrier layer is a Mo2N layer, the functional outer layer is a MoAgN layer, and the functional inner layer is a MoAgN layer. The functional outer layer is a MoAgN layer, and the MoAgN layer comprises a Mo2N phase and an Ag phase. The invention further discloses a preparation method of the composite coating and application of the composite coating in the field of solid lubrication protection. The composite coating is good in film-substrate binding force and low in friction coefficient and wear rate in a wide temperature range, damage to key mechanical parts in the air foil bearing caused by high-temperature lubrication failure can be avoided, and the tribological performance of the bearing parts under the working condition of the wide temperature range is improved.

A method for manufacturing a low-angle blazed grating on a semiconductor or silicon substrate, includes spin-coating the substrate with resist layer or hydrogen or polysilsesquioxane, being 100-1000 nm or few hundred nanometers thick, applying grayscale irradiation lithography exposure to the resist layer, generating a dose modulated pattern therein, varying in response to absorbed energy density from irradiation lithography exposure. The coated, irradiated substrate is developed in solution, such as TMAH or NaOH, enabling a blazed profile having structures of thickness-dependent diffusion barriers or SiO2, with 0-1000 nm height to emerge. Thermal oxidation in oxygen atmosphere at elevated temperature with the developed substrate, converts the upper silicon substrate layer into SiO2 to a depth depending on the thickness of the pattern in the resist layer above. Hydrofluoric acid fluid removes the SiO2, creating low-angle low-roughness blazed grating structure on silicon substrate.

The invention belongs to the technical field of stainless steel composite plates, and particularly relates to an iron-nickel stainless steel composite plate production process which comprises the following steps: performing plasma sputtering cleaning on a carbon steel base layer; the iron-nickel-stainless steel composite layer is subjected to laser micro-cladding treatment to form a micro-groove array, and a nano nickel-titanium alloy transition layer is preset in the micro-groove array; explosive cladding is carried out in a helium and argon mixed gas environment with the oxygen content smaller than or equal to 10 ppm, so that the carbon steel base layer and the iron-nickel-stainless steel cladding layer are subjected to interface metallurgical bonding to form a composite plate blank; the composite plate blank is hot-rolled and water-cooled to 500 DEG C or below after being heated and subjected to heat preservation; and the rolled composite plate blank is placed in mixed gas of nitrogen and hydrogen for isolation annealing, the bonding strength and the shearing strength are improved through an interface gradient diffusion layer composite structure constructed through the nanoscale, and interface oxidation and stress concentration in the rolling process are inhibited through asymmetrical rolling and a nanometer heat insulation coating; and multi-stage controlled cooling and diffusion barrier annealing are cooperatively regulated and controlled, so that the pitting corrosion resistance potential of the iron-nickel stainless steel clad layer is improved.

A pellicle including a pellicle membrane with improved stability to hydrogen plasma is provided. The pellicle membrane includes a plurality of carbon nanotubes (CNTs), where at least one carbon nanotube (CNT) of the plurality of CNTs is coated by a protection coating. The protection coating includes a plurality of nanostructures that includes a transition metal or an oxide, nitride, silicide or carbide thereof on a surface of the at least one CNT of the plurality of CNTs, a carbon-based diffusion barrier layer over at least the plurality of nanostructures, and a capping layer over at least the carbon-based diffusion barrier layer. The pellicle further includes a pellicle border attached to the pellicle membrane along a peripheral region of the pellicle membrane and a pellicle frame attached to the pellicle border.

The invention provides a preparation method of an F-doped carbon-coated MOF-derived lithium iron phosphate material. The preparation method comprises the following steps: uniformly mixing and dispersing a trivalent iron salt, a fluorine-containing ligand, a surfactant and a solvent, and carrying out solvothermal reaction to obtain fluorine-containing Fe-MOF; the preparation method comprises the following steps: uniformly mixing fluorine-containing Fe-MOF with a phosphorus source and a lithium source, grinding, and carrying out solid-phase sintering to obtain the F-doped carbon-coated MOF-derived lithium iron phosphate material (LFP (at) FC). The F-doped functional porous carbon has relatively high adsorption capacity, meanwhile, the Li < + > diffusion barrier is reduced, additional active sites are further endowed, the electronic conductivity of the material is improved, and a diffusion channel is accelerated. The LFP (at) FC positive electrode shows excellent rate capability and long cycle stability.

The invention provides a preparation method of an interconnection structure, a semiconductor structure and chemical mechanical polishing equipment. According to the preparation method, after a chemical mechanical polishing process is executed, a protective layer is formed on the surface of an exposed metal layer by adopting an evaporation process within a preset first time, so that oxygen isolation is realized by utilizing the protective layer. Even if waiting is overtime due to reasons in the technological process, the metal layer is protected by the protective layer, the oxidation reaction does not occur, and the performance of the device can be guaranteed. And before the diffusion barrier layer is formed, the protective layer is removed by adopting a cleaning process, so that the subsequent deposition of a thin film is not influenced, the structural characteristics of the device are not changed, and other impurities are not introduced and additional device film layer damage is not generated in the process of removing the protective layer. Moreover, the chemical mechanical polishing equipment provided by the invention is additionally provided with the evaporation chamber and the first cleaning chamber, so that not only can the preparation requirements of the preparation method of the interconnection structure be met, but also each process link is convenient to manage and control.

The invention relates to the technical field of nuclear fuel cladding, in particular to a diffusion impervious layer based on an accident fault-tolerant fuel cladding Cr coating and a preparation method of the diffusion impervious layer, the diffusion impervious layer is composed of any one of thorium Th, niobium Nb, molybdenum Mo and a SiCf / SiC composite coating, and a pure Cr coating is arranged outside the diffusion impervious layer. According to the nuclear power cladding tube, the diffusion barrier layer is arranged between Zr and Cr, so that the Zr matrix and the Cr coating are separated, and diffusion between the Zr matrix and the Cr coating is slowed down, so that the oxidation speed of the Cr coating is reduced, the water loss accident resisting capacity of the cladding is improved, and then the nuclear power cladding tube is safer under the LCOA working condition; due to the fact that the diffusion barrier layer can effectively restrain mutual diffusion between the Cr coating and the zirconium alloy matrix, the high-temperature service performance of the coating is improved, the high-temperature oxidation resistance of the accident fault-tolerant fuel cladding Cr coating is further improved, and the survival time of a fuel cladding pipe under the LOCA accident can be prolonged.

The invention discloses a trans-perovskite solar cell and a preparation method thereof. The trans-perovskite solar cell comprises a conductive substrate, a hole transport layer, a passivation layer, a perovskite absorption layer, an electron transport layer and a back electrode layer which are arranged in sequence, the hole transport layer is made of nickel oxide; the passivation layer is made of cerium oxide, and the thickness of the passivation layer is 2-5nm; the light incidence direction of the solar cell is from one side of the conductive substrate to one side of the back electrode layer. Ce < 3 + > in cerium oxide is preferentially combined with dangling bonds on the surface of NiOx to form Ce-O-Ni bonds, so that interface defects are eliminated; the cerium oxide energy level is located between the perovskite and the hole transport layer, so that an energy level buffering effect is achieved, and the photoelectric conversion efficiency is improved; the Ce < 3 + > / Ce < 4 + > valence state conversion characteristic of cerium oxide can efficiently absorb and convert ultraviolet photons and prevent the ultraviolet photons from damaging a perovskite lattice structure; the fluorite structure of CeO gamma forms an ion diffusion barrier to block Ni < 2 + > from migrating to a perovskite layer and protect the perovskite structure.

The invention relates to a method for forming a semiconductor structure. According to the forming method, after a diffusion barrier layer and a metal adhesion layer are formed in a through hole, reverse sputtering is firstly carried out to transfer part of the metal adhesion layer formed on the bottom wall of the through hole to the side wall of the through hole, the thickness of the metal adhesion layer located on the side wall of the through hole can be increased, flash deposition is then carried out, the thickness of the metal adhesion layer on the inner wall of the through hole is more uniform, and the thickness of the metal adhesion layer is improved. Therefore, the total thickness of the diffusion barrier layer and the metal adhesion layer located on the side wall of the through hole can be increased and is more uniform, the adhesiveness of the metal adhesion layer and the side wall of the through hole is enhanced, when the seed crystal layer grows on the basis of the metal adhesion layer, the crystallization direction of the seed crystal layer on the side wall of the through hole is relatively consistent, and the yield is improved. And then, when a metal material such as copper is grown on the basis of the seed crystal layer, the crystal phase arrangement of the metal material is more uniform, and the filling is more compact, so that the via hole has better supporting performance and reliability, and the test yield is favorably improved.

The invention relates to Sn-Bi-In-Ag-Zn high-reliability high-entropy alloy low-temperature solder for advanced packaging and a preparation method of the Sn-Bi-In-Ag-Zn high-reliability high-entropy alloy low-temperature solder, and belongs to the technical field of electronic packaging materials. The solder comprises, by atomic percent, 25%-35% of tin, 25%-35% of bismuth, 25%-35% of indium, 5% of silver and 5%-10% of zinc, and preparation of the solder is achieved in an induction melting mode. Main phases of the Sn-In-Bi-Ag-Zn high-reliability high-entropy alloy low-temperature solder for electronic packaging are the tin-based solid solution and the indium bismuth phase, bismuth and indium atoms are subjected to high solid solution in the tin-based solid solution, and solid solution strengthening of the solder is promoted. The melting point is only 80-90 DEG C, and the warping problem caused by CET mismatching can be effectively reduced due to the extremely low melting point. The low-temperature wettability is good, and the wetting angle is smaller than or equal to 33 degrees when the copper substrate is wetted at 120 DEG C. Meanwhile, inhibition of interface IMC rapid growth can be achieved without a diffusion barrier layer, a thin IMC layer can still be kept under the conditions of long-time and multiple times of backflow, the volume ratio of the IMC in a micro welding spot can be remarkably reduced, the influence of the IMC on the mechanical property and reliability of the welding spot can be reduced, good mechanical property can still be kept after long-time and multiple times of backflow, and the service life of the welding spot can be prolonged. The method is suitable for advanced packaging such as flexible packaging and 3D IC packaging which require low packaging temperature or high thermal reliability.

The invention discloses a low-temperature hybrid bonding interconnection structure and a manufacturing method thereof. The low-temperature hybrid bonding interconnection structure comprises a first substrate with an embedded metal structure, a second substrate with an embedded metal structure, an etching barrier layer, an amorphous dielectric layer, a bonding auxiliary layer, a first bonding layer, a second bonding layer, a first bonding layer and a second bonding layer, and the interconnection metal is embedded in the bonding auxiliary layer, the amorphous dielectric layer and the etching barrier layer, and the interconnection metal has a conductive diffusion barrier and a seed layer on a contact interface with the bonding auxiliary layer, the amorphous dielectric layer and the etching barrier layer. The interconnect metal forms an electrical connection with the embedded metal structure of the first substrate and the embedded metal structure of the second substrate. The ultra-vacuum oxygen-free surface activation bonding technology is adopted, the amorphous media are bonded together through the polycrystalline bonding auxiliary layer, and mixed bonding with lower metal interconnection resistance can be achieved at low temperature or even room temperature.

The invention provides a vertical cavity surface emitting laser and an epitaxial growth method thereof, and belongs to the technical field of semiconductors. The vertical cavity surface emitting laser comprises a substrate, an N-DBR, an active region growth layer, an oxidation limiting layer, a tunnel junction, a P-DBR and a surface ohmic contact layer which are stacked in sequence. The tunnel junction comprises a p + + layer, a first diffusion barrier layer, an n + + layer and a second diffusion barrier layer which are stacked in sequence. The p + + layer and the n + + layer are obtained through pulse doping growth, and P-DBR growth is carried out after stepped heating is carried out on the tunnel junction. The invention provides a comprehensive process based on pulse doping, an in-situ protection layer and stepped heating control, pulse doping is adopted when the n + + / p + + layer of the tunnel junction grows, the first diffusion barrier layer, the second diffusion barrier layer and the stepped heating process in subsequent growth are combined, and doping diffusion is remarkably inhibited while high conductivity of the tunnel junction is maintained.

The invention provides a negative-electrode-free sodium ion battery current collector, a preparation method and application thereof, and a negative-electrode-free sodium ion battery, and relates to the technical field of batteries. The negative-electrode-free sodium ion battery current collector provided by the invention comprises a base material, a conductive layer and a carboxylic acid metal salt layer, the conductive layer is coated on the surface of the base material, and the carboxylic acid metal salt layer is coated on the conductive layer. When the current collector is used for a sodium ion battery, in the first sodium plating process of battery formation, a carboxylic acid ligand existing on the negative electrode side current collector can be spontaneously converted into a carboxylic acid-sodium interface layer, and an artificial SEI interface layer with a low ion diffusion barrier and high mechanical strength is formed in situ. The artificial SEI interface layer not only can effectively promote uniform deposition of sodium ions in the current collector, but also ensures the stability of the SEI layer in the cycle process, greatly reduces the side reaction of sodium metal and electrolyte, and improves the cycle life and safety performance of the battery.

The invention discloses a metalized diamond particle, a diamond / gallium-based liquid metal composite material and a preparation method thereof, and belongs to the field of composite thermal interface materials. The metallized diamond particle comprises a diamond particle, the surface of the diamond particle is coated with an immiscible alloy layer, the immiscible alloy layer contains a diffusion barrier component and a reaction wetting component, and the content of the diffusion barrier component in the immiscible alloy layer is not higher than 15 at% of the total content of the diffusion barrier component and the reaction wetting component; wherein the diffusion barrier component is one or more of tungsten, molybdenum and tantalum, and the reaction wetting component is one or more of silver and copper. The metallized diamond particles and the gallium-based liquid metal are combined to form the composite material, so that the diamond / gallium-based liquid metal composite material has more excellent thermal conductivity.

The invention mainly provides a gradient CrN / Cr composite coating structure for a nuclear fuel cladding and a preparation method. The preparation method comprises the following steps: providing a zirconium alloy substrate; forming a ZrN diffusion barrier layer on the surface of the zirconium alloy substrate; a Cr gradient transition layer is formed on the ZrN layer; and CrN / Cr multilayer structures are alternately deposited on the gradient transition layer. According to the technical scheme, Zr-Cr mutual diffusion can be effectively inhibited, generation of a brittle ZrCr2 phase at a substrate / coating interface is avoided, meanwhile, the CrN transition layer further strengthens the diffusion barrier effect through chemical stability, and the structural integrity of the coating in a high-temperature environment is improved; the design of periodically introducing the CrN layer is adopted, and a new interface is introduced to break continuous growth of thick columnar crystals of the Cr layer, so that a compact structure is formed; and the wear resistance and the cracking resistance of the coating are improved through the high hardness characteristic of CrN. Meanwhile, the high-power pulse magnetron sputtering technology is combined with automatic control, so that the thickness and the structure of the coating can be accurately regulated and controlled, and the process repeatability is ensured.

The utility model relates to a reflecting film and a backlight source module. The reflecting film comprises a transparent base material layer, a silver layer, a diffusion barrier layer and an aluminum layer which are sequentially stacked. The diffusion barrier layer comprises at least one of an aluminum oxide layer, a silicon dioxide layer, a titanium dioxide layer, an aluminum nitride layer, a silicon nitride layer, an ITO layer, an AZO layer, a GZO layer, an IZO layer, a ZTO layer and a graphene layer. According to the reflecting film, the silver layer is arranged on the transparent base material layer and has high reflectivity, and the aluminum layer is arranged on the back surface of the silver layer to serve as the brightness compensation layer, so that the silver layer can be thinned under the condition that the high reflectivity is kept, and the cost is reduced. Moreover, the diffusion barrier layer is arranged between the silver layer and the aluminum layer, so that aluminum atoms can be prevented from diffusing to the silver layer, and the reduction of the reflection efficiency is avoided.

Multiple threshold voltage (Multi-Vt) integration schemes for semiconductor devices are described. The methods include the use of diffusion barrier layers configured to provide multi-Vt through controlled dopant diffusion.

A metal interconnect structure is doped with zinc, indium, or gallium using top-down doping processes to improve diffusion barrier properties with minimal impact on line resistance. Dopant is introduced prior to metallization or after metallization. Dopant may be introduced by chemical vapor deposition on a liner layer at an elevated temperature prior to metallization, by chemical vapor deposition on a metal feature at an elevated temperature after metallization, or by electroless deposition on a copper feature after metallization. Application of elevated temperatures causes the metal interconnect structure to be doped and form a self-formed barrier layer or strengthen an existing diffusion barrier layer.

The disclosed technology generally relates to forming a titanium nitride-based thin films, and more particularly to a conformal and smooth titanium nitride-based thin films and methods of forming the same. In one aspect, a method of forming a diffusion barrier comprising TiSiN comprises exposing a semiconductor substrate to one or more first deposition phases alternating with one or more second deposition phases. Exposing the semiconductor substrate to the one or more first deposition phases comprises alternatingly exposing the semiconductor substrate to a titanium (Ti) precursor and a nitrogen (N) precursor. Exposing the semiconductor substrate to the one or more second deposition phases comprises sequentially exposing the semiconductor substrate to the Ti precursor and a silicon (Si) precursor without an intervening exposure to the N precursor therebetween, followed by exposing the semiconductor substrate to the N precursor.