602 results about "Block layer" patented technology

Embodiments of the present application relate to the technical field of display, and provide a display panel and a display device, for use in improving the wide-angle anti-peeping effect of the display panel. The display panel comprises: a substrate; a plurality of light-emitting elements located on one side of the substrate, wherein each of the light-emitting elements comprises a first light-emitting unit and a second light-emitting unit; a first light blocking layer located on the side of the first light-emitting unit distant from the substrate, wherein the first light blocking layer comprises a first opening; and a second light blocking layer located on the side of the first light blocking layer distant from the substrate, wherein the second light blocking layer comprises a second opening. In a direction perpendicular to the plane where the substrate is located, both the first opening and the second opening at least partially overlap the first light-emitting unit; and the area of the first opening is greater than that of the second opening, and the orthographic projection of the second light blocking layer on the plane where the substrate is located at least partially covers the edge of the first opening.

Semiconductor devices including one or more hydrogen-blocking layers are described. In one example, a semiconductor device comprises a semiconductor substrate including a source region, a gate region, a drain region, and a drain access region, where a heterojunction structure is disposed over the semiconductor substrate. The heterojunction structure includes a buffer layer over the semiconductor substrate and a barrier layer over the buffer layer. A p-doped III-N layer is disposed over the barrier layer in the gate region and a gate electrode is formed over the p-doped III-N layer. A first hydrogen-blocking layer is disposed over the gate electrode where the first hydrogen-blocking layer is configured to arrest diffusion of hydrogen into the p-doped III-N layer from a dielectric layer formed after forming the gate electrode.

This invention relates to an aromatic amine organic compound and an organic electroluminescent device containing the same, belonging to the field of semiconductor materials technology. The structure of the compound provided by this invention is shown in general formula (1): When the hole transport material or electron blocking layer material of the organic electroluminescent device is prepared by using the aromatic amine compound of this invention, the device voltage can be reduced and the device life can be extended at the same time, especially the device high temperature life is significantly improved.

The invention discloses an imidazole derivative molecule modified solar cell and a preparation method thereof, and belongs to the technical field of solar cells. The cell sequentially comprises an ITO (Indium Tin Oxide) conductive glass layer, a nickel oxide passivation layer, a [4-(3, 6-dimethoxy-9H-carbazole-9-yl) butyl] phosphonic acid hole transport layer, an ITO (Indium Tin Oxide) conductive glass layer and a nickel oxide passivation layer from bottom to top, the thin film solar cell is characterized in that the thin film solar cell comprises a substrate, a metal Ag electrode layer, a Cs0.05 (FA0. 95MA0. 05) 0. 95Pb (I0. 95Br0. 05) 3 narrow-band gap perovskite thin film PVSK modified by 2-(2 ', 6'-dichloroanilino)-2-imidazoline, a (6, 6)-phenyl-C61-butyric acid methyl ester electron transport layer, a 2, 9-dimethyl-4, 7-biphenyl-1, 10-phenanthroline hole blocking layer and a metal Ag electrode layer; according to the scheme, perovskite defects are passivated through imidazole derivative molecules, double-interface passivation and crystallization regulation are achieved, the film quality is improved, and the crystal quality of the perovskite film is remarkably improved; due to effective passivation of the double interfaces, ion migration is obviously inhibited, the carrier transmission efficiency is effectively improved, and the moisture resistance of the perovskite thin film and the device stability are improved.

According to one embodiment, a display device includes an anode, an organic EL element layer including a hole injection layer, a hole transport layer, an electron blocking layer, a light-emitting layer, a hole blocking layer, an electron transport layer and an electron injection layer, and a cathode, wherein ΔE2_LUMO is defined as a potential barrier between the electron transport layer and the hole blocking layer, and the light-emitting layer, ΔE2_HOMO is defined as a potential barrier between the hole transport layer and the electron blocking layer, and the light-emitting layer, and each of ΔE2_LUMO and ΔE2_HOMO is 0.1 eV or higher and 0.5 eV or less.

The present disclosure relates to semiconductor manufacturing technology, particularly relates to a light-emitting diode, which includes a light-emitting layer, an N-type semiconductor layer, a P-type semiconductor layer, an electron blocking layer and a connecting layer. The light- emitting layer has a first side and a second side opposite to each other. The N-type semiconductor layer is disposed on the first side of the light-emitting layer. The P-type semiconductor layer is disposed on the second side of the light-emitting layer. The electron blocking layer is disposed between the light-emitting layer and the P-type semiconductor layer. The connecting layer is disposed between the light-emitting layer and the electron blocking layer, wherein, the connecting layer is doped with indium.

A method for manufacturing a semiconductor device includes: forming a first conductive interconnect which penetrates a dielectric layer disposed over a substrate; forming a patterned dielectric layer on the dielectric layer, the patterned dielectric layer being formed with a trench and the first conductive interconnect being exposed from the trench; selectively forming a blocking layer to cover the first conductive interconnect, the blocking layer being formed using an acidic solution including a blocking material; selectively forming a barrier material layer on the dielectric layer and the patterned dielectric layer; removing the blocking layer; forming a conductive material layer on the barrier material layer; and removing a portion of the conductive material layer and a portion of the barrier material layer to form a second conductive connected to the first conductive interconnect.

The invention provides a nitride semiconductor laser. The laser comprises a substrate, a lower coating layer, a lower waveguide layer, an active layer, an upper waveguide layer, an electron blocking layer and an upper coating layer which are sequentially arranged from bottom to top. And the lower waveguide layer comprises any one or a combination of more of InGaN, GaN, InN, AlInGaN, an InGaN / GaN superlattice, an InGaN / AlGaN superlattice, an InGaN / AlGaN superlattice, an InGaN / AlInN superlattice and an InGaN / AlInGaN superlattice. The peak rate electric field distribution of the lower waveguide layer has an arc distribution, and the peak rate electric field distribution has a curve distribution of a function y = logax (a > 1). The drift rate distribution of the saturated electrons of the lower waveguide layer has an arc-shaped distribution, and the drift rate distribution of the saturated electrons has a curve distribution of a third quadrant of a function y = x-b (b > 1, b is an odd number). The density distribution of valence band effective states of the lower waveguide layer has a curve distribution of a third quadrant of a function y = (cx + 1) / (cx-1) (c > 1).

The invention discloses a display panel, a preparation method thereof and a display device. The display panel comprises a substrate, an anode layer, a protective layer, a barrier layer and an insulating layer, wherein the substrate comprises a plurality of pixel areas arranged at intervals; the anode layer is located in the pixel area; the protection layer comprises a first protection layer branch part, and the first protection layer branch part at least partially covers the side wall of the anode layer; the barrier layer covers the first protective layer subsection; the insulating layer is filled between the adjacent pixel areas, and the insulating layer covers the barrier layer. According to the display panel, the barrier layer is arranged to ensure the uniformity of the etch-back water level in the wafer or the chip in the preparation process, and the protective layer is arranged to protect the side wall of the anode layer, so that the corrosion of the anode layer metal caused by the etching process in the preparation process of the barrier layer and the insulating layer is avoided, and the display effect of the display panel is improved.

A display device includes a lower substrate, a pixel defining layer, a light emitting layer, an upper substrate, and a light blocking layer. The pixel defining layer is disposed on the lower substrate and includes a first opening and a second opening spaced apart from the first opening in a first direction. The light emitting layer is disposed in each of the first opening and the second opening. The upper substrate is disposed on the light emitting layer. The light blocking layer is disposed on the upper substrate and includes a third opening partially exposing the first opening and a fourth opening partially exposing the second opening. A first shape in which the first opening is exposed by the third opening and a second shape in which the second opening is exposed by the fourth opening are symmetrical to each other about a line of symmetry in a plan view.

The embodiments of the present disclosure belong to the technical field of back-contact cells, and particularly relate to a hybrid-passivated back-contact cell having passivation blocking layers and the manufacturing and application thereof. The hybrid-passivated back-contact cell comprises first semiconductor layers and second semiconductor layers, which are alternately arranged on a back surface of a silicon wafer, wherein two ends of each of the second semiconductor layers each extend outward to cover the outside of part of a back surface of a first semiconductor layer adjacent thereto; and overlapping portions of the first semiconductor layers and the second semiconductor layers in the direction of thickness form overlapping regions. The hybrid-passivated back-contact cell further comprises passivation blocking layers, which are in the overlapping regions and are arranged between the first semiconductor layers and the second semiconductor layers, wherein no mask layer is provided between the passivation blocking layers and the second semiconductor layers, the passivation blocking layers are made of amorphous silicon, and the thickness ratio of the passivation blocking layers to first doped polycrystalline silicon layers to tunneling oxide layers is 2-8: 60-100: 1. The embodiments of the present disclosure can protect the tunneling oxide layers from being corroded, thereby synergistically enhancing a passivation effect, and increasing the conversion efficiency and production yield of the cell.

There is provided a photoelectric conversion element, an imaging device, and an electronic apparatus that make it possible to improve a response speed. A first photoelectric conversion element (10) according to an embodiment of the present disclosure includes: a first electrode (11); a second electrode (16) disposed to be opposed to the first electrode (11); an organic layer (13) provided between the first electrode (11) and the second electrode (16) and including a hole-transporting material; a work function adjustment layer (15) provided between the second electrode (16) and the organic layer (13) and having an electron affinity or a work function larger than a work function of the first electrode (11); and an electron block layer (14) provided between the organic layer (13) and the work function adjustment layer (15) and having an anisotropic electric susceptibility of 413 or more or an intramolecular dipole moment of 1.84 debye or more.

The invention relates to a blue-green dual-band light-emitting diode epitaxial wafer which comprises a substrate, a buffer layer, an N-type semiconductor layer, a low-temperature stress release layer, a multi-quantum well light-emitting layer, an electron blocking layer and a P-type semiconductor layer which are sequentially stacked in the epitaxial direction. The multi-quantum light-emitting layer comprises a first blue light InGaN layer, a first blue light barrier layer, a first green light barrier layer, a first green light InGaN layer, a second green light barrier layer, a second blue light InGaN layer and a second blue light barrier layer which are sequentially, periodically and alternately grown in the epitaxial direction. The first green light barrier layer comprises a pre-well low-energy-level barrier layer, a pre-well high-energy-level barrier layer and a pre-well polarization compensation barrier layer which are sequentially grown along the epitaxial direction; the second green light barrier layer comprises a post-well polarization compensation barrier layer, a post-well high-energy-level barrier layer and a post-well low-energy-level barrier layer which are sequentially grown along the epitaxial direction; the preparation cost of the backlight source can be effectively reduced, the use of fluorescent powder is reduced, the luminous efficiency is high, and the color rendering performance is good.

The invention discloses a data pre-reading method, electronic equipment, a storage medium and a computer program product, and relates to the technical field of communication, the method is applied to an operating system, the operating system comprises a general block layer, an IO scheduling layer and a block device driving layer, and the method comprises the steps that in a first idle period of the general block layer, the IO scheduling layer is switched to the block device driving layer; determining pre-reading window information based on the current reading request through the general block layer, wherein the pre-reading window information is used for indicating a pre-reading request of the to-be-pre-read object; applying for a first physical memory for the to-be-pre-read object based on the pre-read window information through the block device driving layer, wherein the first physical memory is used for making cache preparation for the to-be-pre-read object; wherein the first idle time period is a waiting time period for waiting to receive read request completion information after the general block layer issues the IO request corresponding to the current read request to the IO scheduling layer. According to the method and the device, under the condition of not increasing the overhead burden, the data reading rate of the operating system is improved, and the universality is relatively high.

The invention relates to the technical field of semiconductor devices, in particular to a blue-green dual-waveband LED epitaxial wafer which comprises a substrate, a buffer layer, an N-type semiconductor layer, a low-temperature stress release layer, a multi-quantum well light-emitting layer, an electron blocking layer and a P-type semiconductor layer which are sequentially arranged in the epitaxial direction. The multi-quantum well light-emitting layer comprises a non-light-emitting region superlattice layer, a non-light-emitting region quantum well layer, a green light quantum well layer and a blue light quantum well layer which are sequentially, periodically and alternately grown in the epitaxial direction. The backlight source is low in cost, the use of fluorescent powder can be reduced, and the display effect is good.

The application provides a nitride semiconductor laser with an optical field regulation layer, comprising, from bottom to top, a substrate, a lower limiting layer, a lower waveguide layer, an active layer, an upper waveguide layer, an electron blocking layer and an upper limiting layer, wherein the lower waveguide layer comprises a first lower waveguide layer and a second lower waveguide layer, the first lower waveguide layer is located below the second lower waveguide layer, a first optical field regulation layer is arranged between the first lower waveguide layer and the lower limiting layer, a second optical field regulation layer is arranged between the first lower waveguide layer and the second lower waveguide layer, the first lower waveguide layer, the second lower waveguide layer and the second optical field regulation layer all have an In element concentration variation trend, and the first optical field regulation layer has an Al element concentration variation trend. The application can inhibit the refractive index dispersion of the laser, reduce the influence of the high-concentration carrier concentration fluctuation of the lower waveguide layer on the refractive index variation of the active layer and the lower waveguide layer, improve the confinement factor of the laser and enhance the mode gain of the laser.

Embodiments of the present application provide a semiconductor structure manufacturing method and a semiconductor structure. The manufacturing method comprises: providing a substrate; the substrate comprises a substrate, a dielectric structure on the substrate, and a blocking material layer on the dielectric structure; the dielectric structure comprises at least one dielectric layer; forming a first mask layer on the blocking material layer; the first mask layer comprises a first opening exposing a top surface of the blocking material layer; forming a second mask layer in the first opening, and removing the first mask layer; the second mask layer comprises a second opening exposing a top surface of the blocking material layer; using the second mask layer as a mask to pattern the blocking material layer, to form a blocking layer for patterning the dielectric structure; the blocking layer comprises a third opening exposing a top surface of the dielectric structure; the third opening has a size greater than that of the second opening.

The invention discloses a crosslinking self-assembly hole blocking layer material containing siloxane and anchoring groups, and belongs to the field of perovskite solar cells. In the hole blocking layer material, the siloxane component triggers alcoholysis reaction in an isopropanol medium to form a silane precursor with hydroxyl; si-OH groups between adjacent molecules are subjected to a condensation reaction to form a Si-O-Si cross-linked network; meanwhile, a Si-OH group in the precursor and an ester group on the surface of a PCBM molecule are subjected to an ester exchange process, and Si-O-C covalent linkage is constructed to realize chemical anchoring of PCBM; and an anchoring functional group at the tail end of the material and the surface of a silver electrode form a strong coordination effect, so that thermally-driven silver atom migration is effectively inhibited, and performance degradation of the perovskite solar cell under a high-temperature working condition is remarkably relieved. The invention opens up a new way for improving the thermal stability of the perovskite solar cell, and effectively solves the problem of device stability caused by metal electrode ion diffusion.

A display device includes a plurality of pixels disposed in a display area, each of the pixels including a plurality of pixel electrodes spaced apart from each other, a first light blocking layer disposed in the display area and including a plurality of holes overlapping the plurality of pixel electrodes, a plurality of color filters disposed on the first light blocking layer and respectively corresponding to the plurality of holes, and a second light blocking layer disposed on the color filters and corresponding to the pixel electrodes of some of the plurality of pixels. The second light blocking layer surrounds the corresponding pixel electrodes of the some of the plurality of pixels in a plan view and includes a plurality of light blocking patterns having a constant width.

The invention provides a light emitting diode capable of reducing dislocation density and a preparation method thereof, and belongs to the technical field of photoelectron manufacturing. The light-emitting diode comprises a buffer layer, a dislocation barrier layer and an epitaxial layer which are stacked in sequence, the dislocation barrier layer comprises a first sub-layer, a second sub-layer and a third sub-layer which are stacked in sequence, the first sub-layer comprises a GaN layer, the second sub-layer comprises a carbon-doped GaN layer, and the third sub-layer comprises an AlGaN layer. According to the embodiment of the invention, the dislocation density of the epitaxial layer can be reduced, and the light-emitting effect of the light-emitting diode is improved.

The present invention provides a semiconductor device that can be driven at high speed. A memory string extends in a direction perpendicular to a substrate plane, and has a semiconductor layer containing indium oxide. The memory string includes MONOS memory cells, with a tunnel layer provided on the control-gate side and a block layer on the semiconductor-layer side. Holes are injected into a charge storage layer from the control-gate side during erase operations. The semiconductor layer has a region in contact with an oxide layer. The semiconductor layer and the oxide layer both contain crystal grains. A semiconductor layer with high crystallinity can be formed using the oxide layer as a crystal nucleus. Also, memory cells can be provided on the memory string. A transistor included in a memory cell can be a vertical transistor in which each of the semiconductor layer, a gate insulating layer, and a gate electrode are at least partially provided in a trench portion.

A quantum dot light emitting structure and a method for manufacturing the quantum dot light emitting structure, and an array substrate are disclosed. The quantum dot light emitting structure includes: a quantum dot light emitting layer; an electrode; and an electron transport layer located between the quantum dot light emitting layer and the electrode, the quantum dot light emitting structure further comprises an electron blocking layer located in the electron transport layer, a root-mean-square (RMS) roughness of a surface, close to the quantum dot light emitting layer, of the electron transport layer is different from a root-mean-square (RMS) roughness of a surface, away from the quantum dot light emitting layer, of the electron transport layer.

The application discloses a semiconductor laser and a display device thereof, which comprises a first semiconductor layer, a second semiconductor layer and an active layer between the first semiconductor layer and the second semiconductor layer; a first waveguide layer is arranged between the first semiconductor layer and the active layer, and a second waveguide layer is arranged between the second semiconductor layer and the active layer; an electron blocking layer is arranged between the second waveguide layer and the second semiconductor layer, the electron blocking layer comprises at least a P-type doped layer on the side close to the second semiconductor layer, the component of the P-type doped layer is greater than 1E19 cm ‑3 The P-type doping concentration of the electron blocking layer on the side close to the second semiconductor layer is higher than the P-type doping concentration of the electron blocking layer away from the second semiconductor layer, so that the P-type doping is prevented from diffusing to the second waveguide layer and causing the light absorption of the second waveguide layer to increase.

The embodiment of the invention provides an array substrate, a preparation method of the array substrate and a display panel, and relates to the technical field of display, the array substrate comprises a substrate and a driving wiring layer, the driving wiring layer is located on one side of the substrate, and the driving wiring layer comprises a transistor; the driving wiring layer comprises a first active layer located on one side of the substrate, a first conductive layer located on the side, away from the substrate, of the first active layer and a first barrier layer located on the side, away from the substrate, of the first conductive layer, the first barrier layer comprises a first barrier part, the transistor comprises a first grid electrode and a first active part, and the first grid electrode is located on the first conductive layer; the first active part is located on the first active layer, and the orthographic projection of the first blocking part on the substrate is at least partially overlapped with the orthographic projection of the first active part on the substrate. The risk that the transistor generates channel negative bias can be reduced, so that the convergence of the transistor can be improved.

This invention provides a GaN-based light-emitting diode epitaxial structure and its fabrication method. By introducing a Zn source as a surface activator throughout the growth process of the P-type AlGaN electron blocking layer, a P-type AlGaN electron blocking layer structure with a gradient distribution of Zn concentration along the direction of the P-type AlGaN electron blocking layer is constructed. Specifically, through the core role of the Zn surface activator and the innovative design of the Zn concentration gradient distribution, a smooth rise in the conduction band Ec and no loss of strong electron blocking capability are achieved, while ensuring that the valence band Ev is smooth and without spikes throughout and that hole injection is unimpeded throughout.

The present disclosure provides a light-emitting device and a display device, the light-emitting device comprising a plurality of functional layers stacked in sequence, the plurality of functional layers comprising an anode, a hole transport layer, an electron blocking layer, a light-emitting layer, a hole blocking layer, an electron transport layer and a cathode, the light-emitting layer comprising at least two light-emitting bodies, different light-emitting bodies corresponding to different color sub-pixels; the light-emitting device further comprising at least one energy level transition film layer, the energy level transition film layer being arranged between at least one light-emitting body and the hole transport layer and / or the hole blocking layer, wherein the energy band gap difference between two functional film layers adjacent to the energy level transition film layer is greater than a predetermined value, and the energy level of the energy level transition film layer is between the two functional film layers adjacent thereto. The light-emitting device and the display device provided by the embodiments of the present disclosure can improve the light-emitting efficiency of the light-emitting body, so as to improve the problems such as poor display caused by the difference in light-emitting characteristics of RGB three sub-pixels.

The present invention provides a method for preparing a light-emitting element, relating to the field of semiconductor technology. The method comprises the following steps: sequentially growing a buffer layer, an N-type semiconductor layer, a quantum well layer, and a P-type semiconductor layer on a substrate; etching through the P-type semiconductor layer and the quantum well layer to completely isolate the LED core particles in the quantum well layer to form independent LED pixel core particles; depositing a current spreading layer on the P-type semiconductor layer; depositing a current blocking layer on the current spreading layer; transferring the LED chip to a driver circuit substrate, and completing packaging. The technical solution provided by the present invention can eliminate the processing steps of laser substrate stripping, removal of residual metal gallium, thin-film encapsulation of LED core particles, and subsequent cover plate gluing and vacuum bonding in module packaging in MicroLED mass transfer technology, greatly reducing the difficulty of engineering implementation.

A photomask, a method of forming a pattern, a method of manufacturing a display device, and an electronic device are provided. The photomask includes a transparent substrate having a first surface and a second surface opposite each other, a first semi-transparent layer disposed on the first surface of the transparent substrate, a light-blocking layer disposed on the second surface of the transparent substrate, and a second semi-transparent layer disposed between the second surface of the transparent substrate and the light-blocking layer. The second semi-transparent layer has a transmittance higher than that of the first semi-transparent layer.

The application discloses a display panel and a display device, the display panel comprising: a plurality of first pixel areas, a plurality of second pixel areas and a plurality of third pixel areas; the light-emitting colors of the first pixel areas, the second pixel areas and the third pixel areas are different; the display panel further comprises: a driving substrate; a plurality of light-emitting devices located on one side of the driving substrate; the light-emitting device comprises a first anode, a first light-emitting layer, a charge generation layer, a second light-emitting layer and a first cathode which are sequentially stacked; the charge generation layer generates electrons and holes under the action of an electric field; at least the light-emitting device located in the first pixel area is a first light-emitting device; the first light-emitting device further comprises a second cathode and a first charge blocking layer. The display panel disclosed by the application sets the second cathode and the first charge blocking layer in the first light-emitting device of the first pixel area, so that the light-emitting color of the first pixel area is the light-emitting color of the first light-emitting layer, the power consumption and heat of the display panel are reduced, and the service life of the display panel is prolonged.

Methods and apparatus for substrate processing include: depositing a bulk layer of a dielectric material comprising a metal onto a device attached to a device substrate; depositing a graded layer of the dielectric material with a compositional gradient, onto the bulk layer; and depositing a bonding cap layer of the metal, having a purity of at least 99% by weight, onto the graded layer, wherein the graded layer has a dielectric gradient from substantially dielectric adjacent to the bulk layer to substantially conductive adjacent the bonding cap layer.