1123 results about "Contact layer" patented technology

The invention provides a patterned photonic crystal laser and a preparation method thereof, the laser comprises a substrate, and a first mask layer, a photonic crystal layer and a second mask layer which are sequentially deposited on the substrate, a light emitting area is etched in the central area of the second mask layer, and transparent conductive layers are deposited on the surface of the second mask layer and the light emitting area; a p-annular electrode is arranged on the surface of the transparent conductive layer on the second mask layer, and an n-annular electrode is arranged below the substrate; the photonic crystal layer is composed of a nanorod array and a polymer filled in gaps of nanorods; holes distributed in a patterned array are etched in the surface of the first mask layer, and nanorods are epitaxially grown in hole areas; the nanorod is formed by sequentially depositing a substrate contact layer, a first waveguide layer, a multi-quantum well layer, a second waveguide layer, a coating layer and a component gradient layer. According to the invention, through collaborative design optimization of all the layers, emission of laser with specific wavelength and preparation of a laser emitting laser with single longitudinal mode, narrow linewidth and stable wavelength are realized.

The invention discloses a low-power-consumption photonic integrated device preparation method and a corresponding device, and relates to the technical field of semiconductor optoelectronic integrated devices.The device comprises a substrate, a cantilever beam type grating layer, two gain layers, two modulator layers, a wrapping layer and an electric contact layer, the two gain layers and the two modulator layers are symmetrically distributed, and the wrapping layer and the electric contact layer form a shallow ridge waveguide structure. The two symmetrically-distributed gain layers and the middle cantilever beam type grating layer jointly form a double-end resonant cavity structure, the structure shares a unified grating and a thermal tuning platform to achieve continuous, synchronous and high-precision control over cavity mode wavelengths, and balanced modulation and phase synchronization of double-end output are achieved in cooperation with the symmetrically-integrated high-speed modulator layers on the two sides. According to the technical scheme, the gain layer, the grating layer and the modulator layer are symmetrically integrated on the same substrate, the alignment error of a multi-cavity structure is reduced, synchronous scanning, low drift and strong anti-interference high-quality laser output can be obtained, meanwhile, efficient thermal tuning is conducted through the cantilever beam type grating layer, and power consumption is remarkably reduced.

The invention discloses an annealing temperature control method based on a differentiated ohmic contact material, and aims to solve the problems that the annealing temperature of an N-surface Au / Ge ohmic contact layer of an existing AlGaInP-based red light Micro-LED is not accurately monitored, a temperature field is not uniform and is difficult to detect, and abnormal response lags, the method comprises seven steps of processes (two times of patterning, two times of metal coating, two times of photoresist removal, annealing and observation), and the annealing temperature of the N-surface Au / Ge ohmic contact layer of the existing AlGaInP-based red light Micro-LED is controlled. Preparing a first Au / Ge ohmic contact layer (for function) and a second Au / Ge / Ni ohmic contact layer (for detection) on the N surface of the wafer; by means of the characteristic that Ni inhibits Au / Ge agglomeration, the two-layer agglomeration state difference is observed through an optical microscope, and the temperature is judged (in the normal state, the former agglomerates, and the latter does not agglomerate); the method is convenient in detection, supports batch detection, can find temperature abnormity in real time, improves the process stability, and is suitable for industrial mass production.

The invention relates to the technical field of chip preparation, and provides a chip based on an annular photonic crystal and a preparation method thereof. The preparation method comprises the following steps: growing a nucleating layer on a substrate; growing a superlattice structure on one side, away from the substrate, of the nucleating layer; sequentially growing an n-type coating layer, an n-type waveguide layer, a quantum well and a p-type electron blocking layer on one side, deviating from the nucleating layer, of the superlattice structure; etching a plurality of annular cavities on the p-type electron barrier layer to form an annular photonic crystal; growing a p-type extension contact layer on one side, deviating from the quantum well, of the p-type electron blocking layer; and carrying out in-situ annealing treatment. According to the preparation method, the directivity of the photonic band gap can be effectively adjusted, uniform light waves in all directions on the side face can be formed, so that leakage of laser from a non-light-emitting area on the side face is restrained, the light emitting efficiency is improved, the annular photonic crystals are periodically distributed, and the light beam quality is effectively guaranteed.

The invention relates to the technical field of semiconductors, in particular to a source heterojunction contact semiconductor structure and device and a manufacturing method, the semiconductor structure comprises a gate structure, a body region structure, a source structure and a drain structure, and the source structure comprises a polycrystalline silicon source contact layer; the semiconductor structure comprises a body region structure and a polycrystalline silicon source contact layer, the body region structure is surrounded by the gate structure, a source contact region is arranged in the body region structure, the polycrystalline silicon source contact layer is in contact with the source structure through the source contact region so as to form a heterojunction diode with the source structure, and the heterojunction diode is a freewheeling diode of the semiconductor structure. The drain electrode structure is located on one side, back to the gate electrode structure, of the body region structure; the semiconductor structure can be a SiC MOSFET structure, reverse conduction voltage drop during follow current of the SiC MOSFET can be greatly reduced, and conduction loss and loss caused during switching are reduced.

The invention discloses a quick response flexible temperature sensor with low thermal crosstalk and a preparation method thereof. The sensor comprises a contact layer, a sensing layer, an electrode layer and a substrate layer, wherein the contact layer comprises a heat conduction layer and a heat insulation network; the heat-conducting layer is made of a heat-conducting composite material and comprises polydimethylsiloxane and flake carbon powder; the heat insulation network and the substrate layer are made of a heat insulation composite material which comprises polydimethylsiloxane and hollow glass microspheres; the sensing layer comprises a plurality of sensing units arranged in an array, the sensing units are connected with the electrode layer and output resistance signals, the heat conduction layer and the substrate layer are arranged over and under the sensing units respectively, and the heat conduction and heat insulation synergistic structure can enhance the quick response of the sensing units to the temperature; a thermal insulation network is embedded in the contact layer to block thermal crosstalk between adjacent sensing units. The temperature sensor has the advantages of quick response, low thermal crosstalk and high reliability in a wide range, and large-scale production and preparation can be realized.

The invention relates to the technical field of semiconductor lasers, in particular to a vertical-cavity surface-emitting semiconductor laser and a manufacturing method thereof.The vertical-cavity surface-emitting semiconductor laser comprises a substrate, an N-type DBR layer, an active region, an oxide layer, a P-type DBR layer, a P contact layer and a P metal layer which are sequentially arranged from bottom to top, oxidation holes are formed in the oxide layer, a carbon displacement modulation structure layer is arranged in the P contact layer, and the P metal layer is arranged in the N-type DBR layer. The lower end of the carbon displacement modulation structure layer is located in the P-type DBR layer, the carbon displacement modulation structure layer is right opposite to the oxidation hole, and the material of the carbon displacement modulation structure layer is GaAs doped with carbon atoms. The high-frequency characteristic, single-mode performance, ultra-long service life, wide-temperature work and extreme environment resistance which are difficult to reach by a traditional pure oxidation limiting scheme and a traditional diffusion technology and oxidation limiting VCSEL scheme are achieved through cooperation of precise control of the SEG technology and the ultra-low diffusion characteristic of carbon.

The invention provides a semiconductor laser chip and a preparation method, and belongs to the technical field of semiconductor laser chip preparation, and the semiconductor laser chip comprises an N-surface metal, a substrate, an N-type limiting layer, an N-type waveguide layer, a tensile strain quantum well, a P-type waveguide layer, a P-type limiting layer, an ohmic contact layer, a SiO2 insulating layer, a first P-surface metal layer and a second P-surface metal layer which are sequentially arranged from bottom to top. Waveguide grooves are symmetrically formed in the two sides of the ohmic contact layer and penetrate through the ohmic contact layer, the bottoms of the grooves sink to the P-type limiting layer but do not exceed the P-type limiting layer, and a ridge waveguide is formed between the two grooves. The depth of the waveguide groove is of a stepped structure in the longitudinal direction, the depth of the area close to the cavity surface is increased to the N-type waveguide layer, the area completely covers the SiO2 insulating layer and the first layer of P-surface metal, but no second layer of P-surface metal exists, and the longitudinal stepped structure is formed. Through the design of the tensile strain quantum well and the stepped waveguide groove, cavity surface tensile strain release is realized, light absorption is reduced, and the reliability and the service life of the chip are improved.

The invention provides a mid-infrared high-speed waveguide type modulator capable of being integrated on a chip and a design method, and belongs to the technical field of semiconductor optoelectronic devices, aiming at solving the problem that an existing mid-infrared modulator cannot consider high speed, low loss and on-chip integration compatibility at the same time. The modulator comprises an InP substrate, an epitaxial structure growing on the InP substrate and a traveling wave electrode structure prepared on the epitaxial structure. The epitaxial structure sequentially comprises an InP contact layer, an InAlAs lower light limiting layer, an InP / InGaAs lower waveguide layer, an asymmetric multi-quantum well structure, an InP / InGaAs upper waveguide layer, an InAlAs upper light limiting layer and a Cap layer from bottom to top. The design method comprises the steps of selecting a compatible material system, designing an asymmetric multi-quantum well structure, processing an epitaxial structure into a ridge waveguide structure, designing a traveling wave electrode and carrying out device characterization testing. The method is suitable for design and preparation of the middle-infrared band high-speed light modulation device.

The utility model provides an electrocardiogram electrode patch. The electrocardiogram electrode patch comprises a transmission part, a first attaching part and a connecting wire, the transmission part is used for being detachably connected with electrocardiogram detection equipment, and the first attaching part is used for being attached to a to-be-detected first target position; the transmission part is connected with the first attaching part through the connecting line; the transmission part comprises a shielding grounding contact and a first transmission contact; the first attaching part comprises a first flexible circuit board, and the first flexible circuit board comprises a first shielding layer and a detection contact layer; the connecting line comprises a signal transmission core and a second shielding layer wrapping the signal transmission core. The first shielding layer is connected with the shielding grounding contact through the second shielding layer, and the detection contact layer is connected with the first transmission contact through the signal transmission core. By means of the configuration, signals and interference signals can be transmitted independently, and the stability of electrocardiosignal transmission can be effectively improved.

The invention discloses a semiconductor laser and a preparation method thereof, which can be used in the field of semiconductor device preparation, and the method comprises the steps: firstly, providing a first conductive type substrate; then, epitaxially growing a buffer layer of a first conduction type, a lower optical waveguide limiting layer, a quantum well active light-emitting layer, an upper optical waveguide limiting layer, a corrosion barrier layer, a current injection layer and an intrinsic ohmic contact layer on the substrate in sequence to obtain a multi-layer epitaxial layer; then, etching the multi-layer epitaxial layer to the corrosion barrier layer based on a preset pattern to form a ridge-shaped table which starts from the intrinsic ohmic contact layer and is deeply cut off to the corrosion barrier layer; and finally, performing particle doping in a region corresponding to the ridge-shaped table, and converting one sides, close to the corrosion barrier layer, of the intrinsic ohmic contact layer, the current injection layer, the corrosion barrier layer and the upper optical waveguide limiting layer into a second conduction type. Therefore, current limitation can be realized without performing multiple epitaxy like a traditional buried heterojunction, and the production cost and the process difficulty are greatly reduced.

The invention discloses an AlGaInP red light LED chip structure with a polarization-induced tunnel junction and a preparation method thereof. The chip structure sequentially comprises a GaAs substrate, an n-type GaAs buffer layer, an n-type etching barrier layer, an n-type GaAs ohmic contact layer, an n-type limiting layer, a non-doped InGaP / quantum well structure, a p-type spacer layer, a p-type AlGaInP polarization-induced doping layer, an insertion layer and an n-type ohmic contact layer from bottom to top. Wherein the p-type AlGaInP polarization induction doping layer introduces a piezoelectric polarization electric field through an Al component gradual change design, high-density two-dimensional hole gas is formed through induction, and the high-Al component insertion layer and the n-type ohmic contact layer form a tunnel junction; according to the invention, the problems of low p-type doping efficiency and high resistivity of the AlGaInP material with high Al component are fundamentally solved, the epitaxial structure and the chip process are simplified, the series resistance of the chip is reduced, the luminous efficiency is improved, the yield is improved, and the method has remarkable technical and commercial values.

The invention belongs to the technical field of shoe preparation, and relates to a functional shoe with a plantar pressure detection function and a preparation method, a shoe body is composed of an upper, a composite sole and an insole, and a plantar pressure detection system is integrated in the insole. The plantar pressure detection system sequentially comprises an antibacterial contact layer, a flexible sensing layer, a buffer layer, a circuit sealing layer and an anti-skid substrate layer from a contact surface to a substrate, the composite sole is composed of a rubber outsole, an EVA secondary foaming midsole and a PE anti-puncture layer. According to the functional shoes and boots provided by the invention, the insoles are formed by compounding the PU and the PORON, so that the functional shoes and boots have good buffering and supporting performance; the patterns of the shoe sole are optimally designed, so that the shoe sole has good anti-skid performance and water and sediment discharging performance; the preparation process is simple, the use requirements in a complex environment can be met, and better protection and comfort are provided for a user.

The invention relates to a solar cell and a manufacturing method thereof, and a photovoltaic module, and the manufacturing method comprises the steps: providing a substrate, a first surface comprises first regions and non-first regions which are alternately disposed in a first direction, the non-first regions comprise interval regions and second regions, and the interval regions are located between the adjacent first regions and second regions; forming a first mask layer on the first surface, and at least removing the first mask layer corresponding to the first region; a first passivation contact layer is formed on the first area and the side, away from the second surface, of the first mask layer, at least the first passivation contact layer and the first mask layer corresponding to the non-first area are removed, the first area and the second area are located on the same first plane, and the first plane is parallel to the plane where the substrate is located; and forming a second passivation contact layer on the first passivation contact layer and one side, far away from the second surface, of the non-first region, and at least removing the second passivation contact layer corresponding to the first region and the spacer region. The performance of the solar cell can be improved.

The invention belongs to the technical field of intelligent medical treatment, and provides a stretch sock for preventing lower limb venous thrombosis, comprising: a wrapping body having a pressure layer located on the outer side, a contact layer located on the inner side, and a functional layer located between the pressure layer and the contact layer; the physiological index sensor is arranged on the functional layer and used for collecting physiological index data of the user; the stimulating electrode is arranged on the contact layer, is in contact with the skin of the user and is used for stimulating muscles of the user; the controller is connected with the physiological index sensor and the stimulating electrode and used for receiving the physiological index data and generating a control signal of the stimulating electrode based on the physiological index data and the user baseline data so as to control the stimulating electrode to execute the stimulating parameters corresponding to the control signal. According to the stretch sock for preventing the lower limb venous thrombosis, personalized stimulation can be carried out based on the personalized physiological indexes of the current wearing user, and the prevention effect of the lower limb venous thrombosis is improved.

According to the LED thin-film device and the preparation method thereof provided by the invention, the problem that a silicon support substrate is broken due to overlarge warping degree after evaporation is avoided in a manner of bonding and then performing back gold evaporation. By evaporating a plurality of stress-adjusting metal layers, the metal on the back surface of the silicon support substrate generates downward large pressure stress on the silicon support substrate so as to counteract the pressure stress back to the silicon support substrate generated after a substrate of an epitaxial wafer is removed, so that the warping degree of a thin film device is reduced, and large-scale production is realized. The preparation method comprises the following steps: providing an LED epitaxial wafer, wherein the LED epitaxial wafer comprises a substrate and an epitaxial layer; sequentially preparing a reflector layer and a first bonding layer on the epitaxial layer; providing a silicon support substrate, and preparing a second bonding layer on the front surface of the silicon support substrate; the thickness of the silicon support substrate is less than 180 [mu] m; the LED epitaxial wafer and the silicon supporting substrate are bonded; evaporating a metal layer for adjusting stress on the back surface of the silicon support substrate; the metal layer sequentially comprises a bonding layer, a stress adjusting layer and a contact layer; and removing the substrate.

The invention relates to a photovoltaic cell and a preparation method of the photovoltaic cell. The photovoltaic cell comprises: a substrate having a textured surface, the textured surface comprising a plurality of first pyramids and a plurality of second pyramids, the plurality of second pyramids being arranged between the plurality of first pyramids; the tower footing size of the second pyramid is larger than that of the first pyramid, and the tower height of the second pyramid is larger than that of the first pyramid. According to the invention, the scattering capability of broadband light can be enhanced, the problem that the traditional single-scale pyramid texture surface is insufficient in scattering of long-wave light is effectively improved, and the light capturing and absorbing effects of the photovoltaic cell are improved; the dual-scale pyramid suede can be better matched with the passivation contact layer, so that the surface recombination phenomenon is reduced, and the high open-circuit voltage of the photovoltaic cell can be maintained; the second pyramid can also provide an adaptive contact basis for the metal electrode, and the contact resistance between the electrode and the substrate is reduced. Therefore, the photoelectric conversion efficiency of the photovoltaic cell can be effectively improved.

The invention discloses a wavelength thermal tuning photon integrated device and a preparation method thereof.The device comprises a substrate, a modulator layer, a front sampling grating layer, a gain layer, a rear sampling grating layer, a cover layer and an electric contact layer, the cover layer and the electric contact layer jointly form a shallow ridge waveguide structure, and the shallow ridge waveguide structure is transversely arranged in the center of the upper portion of each functional layer; the whole cover layer and the electric contact layer are etched according to a preset ridge-shaped strip pattern, a cantilever beam structure is transversely arranged in the post-sampling grating layer, the cantilever beam structure comprises a cantilever beam and air grooves in the two sides of the cantilever beam, and the cantilever beam is located under the shallow ridge waveguide structure; the cantilever beam structure is formed by etching the rear sampling grating layer below the shallow ridge waveguide structure according to a preset cantilever strip pattern; according to the technical scheme, wavelength thermal tuning is achieved through collaborative design of the shallow ridge waveguide structure and the cantilever beam grating structure, limitation of material carrier concentration is avoided, thermal response is fast, and power consumption is remarkably reduced.

The invention provides a micro-disk structure semiconductor laser and a preparation method, and belongs to the technical field of semiconductor lasers. The high-concentration Zn-doped p-GaAs multi-quantum-well multi-quantum-well light-emitting diode comprises a SiO2 barrier layer, an n-GaAs substrate with the thickness of 100 microns, an n-GaAs contact layer with the thickness of 100 nm, a Si-doped n-AlGaInP limiting layer with the thickness of 200 nm, an n-AlGaInP waveguide layer with the thickness of 400 nm, a first GaInP / AlGaInP multi-quantum-well layer, a GaAs barrier layer, a second GaInP / AlGaInP multi-quantum-well layer, an undoped p-AlGaAs waveguide layer with the thickness of 150 nm, a Zn-doped p-AlGaInP limiting layer with the thickness of 200 nm and a high-concentration Zn-doped p-GaAs contact layer with the thickness of 100 nm. By controlling the thickness and the doping concentration of each layer, efficient limitation and injection of carriers are realized; due to the design of the double multi-quantum well layer and the barrier layer, the device can realize stable lasing in two wavebands of 808nm and 650nm; the undoped waveguide layer effectively reduces the optical loss, prolongs the photon lifetime, and improves the laser output efficiency. And the quantum efficiency and the temperature stability of the device are improved.

A semiconductor structure includes: a bit line, a transistor structure, and a capacitor structure arranged in sequence in a first direction, the capacitor structure extending in the first direction, both the transistor structure and the capacitor structure including a portion of a semiconductor layer, and the semiconductor layer extending in the first direction; and a bit line contact layer on an end surface of the semiconductor layer that is away from the capacitor structure, the bit line contact layer and the semiconductor layer including the same semiconductor material, and the bit line covering an end surface of the bit line contact layer that is away from the semiconductor layer and covering at least a portion of a sidewall of the bit line contact layer that extends in the first direction.

The invention discloses a vertical LED chip and a preparation method thereof, and relates to the field of semiconductor photoelectric devices. The preparation method of the vertical LED chip comprises the following steps: S1, providing an epitaxial wafer; s2, forming a transparent conductive layer, a SiO2 mask layer and a photoresist layer in sequence; s3, removing the SiO2 mask layer and the transparent conductive layer in the first preset area; s4, removing the P-type contact layer in the first preset area; s5, forming a dielectric layer; s6, the dielectric layer on the SiO2 mask layer is removed, and then the remaining SiO2 mask layer is removed; s7, forming a DBR reflecting layer; s8, etching and exposing the transparent conductive layer; s9, sequentially forming a metal reflecting layer and a bonding layer; s10, bonding with a second substrate; s11, forming an N electrode and a P electrode to obtain an LED wafer; and S12, cutting the LED wafer to obtain a vertical LED chip. According to the invention, the luminous efficiency of the vertical LED chip can be improved.

The invention provides an all-dielectric metasurface enhanced broadband photoelectric response avalanche photodetector. The avalanche photodetector comprises an antireflection film, an upper / lower electrode, an oxide layer, a photosensitive surface, a protection ring, a cut-off ring, a multiplication layer, an intrinsic absorption layer and a contact layer. The all-dielectric metasurfaces are located on the antireflection film layer and the contact layer respectively. The photoelectric response characteristic of the avalanche photodetector is improved by means of the structural design of the material, the preparation process of the all-dielectric metasurface is compatible with the process of the detector, and the advantages of high structural controllability and device consistency are achieved. Finally, the long-term problems of incompatible process, uncontrollable metasurface structure and difficulty in large-scale preparation of the existing technical scheme are solved.

The utility model relates to the technical field of back contact, and particularly discloses a back contact cell and a photovoltaic system, the back contact cell comprises a silicon substrate, and the backlight surface of the silicon substrate is provided with a plurality of first areas and second areas which are alternately arranged; the first semiconductor composite layer is arranged in the first region and comprises a tunneling passivation layer and a first doping layer which are sequentially arranged in the direction away from the silicon substrate; the second semiconductor composite layer is at least partially arranged in the second area and comprises a passivation contact layer and a second doping layer which are sequentially arranged in the direction away from the silicon substrate, and the polarity of the second doping layer is opposite to that of the first doping layer; the composite TCO layer is arranged in at least partial areas of the sides, back to the silicon substrate, of the first doping layer and the second doping layer, the composite TCO layer comprises a first TCO layer and a second TCO layer which are sequentially arranged in the direction away from the silicon substrate, and the refractive index of the first TCO layer is larger than that of the second TCO layer. And the cell conversion efficiency can be effectively improved.

The present invention provides a back-contact solar cell, a manufacturing method thereof, and a photovoltaic assembly in the field of photovoltaics. The back-contact solar cell includes a substrate and alternating first and second doped regions, a first passivation contact layer located in the first doped regions and a second passivation contact layer located in the second doped regions, a doped oxide layer including a first portion located on the surface of the first passivation contact layer and a second portion located in the second doped regions, and a connecting layer located on a portion of the first portion, surrounding a portion of the second portion, and electrically connected to the second passivation contact layer, and located on a side of the first passivation contact layer and electrically connected to the first passivation contact layer. [Effects] At the very least, the hot spot effect can be improved and the photoelectric conversion efficiency can be increased.

A triboelectric generator can include respective contact members including a first contact member and second contact member. The respective contact members can be movable with respect to each other such that the respective contact members separate from each other in a first configuration and contact each other in a second configuration. The first contact member can include a first conductive layer and a contact layer. The second contact member can be spaced apart from the first contact member in the first configuration and can include an insulating contact layer and a second conductive layer. The insulating contact layer can be configured to come into contact with the contact layer of the first contact member and the transition of the respective contact members from the first configuration to the second configuration can create triboelectric charges. In some examples, the first contact member can include a non-contact insulating layer.

The invention relates to an optoelectronic device (1), in particular a microLED, comprising a layer stack with structured sidewalls (16) extending substantially perpendicular to an emission surface (110) of a second doped semiconductor layer (12), and an active region (13) on a first section of a first doped semiconductor layer (11) with a second section extending laterally from the sidewalls. A layer (20) of dielectric material is arranged on the sidewalls (16) and on the second section of the first doped semiconductor opposite the emission surface (110), but not on a top surface of the layer stack. It comprises chamfered sidewalls (200). A conductive and reflective layer (21) is arranged on the chamfered sidewalls (200), which contacts the contact layer (14) on the top surface.The component also includes an output coupling structure (50) located above the emission surface (110).

The present invention provides a dressing interface for connecting a negative pressure source to a dressing. The dressing interface may have a connecting member including an opening, a first adhesive region having a first region peel strength, and a second adhesive region having a second region peel strength less than the first region peel strength. The dressing interface may also have a flange connected to the connecting member, and a conduit housing connected to the flange and extending through the opening in the contact layer.

A method for manufacturing an integrated circuit includes forming an active area in a substrate, forming a gate structure on the active area, depositing an insulating layer, etching electrical contact openings to the gate structure and the active area, depositing a first conductive composition in the electrical contact openings to form an electrical contact layer that partially fills the electrical contact openings, filling a remainder of the electrical contact openings to form a plurality of electrical contacts. The method includes etching thermal contact openings to the active area, depositing a second conductive composition in the thermal contact openings to form a thermal contact layer that partially fills the thermal contact openings, wherein the first conductive composition differs from the second conductive composition, filling a remainder of the thermal contact openings to form a plurality of thermal contacts, and thermally connecting the plurality of thermal contacts and a heat dissipation structure.

An edge-emitting semiconductor laser is described. The edge-emitting semiconductor laser comprises a first semiconductor layer exhibiting a first conductivity type, a second semiconductor layer exhibiting a second conductivity type, and an active region located between the first and second semiconductor layers and configured to generate electromagnetic radiation. The edge-emitting semiconductor laser further includes a contact layer for electrically connecting the first semiconductor layer and a lattice structure with a plurality of spaced-apart structures. The contact layer is located on the side of the first semiconductor layer facing away from the active region, and the lattice structure is located between the first semiconductor layer and the contact layer. A method for fabricating an edge-emitting semiconductor laser is also described.

The invention relates to a light-emitting device comprising a semiconductor layer stack with a first layer of a first conductivity type, a second layer of a second conductivity type, and an active region arranged between the first and second layers, which is configured to generate light of a first wavelength.Furthermore, the light-emitting device comprises a first contact layer arranged on a bottom side of the semiconductor stack and electrically contacting the second layer; a second contact layer, substantially transparent to light of the first wavelength, arranged on a top side of the semiconductor stack opposite the bottom side and electrically contacting the first layer; a first electrical contact electrically contacting the first contact layer; a first dielectric layer covering at least one side face of the semiconductor stack connecting the top and bottom sides; and a converter layer arranged on or above the second contact layer and configured to convert light of the first wavelength into light of a second wavelength.The converter layer completely covers a central area through which light of the first wavelength generated by the semiconductor layer stack is coupled into the converter layer, and the central area is spaced at least 0.1 µm apart in a plane parallel to the top surface from an outer edge of the light-emitting device lying in the plane.