1739 results about "Charge carrier" patented technology

In electronic displays or imaging units, the control of pixels is achieved by an array of transistors. These transistors are in a thin film form and arranged in a two-dimensional configuration to form switching circuits, driving circuits or even read-out circuits. In this invention, thin film transistors and circuits with indium oxide-based channel layers are provided. These thin film transistors and circuits may be fabricated at low temperatures on various substrates and with high charge carrier mobilities. In addition to conventional rigid substrates, the present thin film transistors and circuits are particularly suited for the fabrication on flexible and transparent substrates for electronic display and imaging applications. Methods for the fabrication of the thin film transistors with indium oxide-based channels are provided.

A device for emitting radiation at a predetermined wavelength is presented. This device has a cavity with an active layer in which said radiation is generated by charge carrier recombination. The edges of the device define the region or space for radiation and/or charge carrier confinement. At least one of the edges of this cavity has a substantially random grating structure. The edge of the device has substantially random grating structure and can extend as at least one edge of a waveguide forming part of this radiation emitting device. The radiation emitting device of the present invention can have a cavity comprising a radiation confinement space that includes confinement features for the charge carriers confining the charge carriers to a subspace being smaller than the radiation confinement space within the cavity. The emitting device can comprise at least two edges forming, in cross-section, a substantially triangular shape. The angle between these two edges is smaller than 45°. At least one of the two edges has a transparent portion. the devices according to the present invention can be arranged in arrays.

To provide a semiconductor device including a thin film transistor having excellent electric characteristics and high reliability and a manufacturing method of the semiconductor device with high mass productivity. The summary is that an inverted-staggered (bottom-gate) thin film transistor is included in which an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer, a channel protective layer is provided in a region that overlaps a channel formation region of the semiconductor layer, and a buffer layer is provided between the semiconductor layer and source and drain electrodes. An ohmic contact is formed by intentionally providing the buffer layer having a higher carrier concentration than the semiconductor layer between the semiconductor layer and the source and drain electrodes.

A photovoltaic device and related methods. The device has a structured material positioned between an electron collecting electrode and a hole collecting electrode. An electron transporting/hole blocking material is positioned between the electron collecting electrode and the structured material. In a specific embodiment, negatively charged carriers generated by optical absorption by the structured material are preferentially separated into the electron transporting/hole blocking material. In a specific embodiment, the structured material has an optical absorption coefficient of at least 10³ cm⁻¹ for light comprised of wavelengths within the range of about 400 nm to about 700 nm.

The present disclosure provides a carrier channel with an element concentration gradient distribution. The carrier channel includes a substrate and a carrier channel structure. The carrier channel structure is stacked on the substrate, wherein a ratio of a height and a width of the carrier channel is greater than 1, and the carrier channel is crystallized from the contact surface by a rapid melting growth process, thus the carrier channel structure has the element concentration gradient distribution.

This invention provides an amorphous oxide semiconductor thin film, which is insoluble in a phosphoric acid-based etching solution and is soluble in an oxalic acid-based etching solution by optimizing the amounts of indium, tin, and zinc, a method of producing the amorphous oxide semiconductor thin film, etc. An image display device (1) comprises a glass substrate (10), a liquid crystal (40) as a light control element, a bottom gate-type thin film transistor (1) for driving the liquid crystal (40), a pixel electrode (30), and an opposing electrode (50). The amorphous oxide semiconductor thin film (2) in the bottom gate-type thin film transistor (1) has a carrier density of less than 10⁺¹⁸ cm⁻³, is insoluble in a phosphoric acid-based etching liquid, and is soluble in an oxalic acid-based etching liquid.

A semiconductor light emitting device is disclosed, including a semiconductor substrate, an active region comprising a strained quantum well layer, and a cladding layer for confining carriers and light emissions, wherein the amount of lattice strains in the quantum well layer is in excess of 2% against either the semiconductor substrate or cladding layer and, alternately, the thickness of the quantum well layer is in excess of the critical thickness calculated after Matthews and Blakeslee.

To offer a semiconductor device including a thin film transistor having excellent characteristics and high reliability and a method for manufacturing the semiconductor device without variation. The summary is to include an inverted-staggered (bottom-gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used for a semiconductor layer and a buffer layer is provided between the semiconductor layer and source and drain electrode layers. An ohmic contact is formed by intentionally providing a buffer layer containing In, Ga, and Zn and having a higher carrier concentration than the semiconductor layer between the semiconductor layer and the source and drain electrode layers.

A method and system for providing a magnetic element is disclosed. The method and system include providing a pinned layer, a magnetic current confined layer, and a free layer. The pinned layer is ferromagnetic and has a first pinned layer magnetization. The magnetic current confined layer has at least one channel in an insulating matrix and resides between the pinned layer and the free layer. The channel(s) are ferromagnetic, conductive, and extend through the insulating matrix between the free layer and the pinned layer. The size(s) of the channel(s) are sufficiently small that charge carriers can give rise to ballistic magnetoresistance in the magnetic current confined layer. The free layer is ferromagnetic and has a free layer magnetization. Preferably, the method and system also include providing a second pinned layer and a nonmagnetic spacer layer between the second pinned layer and the free layer. In this aspect, the magnetic element is configured to allow the free layer magnetization to be switched using spin transfer.

A photovoltaic device and related methods. The device has a nanostructured material positioned between an electron collecting electrode and a hole collecting electrode. An electron transporting/hole blocking material is positioned between the electron collecting electrode and the nanostructured material. In a specific embodiment, negatively charged carriers generated by optical absorption by the nanostructured material are preferentially separated into the electron transporting/hole blocking material. In a specific embodiment, the nanostructured material has an optical absorption coefficient of at least 10³ cm⁻¹ for light comprised of wavelengths within the range of about 400 nm to about 700 nm.

PCT No. PCT/FR97/01075 Sec. 371 Date Feb. 12, 1998 Sec. 102(e) Date Feb. 12, 1998 PCT Filed Jun. 13, 1997 PCT Pub. No. WO97/48135 PCT Pub. Date Dec. 18, 1997A new quantum well MOS transistor is described along with a processes for manufacturing it. In this transistor, the source and drain areas are separated from the channel by sufficiently thin insulating layers to enable the passage of charge carriers by the tunnel effect. Each of the source and drain areas is separated from the substrate by an electrically insulating layer that is sufficiently thick to prevent charge carriers from passing through this insulating layer.

A device includes first and second contacts formed on a channel material, a film of doped first insulator material interposed between the first and second contacts, and a second insulator material interfaced with the doped first insulator material with an area of said channel material therebetween. The second insulator material is doped so as to have carriers of opposite charge to those in the channel material.

Nanostructured materials and photovoltaic devices including nanostructured materials are described. In one embodiment, a nanostructured material includes: (a) a first nano-network formed from a first set of nanoparticles; and (b) a second nano-network coupled to the first nano-network and formed from a second set of nanoparticles. At least one of the first set of nanoparticles and the second set of nanoparticles are formed from an indirect bandgap material. The nanostructured material is configured to absorb light to produce a first type of charge carrier that is transported in the first nano-network and a second type of charge carrier that is transported in the second nano-network. The nanostructured material has an absorption coefficient that is at least 10³ cm⁻¹ within a range of wavelengths from about 400 nm to about 700 nm.

Device are described that include a semiconductor material layer and at least one graphene-based electrode disposed over a portion of the semiconductor material layer, such that the at least one graphene-based electrode forms an overlap region with the semiconductor material layer. The device includes a means for providing charge carriers in the at least one graphene-based electrode proximate to the overlap region, to reduce a difference between a work function of the at least one graphene-based electrode and an electron affinity of the semiconductor material layer, to reduce a Schottky barrier height between the semiconductor material layer and the at least one graphene-based electrode.

The traditional nitride-only charge storage layer of a SONOS device is replaced by a multifilm charge storage layer comprising more than one dielectric material. Examples of such a multifilm charge storage layer are alternating layers of silicon nitride and silicon dioxide, or alternating layers of silicon nitride and aluminum oxide. The use of more than one material introduces additional barriers to migration of charge carriers within the charge storage layer, and improves both endurance and retention of a SONOS-type memory cell comprising such a charge storage layer.

The invention provides a quantum dot luminescent device. The quantum dot luminescent device comprises an anode, a hole transport layer, a quantum dot luminescent layer, an electronic transfer layer and a cathode which are arranged sequentially and adjacently. The quantum dot luminescent device further comprises an electronic barrier layer. The electronic barrier layer is arranged in the electronic transfer layer or between the quantum dot luminescent layer and the electronic transfer layer. Due to the arrangement of the electronic barrier layer, balance injection of charge carriers is ensured, automatic charge transfer between the electronic transfer layer and the quantum dot luminescent layer is isolated, electric neutrality of a quantum dot is ensured, then the quantum dot luminescent device can keep deserved luminous efficiency, the external quantum efficiency of the quantum dot luminescent device is improved, and meanwhile the service life of the quantum dot luminescent device is largely prolonged.

The present invention-provides a tunnel-injection device which encompasses, a reception layer made of a first semiconductor, a barrier-forming layer made of a second semiconductor having a bandgap-narrower than the first semiconductor, being in metallurgical contact with the reception layer, a gate insulating film disposed on the barrier-forming layer. The gate electrode controls the width of the barrier generated at the heterojunction interface between the reception layer and the barrier-forming layer so as to change the tunneling probability of carriers through the barrier. The device further encompasses a carrier receiving region being contact with the reception layer and a carrier-supplying region being contact with the barrier-forming layer.

Amphoteric liposomes are proposed, which comprise positive and negative membrane-based or membrane-forming charge carriers as well as the use of these liposomes.

A semiconductor device includes a single crystal substrate and a dielectric layer overlying the substrate. The dielectric layer includes at least one opening having a first portion and an overlying second portion. The first portion has a depth and width, such that an aspect ratio of the depth to width is greater than one. The semiconductor device further includes a first material having a first portion and a second portion, the first portion of the first material filling the first portion of the at least one opening. Defects for relaxing strain at an interface between the first material and the substrate material exist only within the first portion of the first material due to the aspect ratio being greater than one. The second portion of the first material is substantially defect free. Furthermore, the second portion of the first material and an overlying second material different than the first material fill the overlying second portion of the at least one opening. The second material has a thickness which is less than a critical thickness to maintain the second material in a strained state. The strained second material functions as a channel for charge carriers.

Aspects of the present invention provide an enhancement mode (E-mode) insulated gate (IG) double heterostructure field-effect transistor (DHFET) having low power consumption at zero gate bias, low gate currents, and/or high reliability. An E-mode HFET in accordance with an embodiment of the invention includes: top and bottom barrier layers; and a channel layer sandwiched between the bottom and the top barrier layers, wherein the bottom and top barrier layers have a larger bandgap than the channel layer, and wherein polarization charges of the bottom barrier layer deplete the channel layer and polarization charges of the top barrier layer induce carriers in the channel layer; and wherein a total polarization charge in the bottom barrier layer is larger than a total polarization charge in the top barrier layer such that the channel layer is substantially depleted at zero gate bias.

A single chamber fuel cell comprised of a cell arranged in a mixed fuel gas comprised of hydrogen or another fuel gas and oxygen, wherein the cell used is a pn junction type semiconductor having electrodes of a p-type semiconductor with carriers of holes and an n-type semiconductor with carriers of electrons connected to ends of electrical takeout wires, and each of the p-type semiconductor and n-type semiconductor is formed porous to an extent enabling the mixed fuel gas to pass.

The present invention relates to a concept for optical distance measurement, wherein a radiation pulse is emitted in the direction of an object of measurement. At least two different transfer gates which couple a photoactive region to at least two different evaluating capacities are driven during different drive intervals so that charge carriers generated during the drive intervals by a radiation pulse reflected from the object of measurement and/or by ambient radiation can be transported from the photoactive region to the evaluating capacities each coupled to the at least two transfer gates. Another transfer gate is driven during a time outside the drive intervals of the at least two transfer gates to connect the photoactive region to a reference potential terminal acting as a charge carrier sink during the time outside the drive intervals of the at least two transfer gates.

A light-emitting diode of GaN compound semiconductor emits a blue light from a plane rather than dots for improved luminous intensity. This diode includes a first electrode associated with a high-carrier density n+ layer and a second electrode associated with a high-impurity density [iH-layer] H-layer. These electrodes are made up of a first Ni layer (110 ANGSTROM thick), a second Ni layer (1000 ANGSTROM thick), an Al layer (1500 ANGSTROM thick), a Ti layer (1000 ANGSTROM thick), and a third Ni layer (2500 ANGSTROM thick). The Ni layers of dual structure permit a buffer layer to be formed between them. This buffer layer prevents the Ni layer from peeling. The direct contact of the Ni layer with GaN lowers a drive voltage for light emission and increases luminous intensity.

The present invention is a photoconductive element that includes an electrically conductive support, an electrical barrier layer disposed over said electrically conductive support, and disposed over said barrier layer, a charge generation layer capable of generating positive charge carriers when exposed to actinic radiation. The barrier layer includes a vinyl polymer with aromatic tetracarbonylbisimide side groups and crosslinking sites.

A semiconductor-based optoelectronic device such as a solar cell has an n-type layer and a p-type layer, together forming a p-n junction. Contact regions are formed on the device, with light-receiving regions between contact regions. A window layer is formed over the n-type layer or the p-type layer at the light-receiving region, the window layer promoting reduced carrier recombination at the surface of the n-type or p-type layer, and/or reflection of minority carriers in the n-type or p-type layer towards the p-n junction. The device has a window protection layer formed over the window layer, the window protection layer providing protection from degradation of the window layer during manufacture and/or operation of the device. For GaAs-based devices the window layer may be Al0.9Ga0.1As and the window protection layer may be GaAs. Additionally, an AlAs etch stop layer may be provided over the window protection layer.

Nano-engineered structures are disclosed, incorporating nanowhiskers of high mobility conductivity and incorporating pn junctions. In one embodiment, a nanowhisker of a first semiconducting material has a first band gap, and an enclosure comprising at least one second material with a second band gap encloses said nanoelement along at least part of its length, the second material being doped to provide opposite conductivity type charge carriers in respective first and second regions along the length of the of the nanowhisker, whereby to create in the nanowhisker by transfer of charge carriers into the nanowhisker, corresponding first and second regions of opposite conductivity type charge carriers with a region depleted of free carriers therebetween. The doping of the enclosure material may be degenerate so as to create within the nanowhisker adjacent segments having very heavy modulation doping of opposite conductivity type analogous to the heavily doped regions of an Esaki diode. In another embodiment, a nanowhisker is surrounded by polymer material containing dopant material. A step of rapid thermal annealing causes the dopant material to diffuse into the nanowhisker. In a further embodiment, a nanowhisker has a heterojunction between two different intrinsic materials, and Fermi level pinning creates a pn junction at the interface without doping.

A HDTMOS includes a Si substrate, a buried oxide film and a semiconductor layer. The semiconductor layer includes an upper Si film, an epitaxially grown Si buffer layer, an epitaxially grown SiGe film, and an epitaxially grown Si film. Furthermore, the HDTMOS includes an n-type high concentration Si body region, an n⁻ Si region, a SiGe channel region containing n-type low concentration impurities, an n-type low concentration Si cap layer, and a contact which is a conductor member for electrically connecting the gate electrode and the Si body region. The present invention extends the operation range while keeping the threshold voltage small by using, for the channel layer, a material having a smaller potential at the band edge where carriers travel than that of a material constituting the body region.

A graphene device includes a graphene layer and a back gate electrode connected to apply a global electrical bias to the graphene from a first surface of the graphene. At least two graphene device electrodes are each connected to a corresponding and distinct region of the graphene at a second graphene surface. A dielectric layer blanket-coats the second graphene surface and the device electrodes. At least one top gate electrode is disposed on the dielectric layer and extends over a distinct one of the device electrodes and at least a portion of a corresponding graphene region. Each top gate electrode is connected to apply an electrical charge carrier bias to the graphene region over which that top gate electrode extends to produce a selected charge carrier type in that graphene region. Such a carbon structure can be exposed to a beam of electrons to compensate for extrinsic doping of the carbon.

The present invention provides light-emitting devices having excellent characteristics and electronic devices having excellent characteristics, having such light-emitting devices. Specifically, the present invention provides a light-emitting device includes a first light-emitting element, a second light-emitting element, and a third light-emitting element which emit light having different color from each other. The first light-emitting element includes a first anode; a first cathode; and a first light-emitting layer and a second light-emitting layer between the first anode and the first cathode, wherein the first light-emitting layer includes a first high light-emitting substance and a first organic compound, and the second light-emitting layer includes the first high light-emitting substance and a second organic compound, wherein the first light-emitting layer is in contact with the first anode side of the second light-emitting layer, and wherein the first organic compound is an organic compound having a hole-transporting property and the second organic compound is an organic compound having an electron-transporting property. The second light-emitting element includes a second anode; a second cathode; and a third light-emitting layer and a layer for controlling carrier transfer between the second anode and the second cathode, wherein the third light-emitting layer includes a second high light-transmitting substance, wherein the layer for controlling carrier transfer includes a third organic compound and a fourth organic compound, and is provided between the third light-emitting layer and the second cathode, wherein the third organic compound is an organic compound having an electron-transporting property and the fourth organic compound is an organic compound having an electron-trapping property; and wherein the third organic compound is included more than the fourth organic compound in the layer for controlling carrier transfer. The third light-emitting element includes a third anode; a third cathode; and a fourth light-emitting layer, wherein the fourth light-emitting layer includes a fifth organic compound, a sixth organic compound, and a third high light-emitting substance, wherein the fifth organic compound is an organic compound having a hole-transporting property, and the sixth organic compound is an organic compound having an electron-transporting property, and wherein the third high light-emitting substance is a substance which emits phosphorescence.

The present invention relates to a catheter with an expandable distal end for delivering one or more medicaments. The catheter is manufactured with materials of construction that allow the transfer of electrical energy from the proximal end of the catheter to the distal expandable end. The catheter also has a means for controlling or manipulating the expandable distal end to expand and contract into various configurations. The distal end of the catheter is processed by a specific method of manufacturing whereby the expandable distal end is coated with one or more layers of a hydrogel copolymer wherein at least one layer of which coating encapsulates one or more medicaments and zero or more charged carriers to facilitate the electrophoretic and electro-osmostic mobilities of the medicaments.