190 results about "Critical thickness" patented technology

A substrate including a host and a seed layer bonded to the host is provided, then a semiconductor structure including a light emitting layer disposed between an n-type region and a p-type region is grown on the seed layer. In some embodiments, a bonding layer bonds the host to the seed layer. The seed layer may be thinner than a critical thickness for relaxation of strain in the semiconductor structure, such that strain in the semiconductor structure is relieved by dislocations formed in the seed layer, or by gliding between the seed layer and the bonding layer an interface between the two layers. In some embodiments, the host may be separated from the semiconductor structure and seed layer by etching away the bonding layer.

A multi-layer dielectric layer structure for a semiconductor device. The multi-layer dielectric layer structure comprises a silicate interface layer having a dielectric constant greater than that of silicon nitride and a high-k dielectric layer overlying the silicate interface layer. The high-k dielectric layer comprises one or more ordered pairs of first and second layers. With the present invention, the dielectric constant of the high-k dielectric layer can be optimized while improving interface characteristics. With a higher crystallization temperature realized by forming the multi-layer structure, each of whose layers is not more than the critical thickness, leakage current can be reduced, thereby improving device performance.

A semiconductor light emitting device is disclosed, including a semiconductor substrate, an active region comprising a strained quantum well layer, and a cladding layer for confining carriers and light emissions, wherein the amount of lattice strains in the quantum well layer is in excess of 2% against either the semiconductor substrate or cladding layer and, alternately, the thickness of the quantum well layer is in excess of the critical thickness calculated after Matthews and Blakeslee.

A semiconductor device includes a single crystal substrate and a dielectric layer overlying the substrate. The dielectric layer includes at least one opening having a first portion and an overlying second portion. The first portion has a depth and width, such that an aspect ratio of the depth to width is greater than one. The semiconductor device further includes a first material having a first portion and a second portion, the first portion of the first material filling the first portion of the at least one opening. Defects for relaxing strain at an interface between the first material and the substrate material exist only within the first portion of the first material due to the aspect ratio being greater than one. The second portion of the first material is substantially defect free. Furthermore, the second portion of the first material and an overlying second material different than the first material fill the overlying second portion of the at least one opening. The second material has a thickness which is less than a critical thickness to maintain the second material in a strained state. The strained second material functions as a channel for charge carriers.

A method is disclosed for forming a semiconductor wafer having a strained Si or SiGe layer on an insulator layer. The method produces a structure having a SiGe buffer layer between the insulator layer and the strained Si or SiGe layer, but eliminates the need for Si epitaxy after bonding. The method also eliminates interfacial contamination between strained Si and SiGe buffer layer, and allows the formation of Si/SiGe layers having a total thickness exceeding the critical thickness of the strained Si layer.

Various methods are disclosed herein for forming alternative fin materials that are in a stable or metastable condition. In one case, a stable replacement fin is grown to a height that is greater than an unconfined stable critical thickness of the replacement fin material and it has a defect density of 10⁴ defects/cm² or less throughout its entire height. In another case, a metastable replacement fin is grown to a height that is greater than an unconfined metastable critical thickness of the replacement fin material and it has a defect density of 10⁵ defects/cm² or less throughout at least 90% of its entire height.

A semiconductor electronic device comprises a substrate; a buffer layer formed on the substrate, the buffer layer including not less than two layers of composite layer in which a first semiconductor layer formed of a nitride-based compound semiconductor layer having a lattice constant smaller than a lattice constant of the substrate and a thermal expansion coefficient larger than a thermal expansion coefficient of the substrate and a second semiconductor layer formed of a nitride-based compound semiconductor having a lattice constant smaller than a lattice constant of the first semiconductor layer and a thermal expansion coefficient larger than a thermal expansion coefficient of the substrate are alternately laminated; an intermediate layer provided between the substrate and the buffer layer, the intermediate layer being formed of a nitride-based compound semiconductor having a lattice constant smaller than a lattice constant of the first semiconductor layer and a thermal expansion coefficient larger than a thermal expansion coefficient of the substrate; and a semiconductor active layer formed on the buffer layer, the semiconductor active layer being formed of a nitride-based compound semiconductor, wherein: thicknesses of the first semiconductor layers in the buffer layer are non-uniform thereamong, and at least one of the first semiconductor layer has a thickness greater than a critical thickness, the critical thickness being a thickness above which a direction of warp caused by the first semiconductor layer to the substrate is inverted.

A surface waveguide is disclosed. In the illustrative embodiment, the waveguide has a core and an upper and lower cladding. The core has a thickness that is greater than the critical thickness of the material that composes the core. This is achieved by depositing/growing the core as a conformal layer within a region that is recessed from the planar surface of the lower cladding, wherein the recessed region has a width that is no more than twice the critical thickness of the core material.

Method to produce a structure consisting of depositing a material by columnar epitaxy on a crystalline face of a substrate (2), of continuing so that the columns (4) give a continuous layer (5). The surface is provided with a period array of bumps (3) on a nanometric scale, each bump (3) having a support zone (35) and being obtained from an array of crystalline defects and/or strain fields created within a crystalline region (16) located in the vicinity of a bonding interface (15) between two crystalline elements (11, 12) whose crystalline lattices have a twist and/or tilt angle and/or have interfacial lattice mismatch, able to condition the period (38) of the array of bumps (3). The period (38) of the array, the height (36) of the bumps and the size of their support zone (35) being adjusted so that the continuous layer (40) has a critical thickness that is greater than that obtained using epitaxy without the bumps.

A structure and method of fabrication for a Si based material p-i-n photodetector is disclosed. The light is absorbed in an undoped layer containing SiGe or Ge in such a manner that the absorption length is not limited by a critical thickness of the SiGe or Ge layer. The result is achieved by growing the SiGe or Ge layer from the walls of a trench in monocrystalline Si using lateral epitaxial. A second, doped material is disposed over the undoped layer for biasing and photocarrier collection in the p-i-n diode.

A thin blanket epitaxial layer of SiGe is grown on a silicon substrate to have a biaxial compressive stress in the growth plane. A thin epitaxial layer of silicon is deposited on the SiGe layer, with the SiGe layer having a thickness less than its critical thicknesses. Shallow trenches are subsequently fabricated through the epitaxial layers, so that the strain energy is redistributed such that the compressive strain in the SiGe layer is partially relaxed elastically and a degree of tensile strain is induced to the neighboring layers of silicon. Because this process for inducing tensile strain in a silicon over-layer is elastic in nature, the desired strain may be achieved without formation of misfit dislocations.

Super lattice structures in conjunction with a tunnel junction to provide an improved contact for multiple components. The tunnel junctions can include a first semiconductor material having a resistance parameter for conducting a current and a second semiconductor material having a resistance parameter that is more restrictive to conduction of a current than the resistance parameter of the first semiconductor material. The first semiconductor material can have a critical thickness at which lattice matching of the first semiconductor material causes dislocation. The second semiconductor material can have a critical thickness at which lattice matching of the second semiconductor material causes dislocation that is thicker than the critical thickness of the first semiconductor material. The tunnel junction can be used in a monolithically manufactured photo transmitter and receiver design.

Composite optical waveguide structures or mode transformers and their methods of fabrication and integration are disclosed, wherein the structures or mode transformers are capable of bidirectional light beam transformation between a small mode size waveguide and a large mode size waveguide. One aspect of the present invention is directed to an optical mode transformer comprising a waveguide core having a high refractive index contrast between the waveguide core and the cladding, the optical mode transformer being configured such that the waveguide core has a taper wherein a thickness of the waveguide core tapers down to a critical thickness value, the critical thickness value being defined as a thickness value below which a significant portion of the energy of a light beam penetrates into the cladding layers surrounding the taper structure thereby enlarging the small mode size.

An exchange-coupled film includes a seed layer, an antiferromagnetic layer, and a ferromagnetic layer. The seed layer is formed at a thickness that is larger than the critical thickness, and the thickness of the seed layer is then decreased by etching so as to be smaller than or equal to the critical thickness. Thereby, a crystalline phase which extends through the seed layer from the upper surface to the lower surface can be formed, and/or the average size, in a direction parallel to the layer surface, of the crystal grains in the seed layer can be set to be larger than the thickness of the seed layer. Consequently, a large exchange coupling magnetic field Hex can be generated between the antiferromagnetic layer and the ferromagnetic layer.

A semiconductor device with an undercut relaxed SiGe layer having voids beneath the SiGe layer. The voids may be filled with a dielectric such as SiO₂. A strained Si layer may be epitaxially grown on the relaxed SiGe layer to combine the benefits of a defect-free strained Si surface and a silicon-on-insulator substrate. The relaxed SiGe layer may be relatively thin, with a thickness below the critical thickness. Thus, the structure accommodates shallow junctions, which exhibit reduced junction capacitance.