5200results about "After-treatment details" patented technology

A thermal treatment apparatus 1 includes a reaction tube 2 for containing wafers 10 contaminated with organic substances having a heater 12 capable of heating the reaction tube; a first gas supply pipe 13 for carrying oxygen gas into the reaction tube 2; and a second gas supply pipe 14 for carrying hydrogen gas into the reaction tube 2. Oxygen gas and hydrogen gas are supplied through the first gas supply pipe 13 and the second gas supply pipe 14, respectively, into the reaction tube 2, and the heater 12 heats the reaction tube 2 at a temperature capable of activating oxygen gas and hydrogen gas. A combustion reaction occurs in the reaction tube 2 and thereby the organic substances adhering to the wafers 10 are oxidized, decomposed and removed.

Embodiments of the invention generally relate to methods for forming silicon-germanium-tin alloy epitaxial layers, germanium-tin alloy epitaxial layers, and germanium epitaxial layers that may be doped with boron, phosphorus, arsenic, or other n-type or p-type dopants. The methods generally include positioning a substrate in a processing chamber. A germanium precursor gas is then introduced into the chamber concurrently with a stressor precursor gas, such as a tin precursor gas, to form an epitaxial layer. The flow of the germanium gas is then halted, and an etchant gas is introduced into the chamber. An etch back is then performed while in the presence of the stressor precursor gas used in the formation of the epitaxial film. The flow of the etchant gas is then stopped, and the cycle may then be repeated. In addition to or as an alternative to the etch back process, an annealing processing may be performed.

A III-V nitride homoepitaxial microelectronic device structure comprising a III-V nitride homoepitaxial epi layer on a III-V nitride material substrate, e.g., of freestanding character. Various processing techniques are described, including a method of forming a III-V nitride homoepitaxial layer on a corresponding III-V nitride material substrate, by depositing the III-V nitride homoepitaxial layer by a VPE process using Group III source material and nitrogen source material under process conditions including V / III ratio in a range of from about 1 to about 105, nitrogen source material partial pressure in a range of from about 1 to about 103 torr, growth temperature in a range of from about 500 to about 1250 degrees Celsius, and growth rate in a range of from about 0.1 to about 500 microns per hour. The III-V nitride homoepitaxial microelectronic device structures are usefully employed in device applications such as UV LEDs, high electron mobility transistors, and the like.

The present invention provides a method of forming a strained semiconductor layer. The method comprises growing a strained first semiconductor layer, having a graded dopant profile, on a wafer, having a first lattice constant. The dopant imparts a second lattice constant to the first semiconductor layer. The method further comprises growing a strained boxed second semiconductor layer having the second lattice constant on the first semiconductor layer and growing a sacrificial third semiconductor layer having the first lattice constant on the second semiconductor layer. The method further comprises etch annealing the third and second semiconductor layer, wherein the third semiconductor layer is removed and the second semiconductor layer is relaxed. The method may further comprises growing a fourth semiconductor layer having the second lattice constant on the second semiconductor layer, wherein the fourth semiconductor layer is relaxed, and growing a strained fifth semiconductor layer having the first semiconductor lattice constant on the fourth semiconductor layer. The method controls the surface roughness of the semiconductor layers. The method also has the unexpected benefit of reducing dislocations in the semiconductor layers.

A method for depositing a germanium tin (Ge1-xSnx) semiconductor is disclosed. The method may include; providing a substrate within a reaction chamber, heating the substrate to a deposition temperature and exposing the substrate to a germanium precursor and a tin precursor. The method may further include; depositing a germanium tin (Ge1-xSnx) semiconductor on the surface of the substrate, and exposing the germanium tin (Ge1-xSnx) semiconductor to a boron dopant precursor. Semiconductor device structures including a germanium tin (Ge1-xSnx) semiconductor formed by the methods of the disclosure are also provided.

A method of making a virtual substrate includes providing a donor substrate comprising a single crystal donor layer of a first material over a support substrate, wherein the first material comprises a ternary, quaternary or penternary semiconductor material or a material which is not available in bulk form, bonding the donor substrate to a handle substrate, and separating the donor substrate from the handle substrate such that a single crystal film of the first material remains bonded to the handle substrate.

The present invention provides a method for preparing epitaxial-substrate, for growing a multilayered structure of GaN based semiconductor layers on the epitaxial-substrate so as to construct a semiconductor device such as blue-emitting laser diode and LED. The method for preparing the epitaxial-substrate encompasses (a) growing a first GaN based semiconductor layer on a bulk-substrate; (b) growing an InGaN based semiconductor layer on the first GaN based semiconductor layer; (c) growing a second GaN based semiconductor layer on the InGaN based semiconductor layer; and (d) separating the second GaN based semiconductor layer from the first GaN based semiconductor layer to provide the epitaxial-substrate. The epitaxial-substrate having a high crystallographic perfection and an excellent surface morphology is obtained simply and in a short time. The defect density of the single crystalline GaN based semiconductor layer film grown on the epitaxial-substrate is greatly reduced.

AlxGayInzN, wherein 0≦x≦1, 0≦y≦1, 0≦z≦1, and x+y+z=1, characterized by a root mean square surface roughness of less than 1 nm in a 10×10 μm2 area. The AlxGayInzN may be in the form of a wafer, which is chemically mechanically polished (CMP) using a CMP slurry comprising abrasive particles, such as silica or alumina, and an acid or a base. High quality AlxGayInzN wafers can be fabricated by steps including lapping, mechanical polishing, and reducing internal stress of said wafer by thermal annealing or chemical etching for further enhancement of its surface quality. CMP processing may be usefully employed to highlight crystal defects of an AlxGayInzN wafer.

A method of controllably aligning carbon nanotubes to a template structure to fabricate a variety of carbon nanotube containing structures and devices having desired characteristics is provided. The method allows simultaneous, selective growth of both vertically and horizontally controllably aligned nanotubes on the template structure but not on a substrate in a single process step.

A III-V nitride homoepitaxial microelectronic device structure comprising a III-V nitride homoepitaxial epi layer of improved epitaxial quality deposited on a III-V nitride material substrate, e.g., of freestanding character. Various processing techniques are described, including a method of forming a III-V nitride homoepitaxial layer on a corresponding III-V nitride material substrate, by depositing the III-V nitride homoepitaxial layer by a VPE process using Group III source material and nitrogen source material under process conditions including V / III ratio in a range of from about 1 to about 10<5>, nitrogen source material partial pressure in a range of from about 1 to about 10<3 >torr, growth temperature in a range of from about 500 to about 1250 degrees Celsius, and growth rate in a range of from about 0.1 to about 10<2 >microns per hour. The III-V nitride homoepitaxial microelectronic device structures are usefully employed in device applications such as UV LEDs, high electron mobility transistors, and the like.

The present invention is related to a process for obtaining a larger area substrate of mono-crystalline gallium-containing nitride by making selective crystallization of gallium containing nitride on a smaller seed under a crystallization temperature and / or pressure from a supercritical ammonia-containing solution made by dissolution of gallium-containing feedstock in a supercritical ammonia-containing solvent with alkali metal ions, comprising: providing two or more elementary seeds, and making selective crystallization on the two or more separate elementary seeds to get a merged larger compound seed. The merged larger compound seed is used for a seed in a new growth process and then to get a larger substrate of mono-crystal gallium-containing nitride.

The present invention provides a method and apparatus for selectively destroying dividing cells in living tissue formed of dividing cells and non-dividing cells. The dividing cells contain polarizable intracellular members and during late anaphase or telophase, the dividing cells are connected to one another by a cleavage furrow. According to the present method the living tissue is subjected to electric field conditions sufficient to cause movement of the polarizable intracellular members toward the cleavage furrow in response to a non-homogenous electric field being induced in the dividing cells. The non-homogenous electric field produces an increased density electric field in the region of the cleavage furrow. The movement of the polarizable intracellular members towards the cleavage furrow causes the break down thereof which results in destruction of the dividing cells, while the non-dividing cells of the living tissue remain intact.

A method of smoothing a silicon surface formed on a substrate. According to the present invention a substrate having a silicon surface is placed into a chamber and heated to a temperature of between 1000°-1300° C. While the substrate is heated to a temperature between 1000°-1300° C., the silicon surface is exposed to a gas mix comprising H2 and HCl in the chamber to smooth the silicon surface.

A method of treating a silicon surface of a substrate that includes heating the substrate in a process chamber to a temperature, exposing a first area adjacent to the silicon surface to a first gas mixture comprising an etchant, a silicon source gas, and a carrier, exposing a second area adjacent to the silicon surface to a second gas mixture, wherein the second gas mixture is different from the first gas mixture.