1012 results about "Electronic structure" patented technology

Disclosed herein is a structure of opto-electronic package having a Si-substrate. The Si-substrates are manufactured in batch utilizing the micro-electromechanical processes or the semiconductor processes, so that these Si-substrates are made with great precision and full of varieties. Based on the material characteristic of the Si-substrate, and the configuration of the components, such as the connectors, opto-electronic devices, depressions, solder bumps, etc., the present invention can improve the optical effect, the heat dissipating effect, and the reliability of the opto-electronic package structure, and simplifies the complexity of the opto-electronic package structure.

Apparatuses and methods for forming displays are claimed. One embodiment of the invention includes a contact smart card wherein fluidic self assembly is used to build the microelectronic structures on the display such that a contact smart data is transmitted unidirectionally. A contact smart card is inserted directly into a device that transfers data to a display coupled to the smart card. Another embodiment of the invention relates to a contactless smart card in which fluidic self assembly is also used here to build the display. Data is transmitted to an antenna that is embedded in the contactless card in which a plurality of blocks were deposited thereon.

A low-k dielectric sacrificial material is formed within a microelectronic structure covered with a layer defining an exhaust vent. At an appropriate time, the underlying sacrificial material is decomposed and exhausted away through the exhaust vent. Residue from the exhausted sacrificial material accumulates at the vent location during exhaustion until the vent is substantially occluded. As a result, an air gap is created having desirable characteristics as a dielectric.

Powerful nanosecond-range lasers using low repetition rate pulsed laser deposition produce numerous macroscopic size particles and droplets, which embed in thin film coatings. This problem has been addressed by lowering the pulse energy, keeping the laser intensity optional for evaporation, so that significant numbers of the macroscopic particles and droplets are no longer present in the evaporated plume. The result is deposition of evaporated plume on a substrate to form thin film of very high surface quality. Preferably, the laser pulses have a repetition rate to produce a continuous flow of evaporated material at the substrate. Pulse-range is typically picosecond and femtosecond and repetition rate kilohertz to hundreds of megahertz. The process may be carried out in the presence of a buffer gas, which may be inert or reactive, and the increased vapour density and therefore the collision frequency between evaporated atoms leads to the formation of nanostructured materials of increasing interest, because of their peculiar structural, electronic and mechanical properties. One of these is carbon nanotubes, which is a new form of carbon belonging to the fullerene (C60) family. Carbon nanotubes are seamless, single or multishell co-axial cylindrical tubules with or without dome caps at the extremities. Typically diameters range from 1 nm to 50 nm with a length >1 mum. The electronic structure may be either metallic or semiconducting without any change in the chemical bonding or adding of dopant. In addition, the materials have application to a wide range of established thin film applications.

A method of fabricating hafnium oxide and/or zirconium oxide films is provided. The methods include providing a mixture of Hf and/or Zr alkoxide dissolved, emulsified or suspended in a liquid; vaporizing at least the alkoxide and depositing the vaporized component at a temperature of greater than 400° C. The resultant film is dense, microcrystalline and is capable of self-passivation when treated in a hydrogen plasma or forming gas anneal.

A low-k dielectric material with increased cohesive strength for use in electronic structures including interconnect and sensing structures is provided that includes atoms of Si, C, O, and H in which a fraction of the C atoms are bonded as Si—CH₃ functional groups, and another fraction of the C atoms are bonded as Si—R—Si, wherein R is phenyl, —[CH₂]_n— where n is greater than or equal to 1, HC═CH, C═CH₂, C═C or a [S]_n linkage, where n is a defined above.

An interconnection element and a method of forming an interconnection element. In one embodiment, the interconnection element includes a first structure and a second structure coupled to the first structure. The second structure coupled with the first material has a spring constant greater than the spring constant of the first structure alone. In one embodiment, the interconnection element is adapted to be coupled to an electronic component tracked as a conductive path from the electronic component. In one embodiment, the method includes forming a first (interconnection) structure coupled to a substrate to define a shape suitable as an interconnection in an integrated circuit environment and then coupling, such as by coating, a second (interconnection) structure to the first (interconnection) structure to form an interconnection element. Collectively, the first (interconnection) structure and the second (interconnection) structure have a spring constant greater than a spring constant of the first (interconnection) structure.

Reconfigurable electronic structures and circuits using programmable, non-volatile memory elements. The programmable, non-volatile memory elements may perform the functions of storage and/or a switch to produce components such as crossbars, multiplexers, look-up tables (LUTs) and other logic circuits used in programmable logic structures (e.g., (FPGAs)). The programmable, non-volatile memory elements comprise one or more structures based on Phase Change Memory, Programmable Metallization, Carbon Nano-Electromechanical (CNT-NEM), or Metal Nano-Electromechanical device technologies.

A method of forming a conductive structure having a length that is less than the length define by photolithographic patterning. A silicon layer (12) is formed in a MeOx dielectric layer (11) is photolithographically patterned to a predetermined first length. A metal layer (31) is formed conformally to at least the sidewalls of the silicon layer and then is reacted with the silicon to form a metal silicide (41). In particular, metal silicide abutments (411,412) are formed contiguous to sidewalls (421,422) of a reduced conductor (42). The remaining metal layer and the metal silicide are etched away, resulting in a conductor having predetermined second length that is less than the predetermined first length.

Methods of forming dielectric films comprising Si, C, O and H atoms (SiCOH) or Si, C, N and H atoms (SiCHN) that have improved cohesive strength (or equivalently, improved fracture toughness or reduced brittleness), and increased resistance to water degradation of properties such as stress-corrosion cracking, Cu ingress, and other critical properties are provided. Electronic structures including the above materials are also included herein.

Dielectric materials including elements of Si, C, O and H having specific values of mechanical properties (tensile stress, elastic modulus, hardness cohesive strength, crack velocity in water) that result in a stable ultra low k film which is not degraded by water vapor or integration processing are provided. The dielectric materials have a dielectric constant of about 2.8 or less, a tensile stress of less than 45 MPa, an elastic modulus from about 2 to about 15 GPa, and a hardness from about 0.2 to about 2 GPa. Electronic structures including the dielectric materials of the present invention as well as various methods of fabricating the dielectric materials are also provided.

An atomic layer deposition (ALD) process deposits thin films for microelectronic structures, such as advanced gap and tunnel junction applications, by plasma annealing at varying film thicknesses to obtain desired intrinsic film stress and breakdown film strength. The primary advantage of the ALD process is the near 100% step coverage with properties that are uniform along sidewalls. The process provides smooth (R_a˜2 Å), pure (impurities<1 at. %), AlO_x films with improved breakdown strength (9–10 MV/cm) with a commercially feasible throughput.

A method for fabricating a SiCOH dielectric material comprising Si, C, O and H atoms from a single organosilicon precursor with a built-in organic porogen is provided. The single organosilicon precursor with a built-in organic porogen is selected from silane (SiH₄) derivatives having the molecular formula SiRR¹R²R³, disiloxane derivatives having the molecular formula R⁴R⁵R⁶—Si—O—Si—R⁷R⁸R⁹, and trisiloxane derivatives having the molecular formula R¹⁰R¹¹R¹²—Si—O—Si—R¹³R¹⁴—O—Si—R¹⁵R¹⁶R¹⁷ where R and R^1-17 may or may not be identical and are selected from H, alkyl, alkoxy, epoxy, phenyl, vinyl, allyl, alkenyl or alkynyl groups that may be linear, branched, cyclic, polycyclic and may be functionalized with oxygen, nitrogen or fluorine containing substituents. In addition to the method, the present application also provides SiCOH dielectrics made from the inventive method as well as electronic structures that contain the same.

In the present electronic structure, a substrate is provided in the form of a circuit board. First and second electronic devices are positioned on opposite sides of the circuit board, each having a plurality of contacts connected to the circuit board. Each of the contacts of the first device is connected to a contact of the second device by a connector though the circuit board. At least one of the contacts of the first device is connected to the contact of the second device which is most adjacent to that contact of the first device across the circuit board.

The invention provides methods functionalizing a planar surface of a graphene layer, a graphite surface, or microelectronic structure. The graphene layer, graphite surface, or planar microelectronic structure surface is exposed to at least one vapor including at least one functionalization species that non-covalently bonds to the graphene layer, a graphite surface, or planar microelectronic surface while providing a functionalization layer of chemically functional groups, to produce a functionalized graphene layer, graphite surface, or planar microelectronic surface.

A microelectronic structure includes a semiconductor having conductive elements at a first surface. Wire bonds have bases joined to the conductive elements and free ends remote from the bases, the free ends being remote from the substrate and the bases and including end surfaces. The wire bonds define edge surfaces between the bases and end surfaces thereof. A compliant material layer extends along the edge surfaces within first portions of the wire bonds at least adjacent the bases thereof and fills spaces between the first portions of the wire bonds such that the first portions of the wire bonds are separated from one another by the compliant material layer. Second portions of the wire bonds are defined by the end surfaces and portions of the edge surfaces adjacent the end surfaces that are extend from a third surface of the compliant later.