2923 results about "Tunnel junction" patented technology

It is important to ensure good selectivity of a single magnetic tunnel junction storage cell within a memory array without affecting nearby storage cells. For this purpose, this memory array of storage cells preferably comprises a) an array of electrically conducting bit lines and electrically conducting word lines which form intersections therebetween, b) a storage cell disposed at each of said intersections, each storage cell comprising at least one reversible magnetic region or layer characterized by a magnetization state which can be reversed by applying thereto a selected external magnetic field, said reversible magnetic layer comprising a material whose magnetization state is more easily reversed upon a change in the temperature thereof, and c) a temperature change generator for changing the temperature of said reversible magnetic layer of only a selected one of said array of storage cells at any moment. To select a cell, it is preferable to select a cell by using a brief pulse of tunnelling current between the intersecting bit and word lines at that cell in order to provide sufficient Joule heating to facilitate a change in the magnetization state of its reversible magnetic layer, which preferably comprises a ferrimagnetic material.

A spin-torque transfer memory random access memory (STTMRAM) element includes a fixed layer formed on top of a substrate and a a tunnel layer formed upon the fixed layer and a composite free layer formed upon the tunnel barrier layer and made of an iron platinum alloy with at least one of X or Y material, X being from a group consisting of: boron (B), phosphorous (P), carbon (C), and nitride (N) and Y being from a group consisting of: tantalum (Ta), titanium (Ti), niobium (Nb), zirconium (Zr), tungsten (W), silicon (Si), copper (Cu), silver (Ag), aluminum (Al), chromium (Cr), tin (Sn), lead (Pb), antimony (Sb), hafnium (Hf) and bismuth (Bi), molybdenum (Mo) or rhodium (Ru), the magnetization direction of each of the composite free layer and fixed layer being substantially perpendicular to the plane of the substrate.

A magnetic element is disclosed wherein first and second interfaces of a free layer with a Hk enhancing layer and tunnel barrier, respectively, produce enhanced surface perpendicular anisotropy to lower switching current or increase thermal stability in a magnetic tunnel junction (MTJ). In a MTJ with a bottom spin valve configuration where the Hk enhancing layer is an oxide, the capping layer contacting the Hk enhancing layer is selected to have a free energy of oxide formation substantially greater than that of the oxide. The free layer may be a single layer or composite comprised of an Fe rich alloy such as Co₂₀Fe₆₀B₂₀. With a thin free layer, the interfacial perpendicular anisotropy may dominate the shape anisotropy to generate a magnetization perpendicular to the planes of the layers. The magnetic element may be part of a spintronic device or serve as a propagation medium in a domain wall motion device.

The present invention relates generally to semiconductor fabrication and particularly to fabricating magnetic tunnel junction devices. In particular, this invention relates to a method for using the dielectric layer in tunnel junctions as an etch stop layer to eliminate electrical shorting that can result from the patterning process.

A MTJ that minimizes spin-transfer magnetization switching current (Jc) in a Spin-RAM to <1×10⁶ A/cm² is disclosed. The MTJ has a Co₆₀Fe₂₀B₂₀/MgO/Co₆₀Fe₂₀B₂₀ configuration where the CoFeB AP1 pinned and free layers are amorphous and the crystalline MgO tunnel barrier is formed by a ROX or NOX process. The capping layer preferably is a Hf/Ru composite where the lower Hf layer serves as an excellent oxygen getter material to reduce the magnetic “dead layer” at the free layer/capping layer interface and thereby increase dR/R, and lower He and Jc. The annealing temperature is lowered to about 280° C. to give a smoother CoFeB/MgO interface and a smaller offset field than with a 350° C. annealing. In a second embodiment, the AP1 layer has a CoFeB/CoFe configuration wherein the lower CoFeB layer is amorphous and the upper CoFe layer is crystalline to further improve dR/R and lower RA to ≦10 ohm/μm².

Magnetic nanoparticles and methods for their use in detecting biological molecules are disclosed. The magnetic nanoparticles can be attached to nucleic acid molecules, which are then captured by a complementary sequence attached to a detector, such as a spin valve detector or a magnetic tunnel junction detector. The detection of the bound magnetic nanoparticle can be achieved with high specificity and sensitivity.

A device including an input port configured to receive an input signal is described. The device also includes an output port and a structure, which structure includes a tunneling junction connected with the input port and the output port. The tunneling junction is configured in a way (i) which provides electrons in a particular energy state within the structure, (ii) which produces surface plasmons in response to the input signal, (iii) which causes the structure to act as a waveguide for directing at least a portion of the surface plasmons along a predetermined path toward the output port such that the surface plasmons so directed interact with the electrons in a particular way, and (iv) which produces at the output port an output signal resulting from the particular interaction between the electrons and the surface plasmons.

A method of fabricating a magnetic tunnel junction (MTJ) device is provided. A patterned hard mask is oxidized to form a surface oxide thereon. An MTJ stack is etched in alignment with the patterned hard mask after the oxidizing of the patterned hard mask. Preferably, the MTJ stack etch recipe includes chlorine and oxygen. Etch selectivity between the hard mask and the MTJ stack is improved.

A photonic crystal structure is formed in an n-type layer of a III-nitride light emitting device. In some embodiments, the photonic crystal n-type layer is formed on a tunnel junction. The device includes a first layer of first conductivity type, a first layer of second conductivity type, and an active region separating the first layer of first conductivity type from the first layer of second conductivity type. The tunnel junction includes a second layer of first conductivity type and a second layer of second conductivity type and separates the first layer of first conductivity type from a third layer of first conductivity type. A photonic crystal structure is formed in the third layer of first conductivity type.

Magnetic Random Access Memory (MRAM) devices include a lower electrode and a magnetic tunnel junction on the lower electrode. The magnetic tunnel junction includes a seed layer and a tunneling barrier that is oriented in a same direction as the most closely packed plane direction of the seed layer. An oxide layer may be provided between the lower electrode and the magnetic tunnel junction. The lower electrode may be a titanium-rich TiN layer having more than 50 atomic percent titanium content. Analogous fabrication methods are also described.

A magnetic shift register utilizes a data column comprising a thin wire of magnetic material. A writing element selectively changes the direction of the magnetic moment in the magnetic domains to write the data to the data column. Associated with each domain wall are large magnetic fringing fields concentrated in a very small space. These magnetic fringing fields write to and read from the magnetic shift register. When the domain wall is moved close to another magnetic material, the fringing fields change the direction of the magnetic moment in the magnetic material, effectively “writing” to the magnetic material. A reading element similar to a tunneling junction comprises a free layer and a pinned layer of magnetic material. Fringing fields change the direction of the magnetic moment in the free layer with respect to the pinned layer, changing electrical resistance of the reading element and “reading” data stored in the magnetic shift register.

A device including an input port configured to receive an input signal is described. The device also includes an output port and a structure, which structure includes a tunneling junction connected with the input port and the output port. The tunneling junction is configured in a way (i) which provides electrons in a particular energy state within the structure, (ii) which produces surface plasmons in response to the input signal, (iii) which causes the structure to act as a waveguide for directing at least a portion of the surface plasmons along a predetermined path toward the output port such that the surface plasmons so directed interact with the electrons in a particular way, and (iv) which produces at the output port an output signal resulting from the particular interaction between the electrons and the surface plasmons.

A magnetic tunnel element that can be used, for example, as part of a read head or a magnetic memory cell, includes a first layer formed from an amorphous material, an amorphous tunnel barrier layer, and an interface layer between the first layer and the tunnel barrier layer. The interface layer is formed from a material that is crystalline when the material is in isolation from both the first layer and the tunnel barrier layer. Alternatively, the thickness of the interface layer is selected so that the interface layer is not crystalline. The first layer is formed from at least one material selected from the group consisting of amorphous ferromagnetic material, amorphous ferrimagnetic materials, and amorphous non-magnetic materials. The interface layer is formed from a material selected from the group consisting of a ferromagnetic material and a ferrimagnetic material.

A high efficiency and high brightness multi-active layer tunneling regenerated white color semiconductor light emitting diode having a p type electrode 1, a monolithic red light cell 14, a tunnel junction 9, a monolithic green light 15 and blue light cell 16 (or a monolithic cyan light cell 19), wherein each of said cells are electrically connected by tunnel junctions 9, and the red cell physically connected with blue and green cell (or cyan cell) by wafer bonding layer 8. The lights from each cell synthesize white color light. The white light emitting diode only has one time optical-electrical conversion, so the quantum efficiency is high. Moreover, the white LED totally made from semiconductor materials, the lifetime of the white LED lamp is not limited by the relatively short lifetime of fluorescent material.

Magnetic tunnel junctions are constructed from a MgO or Mg—ZnO tunnel barrier and amorphous magnetic layers in proximity with, and on respective sides of, the tunnel barrier. The amorphous magnetic layer preferably includes Co and at least one additional element selected to make the layer amorphous, such as boron. Magnetic tunnel junctions formed from the amorphous magnetic layers and the tunnel barrier have tunneling magnetoresistance values of up to 200% or more.

A photovoltaic device includes a substrate having at least two surfaces and a multilayered film disposed on at least a portion of at least one surface of the substrate. Elongated nanostructures are disposed on the multilayered film. The device incorporates a top layer of the multilayered film contacting the elongated nanostructures that is a tunnel junction. The device has at least one layer deposited over the elongated nanostructures defining a portion of a photoactive junction. A solar panel includes at least one photovoltaic device. The solar panel isolates each such devices from its surrounding atmospheric environment and permits the generation of electrical power.

A re-programmable gate logic includes a plurality of non-volatile re-configurable resistance state-based memory circuits in parallel, wherein the circuits are re-configurable to implement or change a selected gate logic, and the plurality of non-volatile re-configurable resistance state-based memory circuits are each adapted to receive a logical input signal. An evaluation switch in series with the plurality of parallel non-volatile re-configurable resistance state-based memory circuits is configured to provide an output signal based on the programmed states of the memory circuits. A sensor is configured to receive the output signal and provide a logical output signal on the basis of the output signal and a reference signal provided to the sensor. The reconfigurable logic may be implemented based on using spin torque transfer (STT) magnetic tunnel junction (MTJ) magnetoresistance random access memory (MRAM) as the re-programmable memory elements. The logic configuration is retained without power.

A method of forming an integrated circuit includes forming magnetic tunnel junction (MTJ) layers; etching the MTJ layers to form a MTJ cell; and forming a dielectric capping layer on sidewalls of the MTJ cell, wherein the step of forming the dielectric capping layer is in-situ performed with the step of etching the MTJ layers.

ZnMg oxide tunnel barriers are grown which, when sandwiched between ferri- or ferromagnetic layers, form magnetic tunnel junctions exhibiting high tunneling magnetoresistance (TMR). The TMR may be increased by annealing the magnetic tunnel junctions. The zinc-magnesium oxide tunnel barriers may be incorporated into a variety of other devices, such as magnetic tunneling transistors and spin injector devices. The ZnMg oxide tunnel barriers are grown by first depositing a zinc and/or magnesium layer onto an underlying substrate in oxygen-poor (or oxygen-free) conditions, and subsequently depositing zinc and/or magnesium onto this layer in the presence of reactive oxygen.

A method of making a magnetic random access memory cell includes forming a magnetic tunnel junction (MTJ) on top of a wafer, depositing oxide on top of the MTJ, depositing a photo-resist layer on top of the oxide layer, forming a trench in the photo-resist layer and oxide layer where the trench has a width that is substantially the same as that of the MTJ. Then, the photo-resist layer is removed and a hard mask layer is deposited on top of the oxide layer in the trench and the wafer is planarized to remove the portion of the hard mask layer that is not in the trench to substantially level the top of oxide layer and the hard layer on the wafer. The remaining oxide layer is etched and the the MTJ is etched to remove the portion of the MTJ which is not covered by the hard mask layer.