The present application relates to power
semiconductor technology, and particularly relates to a
power MOSFET device and a preparation method, which comprises a drain
metal, a heavily doped first-
conductivity-type
semiconductor substrate, a lightly doped second-
conductivity-type
semiconductor epitaxial layer, a first-
conductivity-type semiconductor vertical sinker, a
gate dielectric layer, a gate polysilicon
electrode, a second-conductivity-type semiconductor
body region, a first-conductivity-type semiconductor drift region, a heavily doped first-conductivity-type semiconductor source region, a heavily doped second-conductivity-type semiconductor
ohmic contact region, a first insulating
dielectric layer, a source
metal, a trench structure, a second insulating
dielectric layer, and a heavily doped first-conductivity-type polysilicon. The present application has a vertical sinker structure, can change the current path from lateral to vertical, and the transverse and longitudinal
voltage resistance structure formed by the drift region and the vertical sinker effectively improves the
voltage resistance characteristics of the device. In addition, the structure also has smaller gate parasitic effects and larger current capacity.