578results about How to "Lower turn-on voltage" patented technology

The present invention discloses a new field emitter cell and array consisting of groups of nanofilaments forming emitter cathodes. Control gates are microprocessed to be integrally formed with groups of nanofilament emitter cathodes on a substrate. Groups of nanofilaments are grown directly on the substrate material. As a result, the control gates and groups of nanofilaments are self-aligned with one another.

A series of gate drive circuits for MESFETs are provided. The gate drive circuits are intended to be used in switching regulators where at least one switching device is an N-channel MESFET. For regulators of this type, the gate drive circuits provide gate drive at the correct voltage to ensure that MESFETs are neither under driven (resulting in incorrect circuit operation) nor over driven (resulting in MESFET damage or excess current or power loss).

A MESFET based buck converter includes an N-channel MESFET between a battery or other power source and a node Vx. The node Vx is connected to an output node via an inductor and to ground via a Schottky diode or a second MESFET or both. A control circuit drives the MESFET (and the second MESFET) so that the inductor is alternately connected to the battery and to ground. The maximum voltage impressed across the high side MESFET is optionally clamped by a Zener diode. In some implementations, the MESFET is connected in series with a MOSFET. The MOSFET is switched off during sleep or standby modes to minimize leakage current through the MESFET. The MOSFET is therefore switched at a low frequency compared to the MESFET and does not contribute significantly to switching losses in the converter. In other implementations, more than one MESFET is connected in series with a MOSFET the MOSFETs being switched off during periods of inactivity to suppress leakage currents.

An n-type first base layer is formed on a semiconductor substrate 1 having a first major surface and a second major surface, and a p-type second base layer is formed thereon. Between the first base layer and the second base layer, a carrier stored layer is formed. The carrier stored layer has a high-concentration impurity layer and a low concentration impurity layer, and the high-concentration impurity layer has a thickness of 1.5 μm or more and an impurity concentration therethrough is made to be 1.0×10¹⁶ cm⁻³ or more throughout the layer.

The invention belongs to the organic electroluminescence field, in particular to a top-emitting organic electroluminescent device having two structures and being capable of adjusting luminescent spectrums. The top-emitting device adopting an upright structure sequentially comprises a substrate, a metal anode, an organic function layer and a metal cathode, and a spectrum adjustment layer structure is introduced between the metal cathode and the organic function layer; and the top-emitting device adopting an inverted structure sequentially includes a substrate, a metal cathode, an organic function layer and a metal anode in structure, and a spectrum adjustment layer structure is introduced between the metal anode and the organic function layer. The introduction of the spectrum adjustment layer can adjust the spectral width of luminescent spectrum and the emission spectrum peak value of the top-emitting organic electroluminescent device, thereby changing the luminescent color of the device and finally realizing the top-emitting white light organic electroluminescent device with high brightness and high color-rendering indexes. The prepared top-emitting organic electroluminescent device with multiple photo-peaks and adjustable spectrums has the advantages of high brightness, high efficiency, less working procedure and simple process.

The invention relates to a dual-layer perovskite light emitting diode and a preparation method therefor. The dual-layer perovskite light emitting diode comprises the following components from the bottom up separately: ITO conductive glass is used as a positive electrode; a layer of poly 3, 4-ethylenedioxythiophene-polystyrolsulfon acid (PEDOT-PSS) with a thickness of about 20nm is used as a hole transport layer; a dual-layer perovskite light emitting layer is prepared by a spin-coating method in two times; the adopted dual-layer perovskite light emitting layer can be perovskite with different halogen ratios; a layer of calcium-doped zinc oxide (Ca:ZnO) with the thickness of about 50nm is spin-coated on the perovskite layer to be used as an electron transport layer; and finally metal calcium and aluminum are evaporated to be used as a negative electrode. According to the dual-layer perovskite light emitting diode and the preparation method therefor, on one hand, by regulating and controlling the Ca concentration in the Ca:ZnO, an optimal band gap is obtained, so that the barrier between the electron transport layer and the perovskite is reduced, and the cut-in voltage of the light emitting diode is lowered consequently, and the light emitting efficiency and internal quantum efficiency of the light emitting diode are improved at the same time; and on the other hand, by regulating the halogen ratios in the perovskite, light emission with different colors can be realized.

The invention discloses a quantum dot light emitting diode and a manufacturing method thereof. The quantum dot light emitting diode comprises a substrate, a cathode, an electron transport layer, a quantum dot light emitting layer, a hole transport layer, and an anode stacked in sequence. The quantum dot light emitting diode is characterized in that the upper surface of the electron transport layer is provided with a nano convex-concave structure which is in quasi-periodic or aperiodic shape, and refractive index of the nano convex-concave structure shows gradient changes along an emergent light direction. Efficiency of an inverted structure quantum dot light emitting diode is obviously improved, and the efficiency is far ahead efficiency of other inverted quantum dot devices.

A switching circuit includes: a transistor having a first electrode, a second electrode and a control electrode; a zener diode; and a capacitor. A connection between the first electrode and the second electrode is capable of temporally switching between a condition state and a non-conduction state by switching a control voltage of the transistor. The zener diode and the capacitor are coupled in series between the first electrode and the control electrode of the transistor. The first electrode is a drain or a collector.

The present invention discloses deuterated semiconducting organic compounds. The deuterated semiconducting organic compounds comprise at least one partially or fully deuterated non-conjugated portion linked to the conjugated portion. The mentioned deuterated semiconducting organic compounds can be used in optoelectronic devices, such as light-emitting devices and photodiodes, with enhanced performance and lifetime. The deuterated semiconducting organic compounds of this application can be employed as emissive layer, charge-transporting layer, or energy transfer material in organic light-emitting devices.

We describe a method of controlling turn off time delay of a switching device of a switch mode power converter (SMPC). The SMPC has an inductive component comprising an input winding coupled to receive power from an input; and a switching device to, when on, conduct input winding current. In embodiments the method comprises applying turn on and turn-off signals to the switching device; applying at least one turn off signal, to initiate turning off of the switching device, and detecting a sensing signal from a further winding of the inductive component, inductively coupled to the input winding, to thereby indicate an end of a turn off time delay or duration. The method controls the turn on signal for a subsequent switching cycle of the SMPC device to regulate the turn off delay time.

The invention provides an electrospinning direct-writing nozzle capable of controlling starting and stopping, relating to an electrospinning direct-writing nozzle and providing an electrospinning direct-writing nozzle which can automatically controls starting and stopping, reduce the spraying opening voltage, organically combines the spraying and the direct-writing pattern characteristic and completes direct writing of micronano structures in complex patterns. The electrospinning direct-writing nozzle is provided with a hollow sleeve with a nozzle, an adjusting plug with threads, a coil, an armature, a return spring, a probe and an exhaust pipeline, wherein the front end of the hollow sleeve with the nozzle is provided with a spray orifice and an injection hole; the adjusting plug with the threads is arranged at the rear end of the hollow sleeve with the nozzle; the coil is sheathed at the outer side of the hollow sleeve with the nozzle; the armature is arranged in the hollow sleeve with the nozzle; the probe is fixedly connected with the armature; the front end of the probe is positioned in the spraying orifice at the front end of the hollow sleeve with the nozzle, and the rear end of the probe is fixedly connected with one end of the return spring; the other end of the return spring is fixedly connected with the inner end of the adjusting plug with the threads; the exhaust pipeline is arranged on the adjusting plug with the threads; and the inner end of the exhaust pipeline is communicated with the hollow sleeve with the nozzle, and the outer end of the exhaust pipeline is communicated with the outside.

In a semiconductor device, gate electrodes in a first group are connected with a first gate pad and gate electrodes in a second group are connected with a second gate pad. The gate electrodes in the first group and the gate electrodes in the second group are controllable independently from each other through the first gate pad and the second gate pad. When turning off, after a turn-off voltage with which an inversion layer is not formed is applied to the gate electrodes in the second group, a turn-off voltage with which an inversion layer is not formed is applied to the gate electrodes in the first group.

The invention discloses a composite quantum dot light emitting diode device and a preparation method thereof. The device comprises an anode substrate, a hole injection layer, a hole transport layer, a luminous layer, an electron transport layer and a cathode layer, wherein the luminous layer is a quantum dot composite luminous layer composed of a quantum dot luminescent material and an organic-inorganic hybrid perovskite material. According to the composite quantum dot light emitting diode device provided by the invention, because the quantum dot luminescent material can produce a synergistic effect with organic-inorganic hybrid perovskite material, the excited state complex electroluminescence is produced, which not only enhances the luminous efficiency of a QLED (Quantum dot light-emitting diode) device and reduces the turn-on voltage of the device, but also enables the QLED device to display light of different colors by changing the bias voltage, moreover, for quantum dot composite luminescent layers with different structures, the applied bias voltage has different degrees of regulation function to the luminous color of the QLED devices; and in addition, the introduction of an organic-inorganic hybrid perovskite layer can also improve the interface property, luminescence uniformity and device stability of the QLED device.

The invention discloses a GaN hetero-junction diode device and a method for manufacturing the same. The GaN hetero-junction diode device comprises a substrate, a buffer layer, a channel layer, a potential barrier layer, a cap layer, a first Ohm anode, an Ohm cathode and a second Ohm anode. The buffer layer is positioned on the substrate; the channel layer is positioned on the buffer layer; the potential barrier layer is positioned on the channel layer, the potential barrier layer and the channel layer form a hetero-structure, and a two-dimensional electric channel is formed at a hetero-junction interface; the cap layer is positioned on the potential barrier layer; the first Ohm anode and the Ohm cathode are positioned on the upper side of the potential barrier layer and are arranged on two sides of the cap layer, and the first Ohm anode is in contact with the cap layer; the second Ohm anode is positioned on the first Ohm anode and the cap layer and is in Ohm metal contact with the cap layer. The GaN hetero-junction diode device and the method have the advantages that the problem of conflict between forward start voltage control and reverse electric leakage in the prior art can be solved, and a diode has characteristics of low start voltages and turn-on resistance and high reverse withstand voltages and forward turn-on currents.

A semiconductor element 100 including an MISFET according to the present invention is characterized by having diode characteristics in a reverse direction through an epitaxial channel layer 50. The semiconductor element 100 includes a semiconductor layer 20 of a first conductivity type, a body region 30 of a second conductivity type, source and drain regions 40 and 75 of the first conductivity type, an epitaxial channel layer 50 in contact with the body region, source and drain electrodes 45 and 70, a gate insulating film 60, and a gate electrode 65. If the voltage applied to the gate electrode of the MISFET is smaller than a threshold voltage, the semiconductor element 100 functions as a diode in which current flows from the source electrode 45 to the drain electrode 70 through the epitaxial channel layer 50. The absolute value of the turn-on voltage of this diode is smaller than that of the turn-on voltage of a body diode that is formed of the body region and the first silicon carbide semiconductor layer.

A lateral insulated gate bipolar transistor includes a semiconductor substrate including a drift layer, a collector region, a channel layer, an emitter region, a gate insulating layer, a gate electrode, a collector electrode, an emitter electrode, and a barrier layer. The barrier layer is disposed along either side of the collector region and is located to a depth deeper than a bottom of the channel layer. The barrier layer has an impurity concentration that is higher than an impurity concentration of the drift layer. The barrier layer has a first end close to the collector region and a second end far from the collector region. The first end is located between the channel layer and the collector region, and the second end is located on the bottom of the channel layer.

The invention relates to a technique for manufacturing the back of a non-through insulated-gate bipolar transistor chip, comprising the following steps of: (1) finishing a technique for processing the front of the non-through insulated-gate bipolar transistor chip; (2) grinding and thinning the back of a silicon chip, and removing stress; (3) injecting silicon ion, germanium ion or boron difluoride ion at the back of the silicon chip for amorphous pretreatment; (4) injecting boron ion at the back of the silicon chip; (5) carrying out furnace tube low temperature annealing; (6) adopting a sputtering or an evaporating method, generating an aluminium film at the back of the silicon chip, and carrying out alloy treatment; and (7) adopting the sputtering or the evaporating method, respectively preparing a titanium, a nickel and a silver metal layers at the back of the silicon chip. The back of the silicon chip is firstly injected with the silicon ion, the germanium ion or the boron difluoride ion for amorphous pretreatment and then injected with the boron ion for low-temperature annealing, so that the activation rate of injecting the boron impurity is improved, the conductive modulation effect for a drifting area can be enhanced, and the conducting resistance and conducting voltage are effectively reduced. The technique can be widely applied to a manufacturing technique of a semiconductor.