643 results about "Blocking layer" patented technology

An organic light-emitting device comprises an anode, a cathode and an organic layer formed between the anode and the cathode, and the organic layer comprises a hole injection layer, a hole transmission area, an electron blocking layer, a light-emitting area and an electron transmission area. The hole transport region comprises a first material and a second material, the first material and the second material are sequentially evaporated to form two hole transport layers, and the first material is selected from a compound shown in the formula 1; and the second material is selected from a compound shown in a formula 2. According to the invention, the first material with a high refractive index is used as the first hole transport layer, the second material with a low refractive index is used as the second hole transport layer, and the structures of the first material and the second material are respectively limited at the same time. The invention overcomes the limitation of a single material or a simple mixed material in the aspects of hole transport and luminous efficiency. .

Embodiments of the present application relate to the technical field of display, and provide a display panel and a display device, for use in improving the wide-angle anti-peeping effect of the display panel. The display panel comprises: a substrate; a plurality of light-emitting elements located on one side of the substrate, wherein each of the light-emitting elements comprises a first light-emitting unit and a second light-emitting unit; a first light blocking layer located on the side of the first light-emitting unit distant from the substrate, wherein the first light blocking layer comprises a first opening; and a second light blocking layer located on the side of the first light blocking layer distant from the substrate, wherein the second light blocking layer comprises a second opening. In a direction perpendicular to the plane where the substrate is located, both the first opening and the second opening at least partially overlap the first light-emitting unit; and the area of the first opening is greater than that of the second opening, and the orthographic projection of the second light blocking layer on the plane where the substrate is located at least partially covers the edge of the first opening.

The invention relates to the technical field of chip preparation, and provides a chip based on an annular photonic crystal and a preparation method thereof. The preparation method comprises the following steps: growing a nucleating layer on a substrate; growing a superlattice structure on one side, away from the substrate, of the nucleating layer; sequentially growing an n-type coating layer, an n-type waveguide layer, a quantum well and a p-type electron blocking layer on one side, deviating from the nucleating layer, of the superlattice structure; etching a plurality of annular cavities on the p-type electron barrier layer to form an annular photonic crystal; growing a p-type extension contact layer on one side, deviating from the quantum well, of the p-type electron blocking layer; and carrying out in-situ annealing treatment. According to the preparation method, the directivity of the photonic band gap can be effectively adjusted, uniform light waves in all directions on the side face can be formed, so that leakage of laser from a non-light-emitting area on the side face is restrained, the light emitting efficiency is improved, the annular photonic crystals are periodically distributed, and the light beam quality is effectively guaranteed.

Semiconductor devices including one or more hydrogen-blocking layers are described. In one example, a semiconductor device comprises a semiconductor substrate including a source region, a gate region, a drain region, and a drain access region, where a heterojunction structure is disposed over the semiconductor substrate. The heterojunction structure includes a buffer layer over the semiconductor substrate and a barrier layer over the buffer layer. A p-doped III-N layer is disposed over the barrier layer in the gate region and a gate electrode is formed over the p-doped III-N layer. A first hydrogen-blocking layer is disposed over the gate electrode where the first hydrogen-blocking layer is configured to arrest diffusion of hydrogen into the p-doped III-N layer from a dielectric layer formed after forming the gate electrode.

An electroluminescent display device according to an example embodiment of the present disclosure may include a substrate having an active area and a non-active area, an oxide thin film transistor disposed on the substrate, an inorganic layer disposed on the oxide thin film transistor, an organic layer disposed on the inorganic layer, at least one hole disposed in the organic layer of the non-active area, a hydrogen blocking layer disposed on the organic layer and an inner surface of the hole and a light emitting element disposed on the organic layer and including an anode, a light emitting unit, and a cathode. As a result, characteristics and reliability of the thin film transistor can be improved by preventing hydrogen from flowing into the oxide thin film transistor.

This invention relates to an aromatic amine organic compound and an organic electroluminescent device containing the same, belonging to the field of semiconductor materials technology. The structure of the compound provided by this invention is shown in general formula (1): When the hole transport material or electron blocking layer material of the organic electroluminescent device is prepared by using the aromatic amine compound of this invention, the device voltage can be reduced and the device life can be extended at the same time, especially the device high temperature life is significantly improved.

The invention provides a compound with an electron transmission function, an organic electroluminescent device containing the compound and application of the compound, the structure of the compound takes 9-alkyl-9-phenyl fluorenyl, phenanthryl and a triazine group as main components, the 9-alkyl-9-phenyl fluorenyl is one of core structures, fluorene is a polycyclic aromatic hydrocarbon with better planarity, and the triazine group is one of the core structures. Alkyl and phenyl are introduced to the ninth site to generate strong spatial repulsive force with a fluorene ring, a three-dimensional and non-planar propeller-shaped structure is formed, and the non-planar structure can effectively inhibit close packing of molecules in a solid state, so that concentration quenching and excimer formation caused by pi-pi packing are prevented, and the stability of the fluorescent probe is improved. And moreover, the rigid and non-planar structure can also effectively improve the thermal stability of the material, and the service life of the device is prolonged. The compound provided by the invention is used as an electron transport layer and a hole blocking layer in a light-emitting device, so that the device has low driving voltage, high luminous efficiency and long service life.

The invention belongs to the field of lasers, and discloses a growth method for reducing laser Ith through N grating burying, which subversively adopts an N-type grating structure, uses a built-in P-N junction formed by the N-type grating structure and a subsequent P-type buried layer as a natural and efficient current blocking layer, and structurally eliminates a current leakage path. Afterwards, in the heating stage, trace arsine is introduced to carry out atomic-scale protection on the sensitive grating morphology, at the optimal mass transport temperature, the high mobility characteristic of indium atoms is utilized to carry out shape-preserving filling on grating grooves, flawless preliminary planarization is achieved, and through variable-temperature thickening growth and high-temperature annealing in the pure phosphorus atmosphere, the high-temperature-resistant grating is obtained. And performing quality optimization and defect repair on the buried layer and the key interface. The series of linked steps ensure that the indium phosphide buried layer with flat atomic scale and complete crystal lattice can grow on the fragile N-type grating, and ensure that a high-quality covering layer and an active region grow on the N-type grating.

A method for making a semiconductor structure, including: forming a conductive layer; forming a patterned mask layer on the conductive layer; patterning the conductive layer to form a recess and a conductive feature; forming a first dielectric layer over the patterned mask layer and filling the recess with the first dielectric layer; patterning the first dielectric layer to form an opening; selectively forming a blocking layer in the opening; forming an etch stop layer to cover the first dielectric layer and exposing the blocking layer; forming on the etch stop layer a second dielectric layer; forming a second dielectric layer on the etch stop layer; patterning the second dielectric layer to form a through hole and exposing the conductive feature; and filling the through hole with an electrically conductive material to form an interconnect electrically connected to the conductive feature.

The invention relates to the technical field of LEDs, and discloses a flip light-emitting diode chip and a preparation method thereof. The flip light-emitting diode chip comprises a substrate and an epitaxial layer stacked on the substrate, the epitaxial layer is provided with a current expansion layer, a current blocking layer, a reflecting layer, a first insulating layer, a connecting layer and a second insulating layer, a fourth through hole and a fifth through hole are formed in the second insulating layer, an N-type bonding pad is arranged at the fourth through hole, and a P-type bonding pad is arranged at the fifth through hole; wherein the connecting layer comprises a first sub-layer, a second sub-layer, a third sub-layer and a fourth sub-layer; the first sub-layer comprises a Cr layer, an Al layer, a first Ti layer, a first Pt layer, a second Ti layer and a second Pt layer which are stacked in sequence; the second sub-layer is an AlCu alloy layer; the third sub-layer comprises 2 to 4 layers of CuNi alloy layers; and the fourth sub-layer is a Ti layer. By implementing the flip light-emitting diode chip, the effective contact between the bonding pad and the connecting layer can be realized on the basis of not increasing the cost, and the heat dissipation performance of the flip light-emitting diode chip is improved.

A method for manufacturing a semiconductor device includes: forming a first conductive interconnect which penetrates a dielectric layer disposed over a substrate; forming a patterned dielectric layer on the dielectric layer, the patterned dielectric layer being formed with a trench and the first conductive interconnect being exposed from the trench; selectively forming a blocking layer to cover the first conductive interconnect, the blocking layer being formed using an acidic solution including a blocking material; selectively forming a barrier material layer on the dielectric layer and the patterned dielectric layer; removing the blocking layer; forming a conductive material layer on the barrier material layer; and removing a portion of the conductive material layer and a portion of the barrier material layer to form a second conductive connected to the first conductive interconnect.

The application relates to a coated glass and a laminated glass, the coated glass comprising a first glass sheet and a low-emissivity stack arranged on at least one surface of the first glass sheet, the low-emissivity stack comprising at least one transparent conductive oxide layer and at least one visible light blocking layer, the at least one visible light blocking layer being arranged on a side of the at least one transparent conductive oxide layer away from the first glass sheet, the at least one visible light blocking layer having a total physical thickness greater than 10 nm; the first glass sheet having a visible light transmittance TL1, the coated glass having a visible light transmittance TL2, TL1 and TL2 satisfying TL2 / TL1<=0.4. The coated glass can ensure low emissivity and low visible light transmittance, realize low visible light reflectivity, and make the prepared laminated glass have neutral color and lower manufacturing cost.

The invention is suitable for the technical field of semiconductor LED display, and provides a high-color-gamut LED chip structure and a preparation method thereof. The high-color-gamut LED chip structure comprises a substrate material, a buffer layer, a first semiconductor layer, a green wave quantum well layer, an electron hole adjusting layer, a blue wave quantum well layer, a second semiconductor layer, a current blocking layer and a current expansion layer which are sequentially arranged from bottom to top, and further comprises a first metal electrode layer, a second metal electrode layer and a transparent insulating layer. The electron hole adjusting layer is used for controlling the distribution of electrons and holes in the green wave quantum well layer and the blue wave quantum well layer so as to adjust the wavelength and the spectral intensity of emergent light of the green wave quantum well layer; through introduction of the electron hole adjusting layer, the wavelength of a long wave and the corresponding spectral intensity can be effectively controlled, two wavelengths can be emitted from a single chip, and through introduction of double waves, the color gamut of a display screen can be improved.

The invention relates to a power transmission flexible bus which has three waterproof layers from inside to outside through the arrangement of a metal protection layer, a first waterproof layer and a second waterproof layer, ensures the electrical insulation, and also has the waterproof effect through the arrangement of a mechanical protection layer. Stable and reliable protection is formed on the surface of a product, which is directly exposed to seawater, and the mechanical strength is improved; therefore, the waterproof and compressive properties of the product in the deep sea environment are remarkably improved, the use safety of the product is effectively improved, and the service life of the product is effectively prolonged. Meanwhile, through the arrangement of the first lining layer and the second lining layer, stable and reliable supporting and buffering are formed for the metal protection layer and the mechanical protection layer, the metal protection layer is prevented from damaging the insulating layer, the mechanical protection layer is also prevented from damaging the second waterproof layer and the metal protection layer, and the durability of each layer of the product is further ensured; mutual damage between different layers is avoided, and the function integrity of the function of each layer in the preset use period is guaranteed.

The invention relates to a blue-green dual-band light-emitting diode epitaxial wafer which comprises a substrate, a buffer layer, an N-type semiconductor layer, a low-temperature stress release layer, a multi-quantum well light-emitting layer, an electron blocking layer and a P-type semiconductor layer which are sequentially stacked in the epitaxial direction. The multi-quantum light-emitting layer comprises a first blue light InGaN layer, a first blue light barrier layer, a first green light barrier layer, a first green light InGaN layer, a second green light barrier layer, a second blue light InGaN layer and a second blue light barrier layer which are sequentially, periodically and alternately grown in the epitaxial direction. The first green light barrier layer comprises a pre-well low-energy-level barrier layer, a pre-well high-energy-level barrier layer and a pre-well polarization compensation barrier layer which are sequentially grown along the epitaxial direction; the second green light barrier layer comprises a post-well polarization compensation barrier layer, a post-well high-energy-level barrier layer and a post-well low-energy-level barrier layer which are sequentially grown along the epitaxial direction; the preparation cost of the backlight source can be effectively reduced, the use of fluorescent powder is reduced, the luminous efficiency is high, and the color rendering performance is good.

The invention provides a photoelectric limitation enhanced high-efficiency photonic crystal surface emitting laser, which belongs to the technical field of semiconductor lasers, and comprises a substrate, and an N-type buffer layer, an N-type cladding, an N-type limiting layer, an active region, a P-type limiting layer, a photonic crystal layer and a current blocking layer which are epitaxially grown from bottom to top, the P-type cladding, the P-type distributed Bragg reflection layer and the P-type cover layer are grown in a secondary epitaxial mode, and the electric insulation layer, the positive electrode, the anti-reflection dielectric layer and the negative electrode are arranged. The laser is divided into a gain region and a non-gain region; in the gain region, the current blocking layer is completely etched away, and a photonic crystal hole is formed in the photonic crystal layer; and in the non-gain region, the current blocking layer is reserved and etched to form a grating. According to the invention, the current blocking layer is introduced, a reverse biased PN junction is formed in the non-gain region, and lateral diffusion of carriers is inhibited; the grating in the non-gain area strongly limits a light field horizontally propagated by the photonic crystal resonant cavity in the gain area, and light loss is reduced. According to the invention, the efficiency of the laser is improved.

A light emitting display device may include a first insulating film having recess portions and a flat portion between adjacent recess portions at first and second subpixels adjacent to each other, a first electrode in a recess portion of each of the first and second subpixels, a dummy pattern on the flat portion of the first insulating film and spaced apart from the first electrode, a first electron blocking layer at the first subpixel and a second electron blocking layer at the second subpixel, the first and second electron blocking layers having an edge on the dummy pattern and spaced apart from each other, a first color light emitting layer provided at the first subpixel and covering the edge of the first electron blocking layer, a second color light emitting layer on the second electron blocking layer, and a second electrode on the first and second color light emitting layers.

A fingerprint sensor and a display device including the same are disclosed. The fingerprint sensor includes a substrate, a circuit element layer on a first surface of the substrate and including a plurality of conductive layers, a light emitting element layer on the circuit element layer and including a light emitting element and a light blocking layer, and a light sensor layer on a second surface of the substrate and including a light sensor, wherein the light blocking layer includes a contact hole exposing a first electrode of the light emitting element and a first opening portion exposing a portion of the circuit element layer, and the circuit element layer includes a second opening portion formed in the plurality of conductive layers and includes a light transmission hole of which at least a portion overlaps the first opening portion.

Embodiments of the present application provide a semiconductor structure manufacturing method and a semiconductor structure. The manufacturing method comprises: providing a substrate; the substrate comprises a substrate, a dielectric structure on the substrate, and a blocking material layer on the dielectric structure; the dielectric structure comprises at least one dielectric layer; forming a first mask layer on the blocking material layer; the first mask layer comprises a first opening exposing a top surface of the blocking material layer; forming a second mask layer in the first opening, and removing the first mask layer; the second mask layer comprises a second opening exposing a top surface of the blocking material layer; using the second mask layer as a mask to pattern the blocking material layer, to form a blocking layer for patterning the dielectric structure; the blocking layer comprises a third opening exposing a top surface of the dielectric structure; the third opening has a size greater than that of the second opening.

The disclosure provides a laser, a preparation method of the laser and an optical module, and relates to the technical field of optical elements, so as to meet the demand of the optical module for high-power lasers. The laser comprises the following steps: growing an etching auxiliary layer on the surface of a wafer body of the laser, the longitudinal etching rate of the wafer body is greater than the transverse etching rate of the wafer body, the transverse etching rate of the etching auxiliary layer is greater than the transverse etching rate of the wafer body, and the wafer body comprises a quantum well layer; forming a mask layer above the etching auxiliary layer, and pre-treating the mask layer to form a BH pattern; etching the BH pattern, so that the top of the wafer body is etched into a BH mesa, the etching depth is below the quantum well layer, and the etching depth is below the quantum well layer; growing a current blocking layer on both sides of the BH mesa; removing the mask layer and the etching auxiliary layer; and forming a P-InP layer on the top of the BH mesa and the current blocking layer.

Provided is a a semiconductor laser module, comprising, from bottom to top, a substrate, a lower limiting layer, a lower waveguide layer, an active layer, an upper waveguide layer, an electron blocking layer, and an upper limiting layer. The active layer satisfies at least one of that a content ratio of an element Al to an element H satisfies a first preset proportion distribution, a content ratio of an element In to the element H satisfies a second preset proportion distribution, a content ratio of an element Si to the element H satisfies a third preset proportion distribution, a content ratio of an element Mg to the element H satisfies a fourth preset proportion distribution, and a content ratio of an element C to an element O satisfies a fifth preset proportion distribution.

A light-emitting diode (LED) epitaxial structure, an LED device, and a manufacturing method of an LED epitaxial structure are provided. The LED epitaxial structure 100 includes an n-type confinement layer 20, an n-type waveguide layer 30, a light-emitting layer 40, a p-type waveguide layer 50, and a p-type confinement layer 60 that are sequentially stacked. The p-type waveguide layer 50 includes a first p-type waveguide sub-layer 51, an electron blocking layer 52, and a second p-type waveguide sub-layer 53 that are sequentially stacked, where the first p-type waveguide sub-layer 51 is disposed closer to the light-emitting layer 40 than the second p-type waveguide sub-layer 53, and the electron blocking layer 52 includes at least one oxide layer of aluminumygallium1-yarsenide (AlyGa1-yAs) 521.

A display device includes a plurality of pixels disposed in a display area, each of the pixels including a plurality of pixel electrodes spaced apart from each other, a first light blocking layer disposed in the display area and including a plurality of holes overlapping the plurality of pixel electrodes, a plurality of color filters disposed on the first light blocking layer and respectively corresponding to the plurality of holes, and a second light blocking layer disposed on the color filters and corresponding to the pixel electrodes of some of the plurality of pixels. The second light blocking layer surrounds the corresponding pixel electrodes of the some of the plurality of pixels in a plan view and includes a plurality of light blocking patterns having a constant width.

This invention discloses a light-emitting diode (LED) epitaxial wafer and its fabrication method. The LED epitaxial wafer includes a substrate and a buffer layer, an N-type GaN layer, a stress relief layer, a multiple quantum well layer, an electron blocking layer, and a P-type GaN layer sequentially stacked on the substrate. The stress relief layer includes a Si-doped GaN layer, a Si-doped porous GaN layer, a GaN leveling layer, and an InGaN / GaN superlattice layer sequentially stacked on the N-type GaN layer. The LED fabricated by this invention can reduce the stress and defect density of the epitaxial layer material, improve the quality of the multiple quantum well layer, and enhance the radiative recombination efficiency in the multiple quantum well layer, thereby improving the luminous efficiency of the LED.

The invention provides a display panel, a preparation method thereof and a display device. The display panel comprises a substrate, an isolation structure, a first packaging layer and an etching barrier layer, wherein the isolation structure is arranged on one side of the substrate, a plurality of isolation openings are defined by the isolation structure, and the isolation openings are used for containing at least part of the light-emitting units; the first packaging layer is arranged on the side, away from the substrate, of the light-emitting unit; the etching barrier layer is arranged on the side, away from the substrate, of the first packaging layer. In the display panel, the first packaging layer and the light-emitting unit below are protected through the etching barrier layer, the thickness of the first packaging layer can be reduced, the production process can be accelerated, the productivity can be released, meanwhile, the photoresist thickness in the preparation process can be reduced, the photoresist stripping condition is reduced, the production efficiency and the product yield are improved, and the production cost is reduced. And the processing property of the display panel is improved.

The invention provides a light emitting diode capable of reducing dislocation density and a preparation method thereof, and belongs to the technical field of photoelectron manufacturing. The light-emitting diode comprises a buffer layer, a dislocation barrier layer and an epitaxial layer which are stacked in sequence, the dislocation barrier layer comprises a first sub-layer, a second sub-layer and a third sub-layer which are stacked in sequence, the first sub-layer comprises a GaN layer, the second sub-layer comprises a carbon-doped GaN layer, and the third sub-layer comprises an AlGaN layer. According to the embodiment of the invention, the dislocation density of the epitaxial layer can be reduced, and the light-emitting effect of the light-emitting diode is improved.

The invention relates to the field of integrated circuit manufacturing, in particular to an integrated circuit and a packaging method thereof. Etching an open groove in the blank area; embedding the embedded core particles into the open groove to obtain an integrated chip; a graphical insulation blocking layer is arranged on the upper surface of the integrated chip; obtaining a top wiring layer on the basis of the insulation blocking layer; inversely mounting external core particles on the top wiring layer; the external core particles are electrically connected with the embedded core particles through the top wiring layer. The core particles and the chip are silicon-based integrated circuits, thermal expansion coefficients are highly matched, and heat dissipation is facilitated; on one hand, the integration level of the core particles of the packaging device is improved, and on the other hand, vertical short-distance interconnection between the core particles is provided, so that the signal quality is guaranteed; through silicon vias penetrating through the embedded core particles are prevented from being formed in the embedded core particles, so that the signal transmission path is shortened, and meanwhile, the low production cost and the high embedded core particle setting flexibility are guaranteed.

The application relates to the technical field of organic photoelectric material preparation, in particular to an organic electroluminescent device and an illumination or display device containing the same. In the organic electroluminescent device, a compound containing a benzopentaheterocyclic ring fused phenanthryl group as a key group is used for the covering layer, and the hole blocking layer of the limited material can improve the light emission and light extraction efficiency of the device, improve the dependence on the angle, effectively improve the light emission efficiency of the organic electroluminescent device, and has a good application prospect.

The utility model belongs to the technical field of transparent film bags, and discloses a transparent film bag with a diaphragm structure, which comprises a transparent film bag body, the upper parts of the inner walls of the two sides of the transparent film bag body are jointly provided with a pressing and sealing strip, the inner surface of the transparent film bag body is provided with a diaphragm mechanism, and the diaphragm mechanism comprises a contact layer. The membrane mechanism comprises a contact layer, a barrier layer and a protective layer, one side of the contact layer is provided with a transition layer, one side of the transition layer is provided with the barrier layer, one side of the barrier layer is provided with the adhesive layer, and one side of the adhesive layer is provided with the protective layer. Under the action that the blocking layer effectively blocks external factors such as air and moisture and the protection layer protects the internal structure from being damaged, the protection function of the film bag is enhanced, the requirement for all-around protection of articles is met, and the articles are prevented from going bad and being damaged.

A quantum dot light emitting structure and a method for manufacturing the quantum dot light emitting structure, and an array substrate are disclosed. The quantum dot light emitting structure includes: a quantum dot light emitting layer; an electrode; and an electron transport layer located between the quantum dot light emitting layer and the electrode, the quantum dot light emitting structure further comprises an electron blocking layer located in the electron transport layer, a root-mean-square (RMS) roughness of a surface, close to the quantum dot light emitting layer, of the electron transport layer is different from a root-mean-square (RMS) roughness of a surface, away from the quantum dot light emitting layer, of the electron transport layer.