47 results about "Metal work function" patented technology

A process is disclosed of forming metal replacement gates for NMOS and PMOS transistors with oxygen in the PMOS metal gates and metal atom enrichment in the NMOS gates such that the PMOS gates have effective work functions above 4.85 eV and the NMOS gates have effective work functions below 4.25 eV. Metal work function layers in both the NMOS and PMOS gates are oxidized to increase their effective work functions to the desired PMOS range. An oxygen diffusion blocking layer is formed over the PMOS gate and an oxygen getter is formed over the NMOS gates. A getter anneal extracts the oxygen from the NMOS work function layers and adds metal atom enrichment to the NMOS work function layers, reducing their effective work functions to the desired NMOS range. Processes and materials for the metal work function layers, the oxidation process and oxygen gettering are disclosed.

A non-volatile semiconductor memory device comprises a substrate including a source region, a drain region and a channel region provided between the source region and the drain region with a gate stack located above the channel region with a metal gate located above the gate stack. The metal gate is comprised of a metal having a specific metal work function relative to a composition of a layer of the gate stack that causes electrons to travel through the entire thickness of the blocking layer via direct tunneling. The gate stack preferably comprises a multiple layer stack selected from a group of multiple layer stacks consisting of: ONO, ONH, OHH, OHO, HHH, or HNH, where O is an oxide material, N is SiN, and H is a high κ material.

The invention relates to the field of semiconductor manufacturing and provides a method for manufacturing a semiconductor device. The method comprises the following steps: providing a semiconductor substrate; forming an interface layer, a gate dielectric layer and a metal work function layer on the substrate; forming a diffusion barrier layer on the metal work function layer; forming a metal oxygen absorbing layer on the diffusion barrier layer; and carrying out thermal annealing treatment on the device so as to ensure the metal oxygen absorbing layer to absorb the oxygen in the interface layer to reduce the thickness of the interface layer and ensure the diffusion barrier layer to prevent the oxygen absorbing metals in the metal oxygen absorbing layer from being diffused into the metal work function layer. By adopting the method, the oxygen absorbing metals can be prevented from being diffused into the work function layer and/or gate dielectric layer while the thickness of the interface layer is reduced, thus reducing the equivalent oxide thickness under the premise of not affecting the threshold voltage of the device.

The invention discloses a transistor. The transistor comprises a base with a channel region, a source region, a drain region, a gate high-K dielectric layer and an interface layer, wherein the source region and the drain region are positioned at the two ends of the channel region of the base; the gate high-K dielectric layer is formed on a top layer of the base above the channel region between the source region and the drain region; the interface layer is positioned below the gate high-K dielectric layer; a first part of the interface layer is close to a source, and a second part of the interface layer is close to a drain; and an equivalent oxide layer of the first part is thicker than an equivalent oxide layer of a second layer. An asymmetric interface layer is formed by an asymmetrically substituted metal gate and is thinner on the side of the drain and is thicker on the side of the source. A short channel effect is more important on the thinner drain side, and the asymmetric interface layer contributes to controlling the short channel effect; and on the thicker source side, carrier mobility has larger influence on a device, and the asymmetric interface layer can prevent a carrier mobility rate from being reduced. In addition, the asymmetrically substituted metal gate can also form an asymmetric metal work function.

The invention provides a non-junction field-effect transistor. The non-junction field-effect transistor includes a source region and a drain region, wherein the source region and the drain region are arranged at two sides of a channel region in a central symmetry manner; the channel region, the source region and the drain region are the same in the doping type and the doping concentration; the channel region is provided with a gate dielectric layer and a gate electrode which is arranged on the gate dielectric layer; the source region and the drain region are respectively provided with a source electrode dielectric layer, a source electrode, a source end side electrode, a drain electrode dielectric layer, a drain electrode and a drain end side electrode; isolating dielectric layers isolate the source electrode from the gate electrode; and the work functions of the source electrode and the drain electrode are the work functions which are determined according to the doping type so as to form a conductive carrier layer on the surface of the source region and the surface of the drain region. The non-junction field-effect transistor can accumulate the corresponding type of carriers on the source region and the drain region to perform current transportation by adjusting the metal work functions of the source electrode and the drain electrode. The structure of the non-junction field-effect transistor can restrain the influence of rough edge of a technological fluctuation line on the device performance, can maintain the current driving capability of a non-junction device, and can optimize the subthreshold feature of the non-junction device so as to improve the stability of device.

The invention provides a manufacturing method of a semiconductor device. The method includes the following steps that: a semiconductor substrate is provided, an opening is formed in the substrate, and the opening is formed by removing a dummy gate; metal work function layers are formed at the internal wall of the opening; ion implantation of a certain angle is carried out, so that threshold voltage corresponding to a metal work function layer at one side of a source region is larger than threshold voltage corresponding to a metal work function layer at one side of a drain region; and other grid layers are filled. According to the manufacturing method of the invention, voltage drop of a channel region near a source end is increased, and voltage drop of a channel region near a drain end is decreased, and therefore, the electric field of the drain end can be decreased, and short-channel effects such as DIBL (drain induced barrier lowering) can be suppressed, and the electric field of the source end is increased, so that the transport speed of carriers can be improved, and the performance of the device can be improved.

The invention discloses an organic light-emitting device and a preparation method thereof. The organic light-emitting device consists of a conductive anode glass substrate, a hole injection layer, a hole transport layer, a luminescent layer, an electron transport layer, an electron injection layer and a composite cathode, wherein the layers are successively laminated. The composite anode includes a low-work function metal layer, a metallic oxide doping layer, and a conductive thin film layer, wherein the layers are successively laminated and the work functions of the layers are from 2.0eV to 3.5eV. The energy level difference between lowest unoccupied molecular orbital units of the low-work function metal work function and an organic layer is small, so that the electron injection capability can be effectively improved. The metallic oxide doping layer uses the metallic oxide and the silicon compound to carry out doping; the metallic oxide has high stability and the light transmittance in the visible light range is high; and the silicon compound forms a well-ordered microsphere structure after preparation, thereby carrying out scattering on the light. The conductive thin-film material can reflect the transmitted light and thus the light can be reflected to the bottom of the device; and with the composite electrode, the luminous efficiency can be effectively improved.

Disclosed is a method for adjusting an equivalent work function of a metal gate electrode. The method comprises: forming a metal gate electrode configuration at least comprising a metal work function layer; and performing plasma processing on at least one layer of the metal gate electrode configuration. In this way, the equivalent work function of the metal gate electrode can be adjusted in a relatively flexible manner.

The invention discloses a high-dielectric-constant metal gate production method which includes that a substrate is provided, and an interface layer, a high-dielectric-constant gate medium layer and a metal work function layer are sequentially deposited on the substrate; an isolation layer is deposited on the metal work function layer; a stoichiometric TiN1+x layer is prepared on the isolation layer; rapid thermal annealing is performed; and an Al electrode is deposited on the TiN1+x layer. According to the method, after the isolation layer is deposited, the stoichiometric TiN1+x layer is prepared on the isolation layer, high-concentration solid N is diffused in the rapid thermal annealing process, accordingly the crystal boundary of crystals of the isolation layer is changed, further the route of metal Al in the Al electrode diffusing towards the metal work function layer and the high-dielectric-constant gate medium layer is destroyed, Al electrode diffusing is avoided, and performance of semiconductor devices is improved.

The invention provides a gate forming method comprising the steps of forming a single doped metal work function adjustment layer on a gate dielectric layer to enable a target work function to be between the metal work function layer and a work function of doped particles, and forming other gate layers on the metal work function adjustment layer. Through the method, the threshold voltage can be adjusted easily, the process is simple and can be implemented without multiple metal gate layers, and the manufacturing cost is reduced.

The invention relates to a thin film getter activating in low temperature of an uncooled focal plane detector and a preparation method thereof and the thin film getter activating in low temperature has the performance of low-temperature activation and high gas absorbing. The getter comprises an adjustable layer and an air sucking layer, wherein the adjustable layer is deposited on a window opening of the uncooled focal plane detector and the air sucking layer is deposited on the adjustable layer. The adjustable layer is made of anyone of the following metal comprising Ti, Zr, AL, Cr, Cu, Fe, Pt or Ru, and the sucking layer is made of multi-component alloy comprising the two materials of Zr and Co and at least one of the materials of Y, La and Ce. An extremely tight transition layer is formed between the adjustable layer and the window opening, the thickness of the transition layer is 20-50 nm, the thickness of the adjustable layer is 1-2 [mu]m, and the thickness of the sucking layer is 2-5 [mu]m. The thin film getter of a porous structure is adopted, the transition layer is relatively-extremely tight, and is relatively matched with infrared window metal work functions, so that the adhesive force of the thin film getter on a substrate is reinforced.

A method of determining a work function of a metal to be used as a metal gate material provides a metal-on-silicon (MS) Schottky diode on a silicon substrate. The MS Schottky diode is formed by deposition of the metal in a single step deposition through a shadow mask that is secured on the silicon substrate.

The invention relates to a preparation method of an electrochemiluminescence (ECL) nano illuminant based on aminated bipyridyl ruthenium (Ru(bpy)-NH2). The invention provides a preparation method of an enhanced ECL luminescent material based on Ru(bpy)-NH2 in order to overcome the defects that existing bipyridyl ruthenium and derivatives thereof are low in ECL luminescent efficiency, prone to aggregation in a water phase, unstable in intermediate, difficult to be directly applied to a solid-state sensing platform and the like. According to the method, Pd<2+> is subjected to in-situ reduction on the surface of MIL-101(Cr) to synthesize Pd NSs@MIL-101 on the basis of a palladium metal work function, an excited state energy level of Ru(bpy)-NH2 and a principle that excited potentials of the palladium metal work function and the Ru(bpy)-NH2 are close to each other, so that the efficient ECL nanometer illuminant (Ru/Pd NSs@MIL-101) is formed. The prepared material is stable in luminescence,high in strength and simple in biological modification, and can be applied to the solid-state sensing platform.

A method for judging whether it is suitable to coat titanium dioxide catalyst on metal surface or not includes comparing work function of metal with work function of titanium dioxide catalyst, confirming that it is suitable to coat titanium dioxide catalyst on metal surface if metal work function is less than work function of titanium dioxide catalyst or otherwise confirming that it is not suitable to coat titanium dioxide catalyst on metal surface.

The present disclosure relates to a method for forming a p-metal work function nitride film having a desired p-work function on a substrate, including: adjusting one or more of a temperature of a substrate, a duration of one or more temporally separated vapor phase pulses, a ratio of a tungsten precursor to a titanium precursor, or a pressure of a reaction to tune a work function of a p-metal workfunction nitride film to a desired p-work function, and contacting the substrate with temporally separated vapor phase pulses of the tungsten precursor, the titanium precursor, and a reactive gas toform a p-metal work function nitride film thereon having the desired p-work function.

The invention discloses an integrated manufacturing method of a semiconductor device. A process of forming first-class metal work function layers with m thicknesses comprises the following steps: 1, dividing the first-class metal work function layer with the thickest thickness into a first first-class metal work function sub-layer, a second first-class metal work function sub-layer to an mth first-class metal work function sub-layer from the bottom to the top; and 2, carrying out m times of circulation processes, wherein each time of circulation process comprises a metal work function comprehensive deposition process and a metal work function selective etching process. Each circulation process is set as follows: first to mth first-class metal work function sub-layers are sequentially formed in each metal work function comprehensive deposition process; and the etching area of each time of metal work function selective etching process is reduced in sequence so as to ensure that each time of metal work function selective etching process only etches one independent first type of metal work function sub-layer. According to the invention, undercutting at the bottom of the thicker first type metal work function layer can be avoided, so that the metal work function boundary effect can be optimized.