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1451 results about "Isolation layer" patented technology

Layer isolate will isolate objects in a layer, and lock the rest of available layers. When you have complex drawings, you might want to lock and unlock layers quickly. Locking layers from layer manager definitely not good enough.

Current sensor chip packaging structure and packaging method

The invention relates to a current sensor chip packaging structure and a packaging method. The current sensor chip packaging structure comprises a bus frame and a chip which are packaged through a plastic package body, the side, provided with the chip bonding pad, of the chip is defined as the front face of the chip, only one side of the front face is configured to be opposite to the back face of the bus frame, the chip bonding pad is arranged on the other side, extending out of the bus frame, of the front face, and a sensor element is arranged on the side, right opposite to the bus frame, of the front face of the chip. A gap between the chip and the bus frame is provided with an isolation layer, and the front surface is connected to the back surface of the bus frame through the isolation layer. According to the current sensor chip packaging structure and the packaging method, the front surface of the chip is connected to the back surface of the bus frame through the isolation layer, and the sensor element is arranged at the position opposite to the front surface of the chip, so that the distance between the sensor element and the bus frame is minimized, and the reliability of the current sensor chip is improved by minimizing the distance between the sensor element and the bus frame. Sensitivity and measurement precision of the sensor are remarkably improved, and the problems of reduction of isolation voltage endurance capability and process fluctuation are avoided.
Owner:SHANGHAI CHIPANALOG MICROELECTRONICS LTD

Intelligent early warning cable

The utility model discloses an intelligent early warning cable, which comprises a power line insulation wire core arranged in a first belting layer, the power line insulation wire core comprises a conductor and an insulation layer coated outside the conductor, and a temperature measuring element is arranged in the conductor; an armor layer is arranged outside the first belting layer, and a vibration measuring element is arranged in the armor layer; and an isolating layer is arranged between the first belting layer and the armor layer. The temperature measuring element with the temperature measuring function is arranged on the outermost layer of the conductor, so that the temperature of the cable conductor can be monitored more accurately; the vibration measurement element with the vibration measurement function is arranged in the armor layer, and the isolation layer is arranged between the first belting layer and the armor layer, so that an electromagnetic field generated by the cable in the first belting layer under the conditions of high voltage and large current can be isolated, and the problem that the electromagnetic field interferes optical signal transmission in the vibration optical fiber is avoided; the vibration signal can be accurately detected, and the detection accuracy is prevented from being influenced by deviation.
Owner:TBEA DEYANG CABLE CO LTD

Method for reducing surface roughness of silicon nitride instant-fired sheet

ActiveCN121202576AAdhesive cementFish oil
The invention relates to the technical field of ceramic materials, in particular to a method for reducing the surface roughness of a silicon nitride instant-fired sheet, which comprises the following steps: S1, mixing alpha-silicon nitride, beta-silicon nitride, absolute ethyl alcohol and herring fish oil, grinding and dispersing to obtain basic mixed powder; s2, mixing, grinding and dispersing the filling mixed powder, absolute ethyl alcohol and herring fish oil, then carrying out filter pressing and drying, calcining and regrinding to obtain ground filling mixed powder; s3, mixing and ball-milling the basic mixed powder, the ground filling mixed powder, a solvent, an adhesive, a plasticizer and a dispersing agent to obtain slurry; s4, casting the slurry into a film; s5, attaching the thin film to the surface of the silicon nitride green body, and pressing the silicon nitride green body into a whole piece through an isostatic press to obtain a pressed green body; s6, a boron nitride isolation layer is printed on the surface of the pressed green body, and the green body with the isolation layer is obtained; and S7, stacking the green bodies with the isolating layers, and then carrying out adhesive removal and sintering reaction to obtain the silicon nitride ceramic chip.
Owner:江苏富乐华功率半导体研究院有限公司 +1

Back contact battery, manufacturing method thereof and photovoltaic module

The invention discloses a back contact battery, a manufacturing method thereof and a photovoltaic module, relates to the technical field of photovoltaic, and aims to reduce the electric leakage risk of the edge part, close to a groove, of a first doped semiconductor part and facilitate the improvement of the conversion efficiency of the back contact battery. The back contact battery comprises a semiconductor substrate, a first doped semiconductor part, an isolation layer and a second doped semiconductor part. The bottom surface of the third region is recessed into the semiconductor substrate relative to the surfaces of the first region and the second region, respectively, to form a groove. The surface height of the second area is smaller than the surface height of the first area in the direction from the second face to the first face. The first doped semiconductor portion is disposed in the first region. The isolation layer is at least arranged on the portion, close to the notch of the groove, of the first side face. The second doped semiconductor portion is disposed on the second region and a side of the isolation layer facing away from the semiconductor substrate. And the doping types of the second doped semiconductor part and the first doped semiconductor part are opposite.
Owner:LONGI GREEN ENERGY TECH CO LTD

Semiconductor structure and manufacturing method thereof

A semiconductor structure includes a substrate, plurality of active channels, a metal gate, a plurality of inner spacers and a first isolation layer. The substrate has an upper surface and a recess recessed relative to the upper surface. The active channels are vertically stacked on the upper surface of the substrate. The metal gate is disposed on the active channels. The inner spacers are disposed on a lateral surface of the metal gate. The first isolation layer is disposed within the recess and connected with the bottommost inner spacer. The first isolation layer protrudes relative to the upper surface of the substrate.
Owner:TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

Acoustic sensor systems with different heights

Acoustic sensor systems with different heights, as well as methods for configuring and operating such sensor systems are disclosed. In some embodiments, a sensor system described herein may include an acoustic transmitter element; and an acoustic receiver element; wherein the first portion of the piezoelectric material of the acoustic transmitter element comprises a first thickness, and the second portion of the piezoelectric material of the acoustic receiver element comprises a second thickness different from the first thickness; and wherein the isolation layer is structured to create a gap that physically separates the first portion of the second electrode layer from the second portion of the second electrode layer.
Owner:QUALCOMM INC

Terahertz metasurface capable of realizing independent control of amplitude and phase

PendingCN120784636AAntennasOptical elementsTransmission amplitudeAmplitude control
The invention discloses a terahertz metasurface capable of realizing independent control of amplitude and phase. The terahertz metasurface comprises a terahertz transparent substrate; the metasurface unit array is periodically arranged in a first direction, and each metasurface unit comprises a first structural layer which is of a dielectric resonance structure and is used for providing a phase regulation and control function; the second structural layer is a thin film formed by an adjustable absorption material and is used for providing an amplitude regulation and control function; the second structure layer is provided with an independent electrode for adjusting the transmission amplitude; a first dielectric isolation layer is arranged between the terahertz transparent substrate and the first structure layer and is used for reducing an electromagnetic coupling effect; the first structural layer and the second structural layer are stacked in the vertical direction through a three-dimensional processing technology, a second dielectric isolation layer is arranged between the first structural layer and the second structural layer, and the second dielectric isolation layer is a silicon dioxide SiO2 or silicon nitride Si3N4 film with the thickness D ranging from 100nm to 1000nm.
Owner:GUILIN UNIV OF ELECTRONIC TECH

Back contact solar cell and photovoltaic module

The invention provides a back contact solar cell and a photovoltaic module, the back contact solar cell comprises a substrate, the substrate is provided with a backlight surface, and the backlight surface comprises a first polarity area, a second polarity area and an isolation area arranged between the first polarity area and the second polarity area; a first doped layer and a second doped layer, the first doped layer is arranged in the first polarity region, the second doped layer is arranged in the second polarity region, and the doping types of the first doped layer and the second doped layer are opposite; the isolation layer is arranged in the isolation region, the isolation layer comprises an intrinsic polycrystalline silicon layer, a first passivation layer and a third doping layer which are sequentially stacked in the direction away from the substrate, and the doping type of the third doping layer is the same as that of the first doping layer or the second doping layer. The main isolation effect is achieved through the intrinsic polycrystalline silicon layer, the composite passivation effect can be achieved through combination of the first passivation layer and the third doping layer, composite passivation with chemical passivation and field passivation is achieved in the isolation area, and the surface recombination rate is greatly reduced.
Owner:ZHEJIANG AIKO SOLAR ENERGY TECH CO LTD +3

Memory device and method of forming the same

ActiveCN116133395BBit lineGate dielectric
A memory device and a method of forming the same, the memory device comprising: a semiconductor substrate, a plurality of active regions formed in the semiconductor substrate, the plurality of active regions separated by a plurality of first trenches extending in a first direction, a plurality of second trenches, and a plurality of third trenches extending in a second direction; a bit line doping region in the semiconductor substrate at a bottom of the second trenches and at a bottom of the second trenches communicating with the third trenches; a first isolation layer in the first trenches and the third trenches, a surface of the first isolation layer being lower than a surface of the active regions; a gate dielectric layer surrounding the active regions at the surface of the active regions; a metal gate surrounding the active regions at a surface of the gate dielectric layer on a sidewall of the active regions, a top surface of the metal gate being lower than a top surface of the active regions; and a source region at the top surface of the active regions. The memory device of the present application has improved storage density.
Owner:CHANGXIN MEMORY TECH INC

Flexible armored cable resistant to embrittlement in extremely cold environment

The invention discloses an anti-embrittlement flexible armored cable in an extremely cold environment. The anti-embrittlement flexible armored cable comprises a conductor, an insulating layer, a buffer isolation layer, a flexible armored layer and an outer sheath layer which are sequentially arranged from inside to outside. According to the armored cable, the structure of an existing cable is improved, the material formula of the insulating layer and the material formula of the outer sheath layer are optimized, the requirements for embrittlement resistance and high flexibility can be met, the protection performance of the armored cable can be enhanced, and aging tests show that the cable has good flexibility. The cable can meet the use requirement of long-term stable operation under the extremely cold severe condition with the temperature of-60 DEG C, has important practical significance and economic value, is reasonable in design, and is worthy of popularization and use.
Owner:GUIZHOU GUDA CABLE CO LTD

Semiconductor structure and forming method thereof

The invention provides a method for forming a semiconductor structure, which comprises the following steps of: providing a semiconductor substrate which comprises a first dielectric layer and a metal plug positioned in the first dielectric layer; sequentially forming a first isolation layer, a second dielectric layer, a second isolation layer and a hard mask layer on the top surface of the first dielectric layer; etching and removing the hard mask layer, the second isolation layer and a part of the second dielectric layer in a region corresponding to the metal plug to form an opening; the hard mask layer is removed; and etching is continued along the opening so as to expose the metal plug. The invention also provides a semiconductor structure. According to the semiconductor structure and the forming method provided by the invention, hole defects can be prevented from being formed in the metal layer when the opening is filled with the metal layer.
Owner:SEMICON TECH INNOVATION CENT(BEIJING) CORP

Semiconductor device and method for fabricating the same

A semiconductor device comprises a lower structure; a plurality of semiconductor layers laterally oriented in a direction parallel to a surface of the lower structure; a plurality of bit lines connected an end of the semiconductor layers and extending in a direction perpendicular to the surface of the lower structure; word lines extending laterally in a direction crossing the semiconductor layers over the semiconductor layers; and a device isolation layer extending in the direction parallel to the surface of the lower structure to be disposed between the bit lines and the word lines and including air gaps.
Owner:SK HYNIX INC

Battery box and battery pack

The utility model provides a battery box and a battery pack, the battery box comprises a box body and a box cover assembly, the box body comprises an accommodating cavity for accommodating a battery module and polystyrene foam, and one side of the box body is provided with a mounting port communicated with the accommodating cavity; the box cover assembly comprises a cover plate and an isolation layer, the cover plate is connected with the box body and covers the mounting opening, the isolation layer is arranged on the plate face, facing the side of the containing cavity, of the cover plate, and the isolation layer is used for separating at least part of the plate face from the polystyrene foam in the containing cavity. According to the battery box provided by the embodiment of the invention, the isolation layer is arranged on the plate surface of one side, facing the accommodating cavity of the box body, of the box cover, and at least part of the plate surface is separated from the polystyrene foam in the accommodating cavity, so that the bonding strength between the cover plate and the polystyrene foam can be reduced, and the cover plate is more convenient to disassemble; the polystyrene foam and other parts are not easy to damage in the cover plate dismounting process, so that the maintenance cost of the battery pack is reduced.
Owner:EVE ENERGY CO LTD

Gate-all-around transistors with reduced parasitic capacitance

A semiconductor structure and a method of forming the same are provided. In an embodiment, an exemplary method includes forming a source / drain opening extending through of a fin-shaped active region that comprises a plurality of channel layers interleaved by a plurality of sacrificial layers, replacing the plurality of sacrificial layers with a plurality of dielectric layers, recessing the plurality of dielectric layers to form inner spacer recesses, forming inner spacer features in the inner spacer recesses, where a bottommost inner spacer feature of the inner spacer features is thicker than one inner spacer feature of the inner spacer features disposed over the bottommost inner spacer feature, forming an isolation layer in the source / drain opening, and forming a source / drain feature in the source / drain opening and over the isolation layer, wherein the source / drain feature is spaced apart from the isolation layer by an air gap.
Owner:TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

Source / drain bottom isolation layer with voids for semiconductor devices

The present disclosure describes a semiconductor device having a source / drain (S / D) bottom isolation layer with voids. The semiconductor device includes a stack of semiconductor layers on a substrate, a gate structure surrounding the stack of semiconductor layers, a S / D structure on the substrate and adjacent to the gate structure, and an isolation layer between the S / D structure and the substrate. The isolation layer encloses a void below the S / D structure.
Owner:TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

Computer cable capable of preventing conductor from deviating

The invention relates to the technical field of cables, and discloses a computer cable capable of preventing conductor deviation. The computer cable is provided with the corrugated pipe isolation layer, when the computer cable is bent, the corrugated pipe isolation layer on the outer side begins to unfold, at the moment, the first liquid and the second liquid move towards the outer side under the action of pressure to provide auxiliary support for a cable conductor, and when the bending angle is too large, the corrugated pipe isolation layer on the outer side tends to unfold completely, so that the cable conductor is prevented from being damaged. At the moment, the supporting force of the corrugated pipe isolation layer on the outer side on the cable conductor disappears, when the corrugated pipe isolation layer is unfolded, the fragile weak structure cracks, the first liquid and the second liquid inside and outside the corrugated pipe isolation layer make contact, the first liquid and the second liquid react, and in the reaction process, expansion is conducted firstly, and solidification shaping is conducted after expansion; at the moment, the cable conductor is supported and fixed through expansion fixation, and the position of the cable conductor is prevented from deviating.
Owner:NORTHEAST PLASTIC CABLE CO LTD

Preparation method of back contact heterojunction solar cell

The invention provides a preparation method of a back contact heterojunction solar cell. The method comprises the following steps of: after polishing and cleaning two surfaces of a silicon wafer, sequentially depositing a passivation layer i, a doping layer n, a silicon nitride isolation layer and a sacrificial layer on the back surface; the sacrificial layer pattern is etched through picosecond laser, and the doping layer n layer is exposed through HF acid corrosion; synchronously etching a passivation layer i and a doping layer n in a back opening region by adopting alkali liquor, and performing front texturing; a passivation layer i and a doping layer p are secondarily deposited on the back surface, a doping layer n is secondarily exposed through HF acid after a P region pattern is etched through laser, a passivation layer i and an anti-reflection layer are deposited on the front surface, a TCO transparent conductive layer is deposited on the back surface, a P / N region electrode is subjected to silk-screen printing and light injection curing, and finally a P / N region is isolated through laser. According to the method, the rear texturing process is combined with the laser and wet etching, so that the front film layer is prevented from being corroded by the wet method, the process is simplified, the cost is reduced, and high-efficiency and low-damage industrial mass production is realized.
Owner:ANHUI HUASUN ENERGY CO LTD

Method of manufacturing semiconductor structure and semiconductor structure

The semiconductor structure includes a transistor region and a step region, the transistor region includes a word line region, the word line region directly faces and is connected to the step region, and the manufacturing method includes: providing a base and forming sacrificial layers and active layers on the base; forming first isolation layers in the transistor region, wherein the first isolation layers divide a part of the active layers into a plurality of active structures; removing a part of the first isolation layers and a part of the sacrificial layers in the word line region; forming word lines and dielectric layers in the word line region, wherein the step region includes a first region and second regions located on two sides of the first region.
Owner:CHANGXIN MEMORY TECH INC

Multi-core optical fiber amplifier with large core-to-package ratio and gain method

The invention discloses a multi-core optical fiber amplifier with a large core-to-cladding ratio and a gain method. The multi-core optical fiber amplifier is characterized by comprising a multi-core optical fiber formed by a plurality of independent rare earth-doped fiber cores and a cladding structure located on the outer side of the multi-core optical fiber, the cladding structure is internally provided with at least one layer of low-refractive-index isolation region which is used for remarkably compressing the effective cladding area of pumping propagation and improving the capturing efficiency of the whole pumping energy, and the ratio of the total cross sectional area of the multi-core optical fiber to the effective cladding area is not less than 0.1. The low-refractive-index isolating layer is embedded in a conventional cladding structure, so that a pump light propagation area can be effectively compressed on an optical path, the relative proportion of the fiber core in the cross section is increased, the proportion (CCAR is larger than or equal to 0.1) of the total area of the fiber core to the cladding area is remarkably increased, and therefore the pump capture efficiency is improved.
Owner:HANGZHOU SUOTONG PHOTONIC TECHNOLOGY CO LTD

Self-calibration flexible pressure sensing equipment

The invention discloses a self-calibration flexible pressure sensing device, which comprises a first conductor and a second conductor which are in a strip-shaped, strip-shaped or linear structure and both have a piezoresistive effect. The isolating layer is arranged between the first conductor and the second conductor, and through holes or long grooves with continuous through holes are distributed in the surface of the isolating layer; and an encapsulation layer covering the first conductor and the second conductor. According to the embodiment of the invention, a dual-core layer piezoresistive structure and a through hole type isolation layer design are adopted, the dual-core layer design covers a range from small pressure to large pressure, the range limitation of a single material is broken through, and a dynamic self-calibration technology is combined, so that multi-parameter integrated detection of pressure magnitude, position and width is realized; the sensor array has the advantages of self-adaption to environment change, wide-range detection, multi-scene applicability and the like, the sensor for realizing the functions only needs four wires, complex wiring of the sensor array is avoided, miniaturization and flexibility are facilitated, a narrow strip-shaped flexible structure is adopted as a whole, and flexible arrangement of sensor tracks and garment integration are facilitated.
Owner:WUYI UNIV

Wide bandgap power semiconductor device and preparation method thereof

The invention relates to the technical field of semiconductor devices, and discloses a wide bandgap power semiconductor device and a preparation method thereof. The method comprises: providing a substrate layer of a first conductivity type; forming a first doped region which is deep into the substrate layer and comprises a plurality of doped layers which are sequentially nested from outside to inside, wherein the doping concentrations of the plurality of doped layers are sequentially increased from outside to inside; forming a second doped region in the doped layer on the innermost side of the first doped region; forming an isolation layer on the first surface; forming a control electrode on the isolation layer; forming a first electrode on the first surface; a second electrode is formed on the second surface of the substrate layer. According to the invention, the first doped region which is located between the substrate layer and the second doped region and has the doping concentration gradually increased from outside to inside is formed through a mode of multiple times of ion implantation, so that transverse electric field constraint is constructed, transverse depletion of a channel region and a short channel effect under the condition of large voltage are inhibited, the channel width is reduced, and the performance of the device is improved. And the device performance and reliability are improved.
Owner:SUZHOU WEIQING SEMICONDUCTOR CO LTD

Backside trench isolation for high voltage device integration

A semiconductor device includes a backside contact, a shallow trench isolation (STI), and a backside dielectric trench isolation (BDTI) below the STI. A top surface of the BDTI is connected to the STI on a backside of a high voltage region of the semiconductor device, a bottom surface of the BDTI is connected to a backside power interconnect, and the BDTI isolates a backside contact from a substrate.
Owner:INTERNATIONAL BUSINESS MACHINE CORPORATION

Acoustic sensor systems with different heights

Acoustic sensor systems with different heights, as well as methods for configuring and operating such sensor systems are disclosed. In some embodiments, a sensor system described herein may include an acoustic receiver element; and an acoustic transmitter element; wherein the first portion of the piezoelectric material of the acoustic receiver element comprises a first thickness, and the second portion of the piezoelectric material of the acoustic transmitter element comprises a second thickness different from the first thickness; and wherein the isolation layer is structured to create a gap that physically separates the first portion of the second electrode layer from the second portion of the second electrode layer.
Owner:QUALCOMM INC

Air inlet structure, reaction device and semiconductor thin film deposition equipment

The invention discloses an air inlet structure, a reaction device and semiconductor thin film deposition equipment, the air inlet structure comprises a spraying plate, a temperature adjusting part and a control part, the temperature adjusting part is arranged opposite to a spraying area of the spraying plate, and the temperature adjusting part comprises a heating layer, an isolation layer and a feedback layer; the heating layer is arranged on the side, close to the spraying plate, of the isolation layer, the feedback layer is arranged on the side, away from the spraying plate, of the isolation layer, the heating layer comprises a plurality of heating units arranged in an array mode, the feedback layer comprises a plurality of temperature measuring units arranged in an array mode, and the temperature measuring units and the heating units are correspondingly arranged; and the heating layer and the feedback layer are electrically connected with the control part. Each temperature measuring unit can accurately detect the heating temperature of the corresponding heating unit, so that the control part can more accurately control the heating power of the heating units, the uniformity of temperature distribution of the spraying plate is improved, the deposition rates of a thin film in different areas of the surface of a substrate are consistent, and the uniformity of thin film deposition is improved.
Owner:JIANGSU MICROVIA NANO EQUIP TECH CO LTD

Rubber sleeve cable and preparation method thereof

The invention relates to the field of sealant materials, in particular to a rubber sleeve cable and a preparation method thereof. The rubber sleeve cable structurally comprises an inner conductor, an insulating layer, a belting layer, an isolating layer, a shielding layer and an outer sheath from inside to outside in sequence. The insulating layer comprises the following raw materials: an insulating layer matrix, a polymeric composition, a flame retardant, a reinforcing filler, a cross-linking agent, an assistant cross-linking agent and the like. The finally prepared rubber sleeve cable not only can keep excellent flexibility and mechanical strength, but also can obtain good high and low temperature resistance, effectively weakens raw material contradiction among oil resistance, weather resistance, moisture resistance, aging resistance and other characteristics, keeps a good comprehensive performance, and is suitable for popularization and application. And therefore, a good application effect can be kept in multiple application environments, and the existing higher application requirements can be met.
Owner:GUANGDONG JINLIANYU CABLE GRP CO LTD

Magnetic thin film laminated structure and micro-inductive device thereof

ActiveUS12424363B2Vacuum evaporation coatingConductive/insulating/magnetic material on magnetic film applicationIsolation layerThin membrane
A magnetic thin film laminated structure includes a first layer structure and a second layer structure stacked on the first layer structure. The first layer structure includes an adhesive layer on a substance, the adhesive layer being made of a material having compressive stress, at least one pair of layers on the adhesive layer, each pair of the at least one pair of layers including a magnetic film layer and an isolation layer, and an additional magnetic film layer on the at least one pair of layers. The second layer structure includes another adhesive layer on the first layer structure, another at least one pair of layers on the another adhesive layer, each pair of the another at least one pair of layers including a magnetic film layer and an isolation layer, and another additional magnetic film layer on the another at least one pair of layers.
Owner:BEIJING NAURA MICROELECTRONICS EQUIP CO LTD

Multi-band metasurface filtering method based on machine learning optimization

The invention discloses a multi-band metasurface filtering method based on machine learning optimization, and the method comprises the steps: firstly constructing multi-band reconfigurable metasurface filtering hardware of a multi-layer silicon-based integrated architecture, and sequentially arranging a bottom dielectric layer, an isolation layer, a middle dielectric layer, a top dielectric layer and a metal coating layer from bottom to top; secondly, electromagnetic simulation data and real object actual measurement data are collected, and a multi-dimensional data set containing structure, frequency and performance parameters is constructed; building a multi-level machine learning optimization model containing performance prediction, parameter optimization and global optimization, and respectively realizing accurate mapping of parameters and performance, dynamic parameter adjustment and multi-band performance collaborative optimization; and finally, through model training optimization and multi-band performance optimization process execution, experimental verification and model iterative optimization are combined. According to the method, the bottlenecks of low efficiency, poor multi-band collaboration, large simulation and actual measurement deviation and the like of the traditional design are broken through, the filtering performance and the design efficiency are improved, and the multi-band signal processing requirement in a complex electromagnetic environment is met.
Owner:NANJING NANZHI INST OF ADVANCED OPTOELECTRONIC INTEGRATION NANJING

Device and method for completely transmitting newly-added load of existing building to anchor rod pile

The invention discloses a device and a method for completely transmitting a newly-added load of an existing building to an anchor rod pile, and the breakthrough technical effect that the newly-added load of the existing building is completely transmitted to a newly-added pile foundation bearing platform is achieved through accurate calculation, flexible isolation, accurate load underpinning and original foundation base stress recovery. It is ensured that the newly-added load is completely borne by the newly-added anchor rod piles, and distribution characteristics of the newly-added load are accurately calculated by establishing a building structure-foundation-foundation collaborative stress model; the flexible isolation layer is innovatively designed, and the transmission path of the newly-added load to the original foundation is effectively cut off; and a vertical deformation barostat is researched and developed, plastic deformation of the vertical deformation barostat is utilized, then the newly-added anchor rod pile is always in a preset stress state after being loaded, and the stability of the stress state of an original foundation in the load transfer process is ensured. The method is suitable for the working condition that the bearing capacity of the base is insufficient due to storey adding, functional transformation and the like of the existing building, the reinforcement cost can be reduced by about 35%, the construction period can be shortened by about 40%, remarkable economic and social benefits are achieved, and a brand new technical path is provided for foundation reinforcement of the existing building.
Owner:JIANGSU SOUTHEAST SPECIAL TECH ENG CO LTD +1

Method and structure for air gap inner spacer in gate-all-around devices

A device a includes a substrate, two source / drain (S / D) features over the substrate, and semiconductor layers suspended over the substrate and connecting the two S / D features. The device further includes a dielectric layer disposed between two adjacent layers of the semiconductor layers and an air gap between the dielectric layer and one of the S / D features, where a ratio between a length of the air gap to a thickness of the first dielectric layer is in a range of 0.1 to 1.0.
Owner:TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

Semiconductor device structure

A semiconductor device structure is provided. The structure includes at least one sloped via formed in a via isolation layer, and at least one anti-reflection element formed on the at least one sloped via.
Owner:TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD