4092 results about "Etching" patented technology

The invention discloses a modified graphite felt electrode for an all-vanadium redox flow battery and a preparation method of the modified graphite felt electrode, and belongs to the technical field of redox flow battery electrode materials. The preparation method comprises the following steps: graphite felt electrochemical oxidation etching treatment; self-assembling a conductive layer on the oxidized and etched graphite felt to obtain the graphite felt attached with the conductive layer; and loading a metal and nitrogen-doped carbon (M and NC) nano catalyst layer on the graphite felt attached with the conductive layer to obtain the modified graphite felt electrode. Various properties of the graphite felt are comprehensively improved through matrix treatment, structure change and load catalysis, mild electrochemical oxidation etching is adopted, a carbon fiber structure is protected, a self-assembled net-shaped conductive layer forms a stable conductive channel, the specific surface area is remarkably increased, a nitrogen-doped carbon shell is adopted to wrap metal nanodots to form an M-NC catalytic layer, and the specific surface area is remarkably increased. The catalyst layer is not easy to dissolve out, the capacity fading rate is obviously improved, the loading capacity of the catalyst layer on the reticular structure conducting layer with a larger specific surface area is larger, and meanwhile, the process is simple and low in cost.

The invention relates to a simplified gas delivery system for atomic layer etching. According to the system, the overall cost is reduced by omitting the requirements of a gas tank and a pressure gauge. A preset mass flow controller (MFC) and a three-way valve can accurately control the gas flow in the surface modification step and the sputtering step of the ALE process. By means of the self-limiting property of the ALE process, the system does not need to maintain the steady-state pressure of the chamber, and the efficiency can be improved only by controlling the volume of the conveyed gas.

The invention provides a manufacturing and processing photoetching method and system of a display panel, and relates to the technical field of photoetching processing. According to the method, the display panel substrate is subjected to cleaning, prime coating and partition division to form an imageable micro-mark covering all exposure partitions, and the thickness and the uniformity are measured after lower-layer supporting glue and upper-layer imaging glue are sequentially formed; carrying out in-situ acquisition and modeling by taking the micro-mark as an imaging object, and generating an exposure correction instruction and an overlapping energy table; performing partition exposure and real-time correction by using a digital micromirror, and completing development to obtain an anti-etching window with a steep side wall; and setting an etching window according to the exposure record and the window quality data, and executing low-damage etching and defect recovery to form stability evaluation data. According to the method, comprehensive improvement of high-precision exposure, pattern consistency and electrical stability is realized.

A manufacturing method of a semiconductor structure and the semiconductor structure, the manufacturing method of the semiconductor structure comprising: providing a substrate comprising a first region and a second region; forming a laminated structure formed by alternately stacking a plurality of first material layers and a plurality of second material layers on the first region; first etching is executed, a groove is formed in one end of the laminated structure, and the second area is exposed out of the bottom of the groove; executing second etching, removing part of the plurality of second material layers through the grooves and keeping the plurality of first material layers arranged at intervals; wherein before the second etching is executed, a protection layer is formed on the surface of the second area, and the protection layer at least extends towards the surface of the first area. According to the method, the semiconductor device with relatively high reliability can be obtained.

The embodiment of the invention discloses an etching method, an etching device and a solar cell module. The etching method comprises the following steps: controlling a light spot overlapping rate to be smaller than a preset overlapping rate; generating laser with preset performance parameters; shaping the laser into rectangular flat-topped light; and focusing the rectangular flat-topped light into a light spot with a preset size, and etching the perovskite functional layer in the to-be-etched cell according to the light spot overlapping rate. According to the technical scheme provided by the embodiment of the invention, the etching method is set, the perovskite functional layer is etched by adopting point contact, the laser beam adopts rectangular flat-topped light, each pulse independently acts on the film layer, single-pulse etching is performed on the perovskite functional layer in the to-be-etched cell, heat accumulation in an optical pulse overlapping region is avoided, and electrode deposition is more facilitated.

The invention relates to the technical field of radio frequency integrated circuits and advanced semiconductor packaging, in particular to a multilayer spiral inductor structure based on an RDL process and a preparation method. The preparation method comprises the steps of seed layer deposition, gradient line width coil formation through photoetching and electroplating, alternate dielectric layer deposition, through hole etching to form vertical interconnection copper columns, air bridge forming through a photoresist sacrificial layer process and silicon nitride passivation packaging. Through fan-shaped topological layout, dielectric material collaborative optimization and three-dimensional interconnection structure design, the self-resonant frequency bandwidth is effectively improved, conductor and dielectric loss is reduced, and miniaturization integration and high reliability of high-frequency inductance elements are achieved.

The invention relates to a rapid gas delivery system and method for atomic layer etching. The system utilizes a compact gas buffer disposed near the gas distribution unit, enabling faster and more efficient delivery of gas to the chamber. The controller manages the gas flow of the gas buffer to maintain an amount of gas within the gas buffer required to perform a single ALE cycle. When one gas buffer delivers gas to the chamber for a partial ALE step, gas is concurrently delivered to the other gas buffer. The configuration not only can improve the efficiency, but also can save components such as a pressure gauge, thereby saving the cost.

The invention relates to a copper-molybdenum-titanium etching solution as well as a preparation method and application thereof. The copper-molybdenum-titanium etching solution comprises a main agent, the main agent is prepared from organic acid, a fluorine-containing compound, a surfactant, organic alkali, a corrosion inhibitor, hydrogen peroxide and deionized water. The copper-molybdenum-titanium etching solution provided by the invention does not contain phosphorus, the cost and environmental protection risk in a wastewater treatment link are greatly reduced, and meanwhile, the copper-molybdenum-titanium etching solution contains low fluorine, so that the etching solution has good etching activity, corrosion to equipment is effectively reduced, a powerful guarantee is provided for stable operation of production, and the copper-molybdenum-titanium etching solution is suitable for industrial production. And meanwhile, the safety of an operation environment is improved. Especially, under the condition of low hydrogen peroxide content, the copper-molybdenum-titanium etching solution shows excellent etching performance. In addition, the etching solution also has long copper service life, can effectively inhibit the negative influence of copper ions on the etching performance, prolongs the effective service time of the etching solution in a high copper content state, greatly reduces the replacement frequency of the etching solution, reduces the production cost, and improves the production efficiency.

The invention provides a bent waveguide structure, an electro-optical modulator and a light quantum computer, and relates to the technical field of electro-optical modulation.The bent waveguide structure comprises an input waveguide, a bent waveguide and an output waveguide which are sequentially connected, and the bent waveguide comprises a substrate transmission waveguide layer, an input coupling part and an output coupling part; the input coupling part and the output coupling part are arranged at the two ends of the substrate transmission waveguide layer respectively, a shallow etching groove is formed between the input coupling part and the output coupling part, the input coupling part is connected with the input waveguide, and the output coupling part is connected with the output waveguide. Compared with the prior art, the shallow etching groove is formed between the input coupling part and the output coupling part, so that the thickness of the waveguide film at the bending part is reduced to ensure that the substrate transmission waveguide layer is of a single-mode structure, the transmission loss is reduced, and the bending waveguide is relatively independent from the input waveguide and the output waveguide, so that the transmission efficiency is improved. Therefore, the process precision of the bent waveguide can be independently adjusted, the process time is reduced, and the efficiency is improved.

The embodiment of the invention provides a chip carrier plate and a manufacturing method thereof, a chip packaging structure, and a manufacturing method of the chip carrier plate, and the method comprises the steps: forming a first protection layer on a first surface of a glass substrate, forming a plurality of first through holes in the first protection layer, carrying out the laser induction of the glass substrate through the first through holes, and forming a plurality of induction regions, and in the induction area, etching the glass substrate to form a plurality of second through holes penetrating through the glass substrate, and forming conductive connection parts in the second through holes. The first protection layer with the first through hole is manufactured on one side of the glass substrate, the first protection layer exposes the area, needing laser induction, on the glass substrate, the area, not needing laser induction, on the glass substrate is protected, and it is avoided that when the glass substrate is etched subsequently, etching damage is caused to other positions of the surface of the glass substrate. Therefore, the thickness of the glass substrate can be ensured, and the surface quality such as roughness of the surface of the glass substrate can be ensured.

The invention belongs to the technical field of sodium-ion batteries, and particularly relates to a preparation method of a coal-based hard carbon material and application of the coal-based hard carbon material in a sodium-ion battery negative electrode. The preparation method of the hard carbon material comprises the following steps: carrying out acid-base chemical heat treatment on a coal-based material to obtain an ash-removed and dried precursor material, and activating the material by water vapor to obtain a target sample with etched micropore inner gaps, and in the subsequent carbonization process, the carbon layer is twisted to form a closed pore structure to obtain the electrode material. According to the invention, the application of the rich-resource coal precursor and the high carbon conversion rate in the sodium ion battery is realized, and the storage capacity of sodium and the cycling stability of the material are effectively improved. The coal-based hard carbon material can be used for preparing a sodium ion battery and has important application value.

The invention provides an optimized II-type superlattice infrared detector chip bottom filling method, a preparation method and an infrared detector, and belongs to the field of infrared detectors. The problem that the performance of an infrared detector is affected due to the fact that the filling glue filled in an existing bottom filling process is prone to generating holes and finally causes defects during imaging of an infrared focal plane detector chip is solved. The method comprises the following steps that a dielectric layer is deposited on the surface of an epitaxial material after table top etching is completed, and the height of the dielectric layer is larger than the table top etching depth; after the dielectric layer is deposited, the surface of the dielectric layer is polished to be flat; opening holes in the dielectric layer on the surface of the table board; preparing an indium column in the opening of the dielectric layer, and then performing flip-chip bonding interconnection on the indium column at the epitaxial material end and the indium column on the readout circuit; filling bottom filling glue between the dielectric layer and the reading circuit after the reverse welding interconnection, and then curing the filling glue at high temperature; the invention is applied to the type-II superlattice infrared detector.

The embodiment of the invention provides a solar cell slice, a preparation method of the solar cell slice and a photovoltaic module, and the preparation method comprises the steps: providing a solar cell initial structure, and carrying out the thinning of a preset region of the solar cell initial structure through a first laser according to a first cutting width; the PN junction in the preset area is removed through a wet etching process, an isolation groove with a tower footing structure is obtained in the front face of the solar cell initial structure, the isolation groove penetrates through the crystalline silicon substrate in the first direction, and meanwhile the tower footing structure is formed on the back face of the solar cell initial structure; respectively forming a functional film layer and an electrode on the back surface and the front surface of the solar cell initial structure; according to the invention, the second laser is used for cutting the isolation groove according to the second cutting width to obtain the solar cell slice with the step-shaped edge, and the solar cell slice does not need to be subjected to independent section passivation treatment, so that the technological process is simplified, and the production yield is also improved.

The invention discloses a microcrystalline texture glass cover plate and a preparation method thereof. The microcrystalline texture glass cover plate comprises a glass body; a series of surface microstructures are arranged on the surface of the glass body, the section of each surface microstructure is in a wave shape, compared with a common glass cover plate, the glass cover plate is endowed with more excellent optical and mechanical performance due to the special structure of the microcrystalline glass, and the requirements of high-end markets are better met when the glass cover plate is applied to consumer electronics cover plates. The diversification of the MASK design provides diversification of the texture effect of the microcrystalline glass, and specific requirements are met. And the surface of the microcrystalline glass is processed more accurately by the yellow light development technology and reaches the micron level. Pyramid morphology of particles on the surface of the microcrystalline glass is regulated and controlled through a wet etching process, uniform etching is carried out, the texture effect is brighter, and the hand feeling is finer and smoother.

The invention discloses a reinforced composite PCB and a preparation method thereof, and belongs to the technical field of PCB preparation. The preparation method of the reinforced composite PCB comprises the following steps: step 1, processing an inner-layer core board to obtain a preprocessed inner-layer core board; 2, cutting, drilling and activating the modified composite film to obtain a treated modified composite film; and 3, sequentially carrying out stacking, hot pressing treatment, pressure relief, cooling, drilling, hole metallization treatment, outer layer pattern transfer, pattern electroplating, outer layer etching, resistance welding, surface treatment, molding and testing on a copper foil, a prepreg, the pretreated inner layer core plate, the prepreg, the treated modified composite film, the prepreg, the pretreated inner layer core plate, the prepreg and the copper foil. And the composite PCB is obtained. The circuit board prepared by the method has excellent thermal stability and mechanical properties.

The invention belongs to the technical field of photovoltaic wet etching, and particularly relates to a low-concentration hydrofluoric acid composite etching solution and a preparation method and an etching process thereof, and the low-concentration hydrofluoric acid composite etching solution comprises the following components in percentage by mass: 5%-10% of hydrofluoric acid, 2%-5% of an etching additive and the balance of water; wherein the etching additive comprises the following components in percentage by mass: 8%-25% of a strong oxidant, 2%-5% of an etching accelerant, 0.5%-2% of an interface modification and mass transfer accelerant, 0.1%-3% of a product control and stabilizer, 0.1%-2% of an equipment compatible corrosion inhibitor and the balance of water; the strong oxidant is used for oxidizing silicon nitride to form a silicon oxynitride transition layer, the etching accelerant is used for providing HF molecules and HF2-ions, and the product control and stabilizing agent is used for complexing SiF62-ions generated by etching.

The invention provides a preparation method of a planar gate accumulation layer channel field effect transistor embedded with a 3C / 4H-SiC heterogeneous junction. The preparation method comprises the following steps: growing an (n-) 4H-SiC drift region and an (n) 4H-SiC current expansion layer (CSL) on an (n +) 4H-SiC substrate by adopting a hot wall chemical vapor deposition (HWCVD) technology; forming a (p) 4H-SiC body region and an (n) 4H-SiC layer on the two sides of the CSL by using a mask, inductively coupled plasma (ICP) etching and ion implantation methods; growing a (p) 3C-SiC region on the upper part of the inner side of each (p) 4H-SiC body region by using a mask, ICP (Inductively Coupled Plasma) etching and HWCVD (High Weight Chemical Vapor Deposition); forming (n) 4H-SiC channels on the two sides of the middle part of the CSL by using a mask and HWCVD, and forming a (p) 3C / (n) 4H-SiC heterogeneous junction with a (p) 3C-SiC region at the bottom; respectively forming an (n +) 4H-SiC source region and a (p +) 4H-SiC source region on the outer side of each (n) 4H-SiC channel by utilizing ion implantation; forming an (n +) 3C-SiC region on the outer side of each (p +) 4H-SiC source region by adopting mask, ICP etching and HWCVD, and forming an (n +) 3C / (n) 4H-SiC heterogeneous junction with the (n) 4H-SiC layer below the (p +) 4H-SiC source region; performing high-temperature annealing to eliminate defects and activate impurities; forming an oxide layer and an (n +) poly-Si gate on the top; and respectively evaporating an alloy grid electrode, a source electrode and a drain electrode to prepare the planar gate accumulation layer channel field effect transistor embedded with the 3C / 4H-SiC heterogeneous junction. The leakage current of the transistor is small and is smaller than the on-resistance (Ron, sp), and the reverse recovery time is short.

The invention belongs to the technical field of metal etching, and particularly relates to an etching process of a metal radiating fin, which comprises the steps of metal plate pretreatment, photoresist coating, exposure and development, primary etching, secondary fine etching, photoresist removal and post-treatment. The method specifically comprises the following steps that firstly, a metal plate is pretreated and cleaned, specifically, the metal plate to be etched is put into a cleaning solution containing a surfactant to be subjected to ultrasonic cleaning, oil stains, dust and other impurities on the surface of the plate are removed, the temperature of the cleaning solution is controlled to range from 40 DEG C to 60 DEG C, and the ultrasonic cleaning time ranges from 10 min to 20 min; degreasing: the cleaned metal plate is immersed in a degreasing agent for degreasing treatment, and grease on the surface is further removed; the concentration of the degreasing agent is 5-10%, and the temperature is controlled to be 50-70 DEG C; and micro-etching: carrying out micro-etching treatment on the degreased metal plate so as to increase the roughness of the surface of the plate and improve the contact area and the reaction activity of the etching liquid and the metal surface.

The invention provides a well drilling anti-interference communication system based on a VCSEL (Vertical Cavity Surface Emitting Laser), the VCSEL and a manufacturing method thereof, and the manufacturing method comprises the following steps: calculating the light field intensity distribution of a high-order transverse mode through an intrinsic mode expansion method and a Laguerre-Gaussian model based on the epitaxial structure parameters of a laser; determining a target area which begins to perform downward annular etching on the surface of the p-DBR layer, wherein the target area coincides with a light field intensity peak area of the high-order transverse mode; performing annular etching in the target area to form an annular groove, and etching at least seven pairs of p-DBR layers inwards in the groove; the communication system comprises a signal transmitting end arranged on the derrick side, and the signal transmitting end is provided with the vertical cavity surface emitting laser; the p-DBR region of the vertical cavity surface emitting laser is provided with an annular etching structure; the graded-index fluorinated plastic optical fiber is used as a transmission medium and is connected with the derrick side and the logging room side; and the optical signal receiving end is arranged at the logging room side and is used for receiving and converting the optical signal into an electric signal.

The present disclosure provides a new wet atomic layer etch (ALE) process for etching silicon dioxide (SiO2) materials. More specifically, the present disclosure provides various embodiments of methods that utilize new etch chemistries for etching a SiO2 layer in a cyclic wet ALE process. The new etch chemistries disclosed herein use an anhydrous basic surface modification solution to create self-limiting reactions on exposed surfaces of the SiO2 layer and form a silicate passivation layer, which is insoluble in the surface modification solution, but readily soluble in a dissolution solution.

The invention relates to the technical field of air electrode preparation, in particular to a metal-loaded super-hydrophobic air electrode, a preparation method and chlorine production application, the air electrode comprises a high-hydrophobicity gas diffusion layer obtained through polytetrafluoroethylene modification, and the metal-loaded super-hydrophobic air electrode is prepared through a corona etching and electrochemical in-situ deposition technology. A uniform and highly-dispersed metal catalyst layer directly grows on the surface of the polytetrafluoroethylene substrate, so that the gas diffusion electrode with excellent mass transfer performance and an efficient catalytic function is obtained; the prepared electrode is used for carrying out electrochemical catalysis on a water body containing chloride ions by adopting a cyclic voltammetry method, and active chlorine can be efficiently generated in situ; the prepared metal-loaded super-hydrophobic air electrode has the advantages of being low in oxygen mass transfer resistance, high in catalyst utilization rate, free of generation of by-products, capable of efficiently generating active chlorine and the like, and has wide application potential in actual water environment disinfection.

The present disclosure provides a new wet atomic layer etch (ALE) process for etching high-k dielectric materials. More specifically, the present disclosure provides various embodiments of methods that utilize new etch chemistries for etching transition metal oxide dielectric materials in a cyclic wet ALE process. In the example embodiments provided herein, new etch chemistries and methods are provided for etching zirconium dioxide (ZrO2), hafnium dioxide (HfO2) and HfxZr(1-x)O2 dielectrics in a cyclic wet ALE process. However, the wet ALE techniques described herein are not strictly limited to the example materials discussed herein and can be applied to other transition metals and transition metal oxides.

The invention provides a shield gate trench MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) structure and a manufacturing method thereof, according to the manufacturing method, a field oxide layer is formed twice (a first oxide layer and a second oxide layer), a polycrystalline silicon interlayer is introduced between the first oxide layer and the second oxide layer, and the polycrystalline silicon interlayer is only reserved on a side wall opposite to a non-floating shield gate layer after being etched twice, so that the field oxide layer is formed in the first oxide layer and the second oxide layer; and a floating shield grid layer is formed. As the floating shield grid layer is introduced to the side wall opposite to the non-floating shield grid layer, the field intensity of the middle area in the depth direction of the groove can be increased, and the overall voltage endurance capability is improved. The floating shield gate layer is introduced into the shield gate trench MOSFET structure, so that the voltage withstanding level of a device can be improved, and the voltage withstanding level of the device can be improved by utilizing a capacitive coupling effect between a part of the floating shield gate layer and a part of the floating shield gate layer and a capacitive coupling effect between a source electrode and the drain electrode. Therefore, gate-drain capacitance and source-drain capacitance of the device can be reduced, and switching speed of the device is improved.

The invention discloses a copper surface micro-etching coarsening solution for a fine circuit as well as a preparation method and application of the copper surface micro-etching coarsening solution, and relates to the technical field of printed circuit board manufacturing. The copper surface micro-etching coarsening solution for the fine circuit is prepared from, by mass concentration, 60 g / L to 100 g / L of sulfuric acid, 40 g / L to 60 g / L of hydrogen peroxide, 0.5 g / L to 2 g / L of zinc sulfate, 10 g / L to 30 g / L of copper ions, 0.5 g / L to 1 g / L of pyridine heterocycle-containing Schiff base, 10 g / L to 100 g / L of ethyl alcohol, 1 g / L to 3 g / L of 2-mercaptobenzothiazole, 1 g / L to 5 g / L of methionine and 1 g / L to 5 g / L of polyacrylamide. According to the copper surface micro-etching coarsening solution, the 2-mercaptobenzothiazole and the methionine in the copper surface micro-etching coarsening solution can enable the copper surface to form a honeycomb structure under the low micro-etching amount, the zinc sulfate and the pyridine heterocyclic ring-containing Schiff base can form a composite film layer with copper ions on the surface of the honeycomb structure, and the interlayer binding force is improved.

The invention provides a step-by-step etching method for extracting an extremely trace amount of solar wind 10Be from a moon sample. Comprising the following steps: 1, screening samples; step 2, etching; step 3, element content analysis; step 4, performing complete digestion; step 5, fluorine removal; step 6, ion exchange; step 7, preparing Be (OH) 2; and step 8, preparing a BeO target sample. According to the method, the etching step length is accurately regulated and controlled by monitoring the element contents of different etching layers, so that fine etching is realized; compared with an existing full dissolution technology, the method is a brand-new step-by-step etching method, and by combining an ion exchange method, layer-by-layer etching of the moon and other extraterrestrial samples and extraction of 10Be in the moon and other extraterrestrial samples are achieved; according to the method, the solar wind injection rate can be determined, and the solar wind injection resource generation rate of the moon and other extraterrestrial celestial bodies can be estimated.

The invention relates to an electrolytic copper foil anode plate electrode and a preparation process thereof, and belongs to the technical field of electrolytic copper foil production. The electrolytic copper foil anode plate electrode sequentially comprises a titanium substrate, an Ir-Ta oxide transition layer and an IrO2-RuO2-SnO2 oxide composite coating from inside to outside. The preparation process comprises the following steps: firstly, forming a micron-sized rough surface by utilizing acetone and ethanol ultrasonic cleaning and oxalic acid etching; the transition layer is subjected to sol dispersion and sintering treatment through polyethylene glycol, so that the balance of low porosity and high bonding strength is realized; the composite coating adopts an acetylacetone-ethylene glycol monomethyl ether solvent system, and a nanocrystalline structure is formed through step-by-step sintering; and an Ir-rich passivation layer is generated through electrochemical activation, and the finally obtained anode plate electrode has more excellent electrochemical activity and longer service life.

The invention relates to the technical field of optical waveguide master mask manufacturing processes, and discloses a monitoring and correcting method and system for an optical waveguide master mask etching process, and the method comprises the steps: setting a plurality of monitoring regions and corresponding monitoring point positions, and collecting the real-time monitoring data of each monitoring point position; inputting real-time monitoring data into the etching analysis model to obtain a real-time etching coefficient of each monitoring point; judging whether correction is needed or not according to the real-time corrosion coefficient, and if yes, determining a plurality of local defect areas and generating a correction instruction; a correction instruction is issued, a feedback time node is set, a correction data packet of each local defect area is collected according to the feedback time node, a correction evaluation value is generated, whether the local defect area is corrected again or not is judged according to the correction evaluation value, and real-time monitoring and accurate correction of the etching process are effectively achieved. The problems that in a traditional etching process, defects are known after being perceived due to lack of real-time monitoring, and resources are wasted due to global reworking are solved.

The invention discloses a precise electrolytic machining method for a herringbone groove microstructure of an air floatation kinematic pair, which comprises the following steps: machining a workpiece by adopting a profiling cathode with a convex structure complementary with a target herringbone groove on the surface, and connecting the workpiece with an anode assembly; the convex structure is a processing area, and an insulating coating is arranged on the surface of a non-processing area except the convex structure; the processing pulse of the power supply system is started at the liquid supply closing stage of the electrolyte system, and the processing pulse of the power supply system is stopped and the electrolyte is updated at the liquid supply opening stage of the electrolyte system. High-precision, low-cost and high-efficiency machining of the herringbone groove microstructure is achieved through profiling cathode shaping, group pulse precise etching and intermittent liquid supply and deslagging, and the problems of stray corrosion control, groove depth gradual change uniformity and batch consistency in electrolytic machining are solved.

The invention relates to the technical field of etching liquid, in particular to a copper metal etching liquid composition. Comprising the following components in percentage by weight: 5-10% of hydrogen peroxide, 0.1-0.3% of a first fluorine source, 1-5% of first inorganic acid, 1-5% of alkali, 0.01-0.8% of a first metal corrosion inhibitor and the balance of deionized water; and the auxiliary agent comprises 2-8% of a second fluorine source, 10-55% of second inorganic acid, 0.1-2% of a second metal corrosion inhibitor and the balance of deionized water. The etching liquid is excellent in etching effect, CD-loss reaches 0.6-0.8 [mu] m, the slope angle reaches 40-50 degrees, the highest copper load reaches 20000 ppm, and meanwhile the problem that when copper is high, due to the fact that the nitric acid concentration is too high, metal etching is abnormal is solved.