877 results about "Dielectric thin films" patented technology

Methods for cleaning semiconductor processing chambers used to process carbon-containing films, such as amorphous carbon films, barrier films comprising silicon and carbon, and low dielectric constant films including silicon, oxygen, and carbon are provided. The methods include using a remote plasma source to generate reactive species that clean interior surfaces of a processing chamber in the absence of RF power in the chamber. The reactive species are generated from an oxygen-containing gas, such as O₂, and/or a halogen-containing gas, such as NF₃. An oxygen-based ashing process may also be used to remove carbon deposits from the interior surfaces of the chamber before the chamber is exposed to the reactive species from the remote plasma source.

A method is provided for depositing a dielectric film on a substrate. According to one embodiment, the method includes providing the substrate in a process chamber, exposing the substrate to a gaseous precursor to form an adsorbed layer on the substrate, exposing the adsorbed layer to an oxygen-containing gas, a nitrogen-containing gas, or an oxygen- and nitrogen-containing gas, or a combination thereof, to form the dielectric film on the substrate, generating a hydrogen halide gas in the process chamber by a decomposition reaction of a hydrogen halide precursor gas, and exposing the dielectric film to the hydrogen halide gas to remove contaminants from the dielectric film.

Methods of patterning low-k dielectric films are described. For example, a method includes forming and patterning a mask layer above a low-k dielectric layer, the low-k dielectric layer disposed above a substrate. Exposed portions of the low-k dielectric layer are modified with a plasma process. The modified portions of the low-k dielectric layer are removed selective to the mask layer and unmodified portions of the low-k dielectric layer.

A multilayer circuit substrate for multi-chip modules or hybrid circuits includes a dielectric base substrate, conductors formed on the base substrate and a vacuum deposited dielectric thin film formed over the conductors and the base substrate. The vacuum deposited dielectric thin film is patterned using sacrificial structures formed by shadow mask techniques. Substrates formed in this manner enable significant increases in interconnect density and significant reduction of over-all substrate thickness.

A method for fabricating a layer structure in a trench includes: simultaneously forming a dielectric film containing a Si—N bond on an upper surface, and a bottom surface and sidewalls of the trench, wherein a top/bottom portion of the film formed on the upper surface and the bottom surface and a sidewall portion of the film formed on the sidewalls are given different chemical resistance properties by bombardment of a plasma excited by applying voltage between two electrodes between which the substrate is place in parallel to the two electrodes; and substantially removing either one of but not both of the top/bottom portion and the sidewall portion of the film by wet etching which removes the one of the top/bottom portion and the sidewall portion of the film more predominantly than the other according to the different chemical resistance properties.

A method of forming a dielectric film having at least Si—N, Si—C, or Si—B bonds on a semiconductor substrate by atomic layer deposition (ALD), includes: supplying a precursor in a pulse to adsorb the precursor on a surface of a substrate; supplying a reactant gas in a pulse over the surface without overlapping the supply of the precursor; reacting the precursor and the reactant gas on the surface; and repeating the above steps to form a dielectric film having at least Si—N, Si—C, or Si—B bonds on the substrate. The precursor has at least one Si—C or Si—N bond, at least one hydrocarbon, and at least two halogens attached to silicon in its molecule.

A method for depositing a silicon oxycarbide hard mask on a low k dielectric layer is provided. Substrates containing a silicon oxycarbide hard mask on a low k dielectric layer are also disclosed. The silicon oxycarbide hard mask may be formed by a processing gas comprising a siloxane.

A method for forming a cobalt-containing thin film by a vapor deposition process is provided. The method comprises using at least one precursor corresponding in structure to Formula (I); wherein R¹ and R² are independently C₂-C₈-alkyl; x is zero, 1 or 2; and y is zero or 1; wherein both x and y can not be zero simultaneously.

A capacitance probe for thin dielectric film characterization provides a highly sensitive capacitance measurement method and reduces the contact area needed to obtain such a measurement. Preferably, the capacitance probe is connected to a measurement system by a transmission line and comprises a center conductive tip and RLC components between the center conductor and the ground of the transmission line. When the probe tip is in contact with a sample, an MIS or MIM structure is formed, with the RLC components and the capacitance of the MIS or MIM structure forming a resonant circuit. By sending a driving signal to the probe and measuring the reflected signal from the probe through the transmission line, the resonant characteristic of the resonant circuit can be obtained. The capacitance of the MIS or MIM structure is obtainable from the resonant characteristics and the dielectric film thickness or other dielectric properties are also extractable.

A method of forming a layer on a substrate in a chamber, wherein the substrate has at least one formed feature across its surface, is provided. The method includes exposing the substrate to a silicon-containing precursor in the presence of a plasma to deposit a layer, treating the deposited layer with a plasma, and repeating the exposing and treating until a desired thickness of the layer is obtained. The plasma may be generated from an oxygen-containing gas.

A non-volatile memory, which comprises an insulating substrate (11) that has a first electrode (18) that extends through the substrate from the front surface to the rear surface thereof; a second electrode (13) that is formed on one side of the insulating substrate (11); and a recording layer (12) that is clamped between the first electrode (18) and the second electrode (13) and whose resistance value varies when an electric pulse is applied across the first electrode (18) and the second electrode (13); wherein the insulating substrate (11) has a layered structure composed of an organic dielectric thin film (112) and an inorganic dielectric layer (111) that is thinner than the organic dielectric thin film (112); with the recording layer (12) being formed on the side on which the inorganic dielectric layer is formed. Use of this non-volatile memory increases the possible number of data writing cycles while saving power.

A planarization composition is set forth for chemical mechanical planarization of dielectric layers for semiconductor manufacture. The composition comprises spherical silica particles having an average diameter of from 30 nm to about 400 nm, and a narrow range of particle sizes, wherein about 90% of the particles is within 20% of the average particle diameter. The composition includes a liquid carrier comprising up to about 9% alcohol and an amine hydroxide in the amount of about 0.2 to about 9% by weight. The pH of the composition is in the range of about 9 to about 11.5, and the remainder of the solution is water. The composition has low amounts of metal ions, and the composition is used for thinning, polishing and planarizing interlayer dielectric thin films, shallow trench isolation structures, and isolation of gate structures. The invention also comprises methods for using the planarization composition in the manufacture of semiconductor devices.

An electronic component structure is proposed, wherein an interposer thin film capacitor structure is employed between an active electronic component and a multilayer circuit card. A method for making the interposer thin film capacitor is also proposed. In order to eliminate fatal electrical shorts in the overlying thin film regions that arise from pits, voids, or undulations on the substrate surface, a thick first metal layer, on the order of 0.5-10 mu m thick, is deposited on the substrate upon which the remaining thin films, including a dielectric film and second metal layer, are then applied. The first metal layer includes of Pt or other electrode metal, or a combination of Pt, Cr, and Cu metals, and a diffusion barrier layer. Additional Ti layers may be employed for adhesion enhancement. The thickness of the first metal layers are approximately: 200 A for the Cr layer; 0.5-10 mu m for the Cu layer; 1000 A-5000 A for the diffusion barrier; and 100 A-2500 A for a Pt layer.

A method and system for treating a dielectric film in a batch processing system includes exposing at least one surface of the dielectric film to a treating compound including a C_xH_y containing compound, where x and y represent integers greater than or equal to unity. The plurality of wafers are heated when the treating compound is introduced. The dielectric film can include a low dielectric constant film with or without pores having an etch feature formed therein following dry etch processing.

The invention concerns a method for applying a surface modification agent composition for organosilicate glass dielectric films. More particularly, the invention pertains to a method for treating a silicate or organosilicate dielectric film on a substrate, which film either comprises silanol moieties or has had at least some previously present carbon containing moieties removed therefrom. The treatment adds carbon containing moieties to the film and/or seals surface pores of the film, when the film is porous.

A thin-film piezoelectric element has a substrate, a lower electrode, a piezoelectric portion, and an upper electrode that are sequentially formed on the substrate. The piezoelectric portion has a dielectric thin film that has an alkali niobium oxide-based perovskite structure expressed by general formula (Na_xK_yLi_z)NbO₃ (0<x<1, 0<y<1, 0≦z<1, x+y+z=1), and a high voltage-withstand dielectric that has a dielectric strength voltage greater than that of the dielectric thin film.

A thin film dielectric device is disclosed, that comprises a substrate, a lower electrode formed on the substrate and composed of a laminate film having columnar grains that have grown in a vertical to a surface of the substrate, a dielectric thin film formed on the lower electrode and composed of a perovskite oxide, the dielectric thin film being a polycrystalline film having columnar grains that have successively grown from the columnar grains of the lower electrode and that takes over a crystal orientation of the lower electrode, the lattice constant of the lower electrode being matched with the lattice constant of the dielectric thin film at the interface therebetween with the columnar grains, and an upper electrode formed on the dielectric thin film. The lattice matching of the columnar grains solves problems of the increase of the leak current of the thin film dielectric device and the degradation of the dielectric breakdown resistance. In addition, the polycrystalline film having the columnar grains that succeed at the interface of the electrode/dielectric thin film can be properly formed on the semiconductor substrate such as Si substrate. Thus, the thin film dielectric device according to the present invention can be applied to a real LSI circuit and so forth.

A process for producing aluminum oxide thin films on a substrate by the ALD method comprises the steps of bonding a vaporizable aluminum compound to a growth substrate, and converting the bonded organoaluminum compound to aluminum oxide. The bonded aluminum compound is converted to aluminum oxide by contacting it with a reactive vapor source of oxygen other than water, and the substrate is kept at a temperature of less than 190° C. during the growth process. By means of the invention it is possible to produce films of good quality at low temperatures. The dielectric thin films having a dense structure can be used for passivating surfaces that do not endure high temperatures. Such surfaces include, for example, polymer films such as organic electroluminescent displays. Further, when a water-free oxygen source is used, surfaces that are sensitive to water can be passivated.

A method for forming electronic assemblies includes providing a plurality of IC die each having IC bonding conductors and a workpiece having workpiece bonding conductors. A curable dielectric film is applied to the IC bonding conductors or the workpiece surface. The plurality of IC die are placed on the workpiece surface so that the plurality of IC bonding conductors are aligned to and face the plurality of workpiece bonding conductors to provide a first bonding. The placing is performed at a vacuum level corresponding to a pressure <1 kPa, and at a temperature sufficient to provide tackiness to the curable dielectric film. The plurality of IC die are then pressed to provide a second bonding. A temperature during pressing cures the curable dielectric film to provide an underfill and forms metallic joints between the plurality of IC bonding conductors and the plurality of workpiece bonding conductors.

Provided is a holographic display that realizes a high-resolution three-dimensional (3D) image as a spatial light modulation panel system having a fast response time and enabling the formation of high-density pixels is developed. The holographic display includes, a spatial light modulator using a polymer thin film or a dielectric thin film that enable the formation of high-density pixels and has a fast response time, a fine displacement panel system sequentially moving the spatial light modulator in synchronization with a hologram fringe signal, and an optical system including a coherent light source, a spatial light modulation panel system, and an optical element that are efficiently disposed. The holographic display has a feature that realizes a high-resolution 3D image in a scheme that integrates and displays an image while sequentially moving a spatial light modulator simply or overlaps a hologram fringe pattern.

A filter includes a parallel resonator having first comb electrodes provided on a piezoelectric substrate and a first dielectric film that covers the first comb electrodes, and a series resonator having second comb electrodes provided on the piezoelectric substrate and a second dielectric film covers the second comb electrodes and is made of a material identical to that of the first dielectric film. The first dielectric film has a different thickness from that of the second dielectric film.

A thin-film capacitor (2) in which a lower electrode (6), a dielectric thin-film (8), and an upper electrode (10) are formed in order on a substrate (4). The dielectric thin-film (8) is made of a composition for thin-film capacitance devices. The composition includes a bismuth layer-structured compound whose c-axis is oriented vertically to the substrate and which is expressed by a formula: (Bi2O2)<2+>(Am-1BmO3m+1)<2->, or Bi2Am-1BmO3m+3 wherein "m" is an even number, "A" is at least one element selected from Na, K, Pb, Ba, Sr, Ca and Bi, and "B" is at least one element selected from Fe, Co, Cr, Ga, Ti, Nb, Ta Sb, V, Mo and W. The temperature characteristics of the dielectric constant are excellent. Even if the dielectric thin-film is made more thinner, the dielectric constant is relatively high, and the loss is small. The leak characteristics are excellent, the break-down voltage is improved and the surface smoothness is excellent.

A light emitting element and a method for manufacturing the same are disclosed. In accordance with the element and the method, the dielectric thin film including the embossed pattern partially covering the sapphire substrate prevents damage of a sapphire substrate that occurs during a texturing of the sapphire substrate and a defect of an epitaxial thin film formed in a subsequent process.

A semiconductor chip packaging structure is fabricated by using a dielectric film with two surfaces, and a power semiconductor chip with an active surface having contact pads. An adhesive layer is used to connect the first surface of the dielectric film and the active surface of the power semiconductor chip. A patterned electrically conductive layer is formed adjacent to the second surface of the film, extending through holes in the film to the contact pads.