235 results about "Dielectric membrane" patented technology

The invention relates to a preparation method of a porous polyimide low-dielectric material. The method comprises the following specific steps: preparing a polyamide acid solution with a certain solid content under an ice-water bath condition; after the solution is recovered to normal temperature, adding a certain amount of sodium alginate, and after the solution is homogenized, adding a catalyst and a dehydrating agent for chemical imidization; the method comprises the following steps: coating a substrate medium with a solution after a certain time of reaction, standing in air for a certain time, sequentially and respectively placing the substrate medium in ethanol and a hot water bath for replacement for a certain time, airing at normal temperature, and transferring to a high-temperature oven for gradient cyclization to realize complete imidization. According to the method, conditions are mild and easy to control, and the low-dielectric film material which is flat in appearance and ordered in structure is prepared only through a normal-pressure drying method.

An acoustic wave device includes a piezoelectric layer including lithium tantalate or lithium niobate, a dielectric film on the piezoelectric layer, the dielectric film including a dielectric material having a higher dielectric constant than that of the lithium tantalate or lithium niobate, and an IDT electrode on the dielectric film.

An acoustic wave device includes a support substrate, a piezoelectric layer on the support substrate, a functional electrode on the piezoelectric layer, first and second electrode films on the piezoelectric layer, facing each other, and having different electric potentials from each other, and a dielectric film between at least one of at least a portion of the first electrode film and the piezoelectric layer and at least a portion of the second electrode film and the piezoelectric layer.

A semiconductor structure including a dielectric film wherein stress has been inducted into one or more stressed portions of the dielectric film to create one or more stress zones. The stress zones correspond to locations of warpage in the semiconductor structure and reduce warpage. In some examples, the stress zones can be created by exposing portions of the dielectric film to different amounts of heat. In some examples, the stress zones can be created by one or more recesses in the dielectric film.

A plasma processing apparatus including a processing chamber and a cylindrical sample stage disposed within the processing chamber and having an upper surface on which the wafer is placed, the sample stage including a disc-like substrate; a dielectric film covering an upper surface of the substrate; and a heater layer disposed inside the dielectric film. The heater layer includes a plurality of film heaters disposed in a plurality of rectangular regions each disposed with one side of the rectangular shapes facing to adjacent regions. A cylindrical power supply connector detachable from a bottom of the substrate is configured to be electrically connected to each of the plurality of film heaters, and a wiring component includes a plurality of lines and is made of a resin-made plate-like component connected to a bottom of the power supply connector, and has an arm part extending along a bottom surface of the substrate.

The invention discloses a coplanar parallel capacitance-piezoelectric multi-mode tactile sensor and a preparation method thereof. The coplanar parallel capacitance-piezoelectric multi-mode tactile sensor comprises a substrate, a lower electrode, a middle functional layer, an upper electrode and a packaging protection layer which are sequentially arranged from bottom to top, the middle functional layer is a high-molecular polyvinylidene fluoride (PVDF) polymer film layer; the middle functional layer is divided into a capacitance functional area and a piezoelectric functional area which are coplanar and parallel, the piezoelectric functional area is located in the middle area of the polymer film layer, and the capacitance functional area surrounds the periphery of the piezoelectric functional area; the packaging protection layer is arranged at the top of the upper electrode; different functional areas of a capacitance functional area and a piezoelectric functional area are arranged on the same film layer surface, so that a capacitance dielectric film layer and a piezoelectric functional film layer are designed to be the same film layer, in combination with an in-situ plasma polarization process, directional high-voltage polarization processing is carried out on film surfaces of different areas of the same film layer, the overall thickness of the sensor after packaging can be effectively reduced, and the packaging cost is reduced. The sensor precision is improved.

Disclosed are a method of forming an oxide film including at least two non-oxygen elements, a method of manufacturing a semiconductor device, a method of forming a dielectric film, and a semiconductor device. The method of forming an oxide film including at least two non-oxygen elements includes providing a first source material on a substrate, the first source material including a first central element; providing an electron donor compound to combine with the first source material; providing a second source material on the substrate after providing the electron donor compound, the second source material including a second central element; and providing an oxidizing agent on the substrate.

The invention relates to a semiconductor device and a manufacturing method thereof. A semiconductor device includes a ferroelectric memory cell, and the ferroelectric memory cell includes a select transistor and a memory transistor. The gate dielectric film of the select transistor includes a ferroelectric film, and the gate dielectric film of the memory transistor includes a ferroelectric film.

A capacitor according to the present invention includes a dielectric film that has a first surface and a second surface that faces the opposite direction from the first surface, a high-potential-side first electrode that is provided on the first surface of the dielectric film, and a low-potential-side second electrode that is provided on the second surface of the dielectric film. The work function of the first electrode is greater than the work function of the second electrode.

The invention belongs to the field of polymers, and relates to biaxially oriented polypropylene dielectric film, a modified polypropylene material and use thereof. The preparation raw materials of the biaxially oriented polypropylene dielectric film comprise a modified polypropylene grafted with an alkenyl-containing functional monomer. The modified polypropylene grafted with an alkenyl-containing functional monomer comprises a structural unit derived from polypropylene as a matrix phase and a structural unit derived from an alkenyl-containing functional monomer as a dispersion phase. The ash content of the modified polypropylene grafted with an alkenyl-containing functional monomer is less than 50 ppm. In the modified polypropylene grafted with an alkenyl-containing functional monomer, the mass ratio of the structure unit which is derived from an alkenyl-containing functional monomer and in a grafted state to the structure unit which is derived from an alkenyl-containing functional monomer and in a self-polymerization state is greater than or equal to 1.0. D50 of the dispersion phase is less than 450 nm. The biaxially oriented polypropylene dielectric film of the present invention can keep good dielectric performance and energy storage performance at a relatively high working temperature, and is suitable for high-temperature and high-operation field intensity working conditions.

We disclose in this article a fluid and heat conduction sensor, comprising: a semiconductor substrate, which includes an etched portion; a dielectric region, which is located on the semiconductor substrate, wherein the dielectric region includes at least one dielectric film located above the etched portion of the semiconductor substrate; and a heating element, which is located within the dielectric film. The dielectric film includes one or more discontinuities located between the heating element and the edge of the dielectric film.

This film formation method comprises: a first film formation step; a second film formation step; and a third film formation step. In the first film formation step, a dielectric film is formed on a first conductive film. In the second film formation step, a metal oxide film is formed on the dielectric film. In addition, in the second film formation step, a metal oxide film is formed using heated oxygen gas and a vapor of an organic metal compound. In the third film formation step, a second conductive film is formed on the metal oxide film.

A Metal-containing film forming composition comprising a precursor having the formula: M(=NR1)(OR2)(OR3)mL. Wherein, M=V or Nb or Ta; R1-R3=independently H or C1-C10 alkyl group; L=Substituted or unsubstituted cyclopentadienes, cyclohexadienes, cycloheptadienes, cyclooctadienes, fluorenes, indenes, fused ring systems, propene, butadiene, pentadienes, hexadienes, heptadienes: m=0 or 1.

The present invention provides a highly flexible display device and a method for manufacturing the same. [Solution] A transistor comprising a translucent semiconductor film on a flexible substrate, A capacitive element in which a dielectric film is provided between the first electrode and the second electrode, and a semiconductor film covering the second electrode A dielectric film is formed with the first electrode. The capacitive element has a region where the first electrode and the dielectric film are in contact, and the The insulating film in 1 does not cover the region in question.

The invention relates to a coating material for a processing chamber. Embodiments described herein relate to methods of controlling the uniformity of SiN films deposited on large substrates. When a precursor gas or gas mixture in a chamber is excited by applying radio frequency (RF) power to the chamber, an RF current flowing through the plasma produces a standing wave effect (SWE) in an inter-electrode gap. When the substrate or electrode size approaches the RF wavelength, SWE becomes significant. Process parameters, such as process power, process pressure, electrode pitch, and gas flow ratio, may affect the SWE. These parameters may be altered in order to minimize SWE problems and achieve acceptable thickness and property uniformity. In some embodiments, methods of depositing a dielectric film over a large substrate at various process power ranges, at various process pressure ranges, at various gas flow rates while achieving various plasma densities will be used to reduce the SWE to yield greater plasma stability.

This disclosure relates to a dry film structure that includes a carrier substrate; and a dielectric film supported by the carrier substrate. The dielectric film includes at least one dielectric polymer and low amounts of metals.

Embodiments are described that include semiconductor processing methods for forming a dielectric film on a semiconductor substrate. The method may include providing a silicon-containing precursor and a nitrogen-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region. The method may include providing an inert precursor to the processing region of the semiconductor processing chamber. The method may include generating a plasma effluent of the silicon-containing precursor, the nitrogen-containing precursor, and the inert precursor. The method may include depositing a silicon-containing material on the substrate.

A method of processing a substrate that includes: loading the substrate in a processing system, the substrate including a metal having a metal surface and a first dielectric material having a dielectric material surface, the metal surface and the dielectric material surface being at the same level; etching the metal to form a recessed metal surface below the dielectric material surface; selectively forming a self-assembled monolayer (SAM) on the recessed metal surface using a spin-on process; and depositing a dielectric film including a second dielectric material on the dielectric material surface.

A cable includes an inner conductor and a dielectric layer extending around the inner conductor. The dielectric layer includes a bi-directionally stretched polypropylene film having a porous structure that includes a plurality of pores that extend through a thickness of the bi-directionally stretched polypropylene film. The dielectric layer includes air molecules trapped within the pores of the bi-directionally stretched polypropylene film such that the dielectric layer includes polypropylene and air. The cable includes an outer conductor extending around the dielectric layer.

The invention relates to a funnel diode realized based on a nanopore modified dielectric polymer molecule monolayer, and relates to the technical field of semiconductor devices. The preparation method of the funnel diode comprises the following steps: forming a three-layer PVP dielectric film through bi-crosslinking treatment, and constructing a nanopore array on the surface of the three-layer PVP dielectric film by using a soft nanoimprint technology to form a polymer nano dielectric layer; sequentially depositing an organic semiconductor layer and a top electrode to complete a diode main body structure; and finally, integrating a molecular memory monolayer formed by gold nanoclusters or copper stearate. The device is compact in structure, the unidirectional convergence of current carriers is realized by utilizing a funnel effect generated by the nanopores, and the device has the characteristics of high-voltage rectification ratio and ultralow working voltage under the coordination of a single molecular layer, and has nonvolatile storage and synaptic plasticity.

We disclose herein a flow and thermal conductivity sensor comprising a semiconductor substrate comprising an etched portion, a dielectric region located on the semiconductor substrate, wherein the dielectric region comprises at least one dielectric membrane located over the etched portion of the semiconductor substrate and a heating element located within the dielectric membrane. The dielectric membrane comprises one or more discontinuities located between the heating element and an edge of the dielectric membrane.

The utility model provides a self-powered vibration sensor based on a friction nanometer generator, and the sensor comprises a vibration sensor body which comprises a housing; the sleeve is arranged on the shell in a sleeving manner, and a mounting cavity is defined between the sleeve and the shell; the friction nanometer generator is arranged in the mounting cavity, the friction nanometer generator comprises a first dielectric film, a second dielectric film and a moving assembly, the second dielectric film is arranged on the shell, the moving assembly comprises a lantern ring and an elastic piece, the lantern ring movably sleeves the shell, the first dielectric film is arranged on the lantern ring and is in contact fit with the second dielectric film, and the elastic piece is arranged on the first dielectric film. The two ends of the elastic piece are connected to the lantern ring and the sleeve respectively. According to the self-powered vibration sensor based on the friction nanometer generator, the structure of the friction nanometer generator is simple, the friction nanometer generator can adjust the power generation friction area according to the vibration amplitude of a product tested by the vibration sensor, and the power generation amount of the friction nanometer generator can be improved.

There is provided a technique that includes (a) in a substrate including a structure where respective surfaces of a first material, a second material, and a third material are adjacent to each other in that order, forming a first dielectric film containing oxygen on the surface of the first material and a second dielectric film containing oxygen on the surface of the third material, each of the first dielectric film and the second dielectric film being formed selectively with respect to the surface of the second material; and (b) forming a separation film inside a recess with a sidewall defined by the first dielectric film and the second dielectric film.

Conformal hermetic dielectric films suitable as dielectric diffusion barriers over 3D topography. In embodiments, the dielectric diffusion barrier includes a dielectric layer, such as a metal oxide, which can be deposited by atomic layer deposition (ALD) techniques with a conformality and density greater than can be achieved in a conventional silicon dioxide-based film deposited by a PECVD process for a thinner contiguous hermetic diffusion barrier. In further embodiments, the diffusion barrier is a multi-layered film including a high-k dielectric layer and a low-k or intermediate-k dielectric layer (e.g., a bi-layer) to reduce the dielectric constant of the diffusion barrier. In other embodiments a silicate of a high-k dielectric layer (e.g., a metal silicate) is formed to lower the k-value of the diffusion barrier by adjusting the silicon content of the silicate while maintaining high film conformality and density.

Disclosed is a semiconductor device. The semiconductor device includes a lower electrode disposed on a substrate; a first lower interfacial film disposed on the lower electrode; a dielectric film disposed on the first lower interfacial film; a first upper interfacial film disposed on the dielectric film; and an upper electrode disposed on the first upper interfacial film, wherein each of the first lower interfacial film and the first upper interfacial film is a conductive single film, and the first lower interfacial film and the first upper interfacial film include the same metal element, wherein electronegativity of the metal element included in each of the first lower interfacial film and the first upper interfacial film is greater than electronegativity of a metal element included in the dielectric film.

A semiconductor memory device includes a conductive pattern disposed on a substrate and a lower electrode connected to the conductive pattern and extending in a first direction. The lower electrode includes a lower pattern and an upper pattern. The lower electrode is disposed between the upper pattern and the conductive pattern. The device further includes a capacitor dielectric film disposed on the lower electrode and an upper electrode disposed on the capacitor dielectric film. The lower pattern includes a lower inner interface extending in the first direction, wherein the upper pattern is free of an inner interface extending in the first direction.

A method of embedding a recess includes: preparing a substrate having a recess on a stage in a process chamber; applying a pulsed first DC voltage to the stage to form a dielectric film in the recess by a plasma generated from a gas containing a raw material gas supplied into the process chamber; applying a pulsed second DC voltage to the stage to etch at least a part of the dielectric film formed in the recess by a plasma generated from a gas containing an etchant gas supplied into the process chamber; and repeating the forming of the dielectric film and the etching of the dielectric film. The first DC voltage is set to a predetermined value, and the second DC voltage is a value different from the first DC voltage and is set to a predetermined value.

Wavelength converter including: a phosphor layer; and a filter layer where the filter layer is attached directly to the phosphor layer, wherein the wavelength converter has a total thickness between 20 µm and 80 µm, wherein the filter layer comprises at least two different metal oxides selected from the group consisting of SiO2, Al2O3, TiO2, Nb2O5, Ta2O5, HfO2 and Y2O3.

The present invention provides a metal laminate that has both high-frequency characteristics and close adhesion of a laminate interface. The present invention relates to a metal laminate, a method for manufacturing the same, and a printed wiring board. The metal laminate is a metal laminate in which a metal layer composed of at least one layer containing a metal foil is laminated on at least one surface of a low-dielectric film, wherein a plurality of protrusions of the metal foil are formed on the surface of the metal foil on the low-dielectric film side, the width of the protrusions is set as a, the height of the protrusions is set as b, the average value of b / a + 3σ (where σ is the standard deviation of b / a) is 2.5 or less, and the peeling strength of the low-dielectric film and the metal layer is 3 N / cm or more.

Disclosed herewith are a precursor, a gas mixture, and a method for depositing a dielectric film in a processing chamber. A method includes disposing a substrate on a susceptor disposed within a processing chamber; controlling a pressure level and a temperature of the processing chamber; delivering an RF power into the processing chamber; providing a precursor-containing gas mixture into the processing chamber, and applying a post-deposition process to the substrate after the dielectric film is formed on the substrate. The precursor-containing gas mixture includes a precursor and an inert gas selected from the group consisting of argon, nitrogen, and helium. The precursor includes a carbosilane having a Si—C—Si structure in a backbone of the precursor.