561 results about "High dielectric permittivity" patented technology

The invention provides a Joule heat ultrafast sintering preparation method of barium titanate ceramic with ultrahigh dielectric constant and low loss, which comprises the following steps: ball-milling and mixing barium titanate powder and copper oxide powder, drying, pressing into a cake-shaped sample, carrying out cold isostatic pressing to obtain a sample piece, and carrying out vacuum treatment on Joule heat ultrafast sintering equipment to obtain the barium titanate ceramic with ultrahigh dielectric constant and low loss. Putting the sample preparation sheet between two layers of graphite felts, and starting Joule heat ultrafast sintering equipment to enable the graphite felts to generate Joule heat, so as to realize short-time sintering of the barium titanate ceramic. According to the invention, a Joule heat ultrafast sintering technology is adopted, and Joule heat is generated by directly applying voltage and current to the graphite felt, so that the sintering time is greatly shortened, and environmental pollution is avoided; meanwhile, the dielectric constant of the barium titanate ceramic is greatly improved by adding copper oxide, and the energy consumption is remarkably reduced.

The invention belongs to the technical field of semiconductor device simulation, and particularly relates to a method for rapidly calibrating BDTI surface potential and a related device. The method comprises the following steps: establishing a CIS BDTI device structure through simulation software; introducing silicon data, and calibrating an ion distribution curve in the device structure by taking a true value of SIMS concentration as a reference to obtain a device simulation model for concentration distribution calibration; replacing a surface high dielectric constant layer of the device simulation model for concentration distribution calibration with an electrode layer; and introducing the actually measured potential of the high dielectric constant layer of the device into the electrode layer to complete the surface potential calibration of the device. According to the invention, the surface high dielectric constant layer is directly replaced by the electrode layer, so that the potential of the surface high dielectric constant layer can be directly set as the potential of the actually measured high dielectric constant layer, the process of collecting, continuously increasing and adjusting positive and negative charges for many times and continuously adjusting the potential value of a High K material is avoided, and the calibration process is remarkably shortened.

The invention relates to the technical field of flexible electronics and sensing, in particular to a capacitive flexible pressure sensor based on a barium titanate composite dielectric layer, which sequentially comprises a lower electrode layer, an upper electrode layer, a lower electrode layer and an upper electrode layer from bottom to top, the composite dielectric layer is arranged on the lower electrode layer and is formed by compounding an elastic polymer matrix and a high-dielectric-constant barium titanate (BaTiO3) filler; the upper electrode layer is made of a flexible conductive material and is arranged on the composite dielectric layer; the lower electrode layer and the upper electrode layer are connected with an external capacitance measuring circuit through wires. According to the sensor disclosed by the invention, the comprehensive performance of high sensitivity, wide detection range, low hysteresis and excellent cycle stability is realized by optimizing the shape of the barium titanate filler, surface modification and composite structure design.

The invention relates to a biaxially oriented polypropylene composite film for a capacitor and a preparation method of the biaxially oriented polypropylene composite film. The biaxially oriented polypropylene composite film is of an ABA three-layer structure; wherein the layer A is prepared from the following raw materials: PP, a nucleating agent and a composite filler of MAH-g-PP and nanoparticles; the layer B is prepared from the following raw materials: PET master batch, modified silicon dioxide and a brush polymer. According to the preparation method, the three-layer structure composite film is prepared, the layers are firmly combined through covalent bonds, hydrogen-bond interaction and the like, and the interlayer peel strength is remarkably improved; a nano particle filler with a high dielectric constant is introduced into the A-layer structure, so that the dielectric strength of the film is improved, and meanwhile, the film has relatively high anti-breakdown strength; and the layer B effectively improves the mechanical stability of the film material, and has higher mechanical property and material rigidity compared with the traditional PP film.

The invention relates to a p-type niobium oxide dipole-based metal-oxide-semiconductor device and a manufacturing method thereof, and belongs to the technical field of semiconductor device manufacturing. According to the technical scheme, the MOS device is provided. A gate dielectric stack of the MOS device sequentially comprises an interface layer, a high-k dielectric layer and a p-type electric dipole layer containing niobium oxide from bottom to top. According to the preparation method, the dipole layer is deposited by adopting an atomic layer deposition process, and then atoms in the dipole layer are driven to be diffused to the interface of the high-k dielectric layer and the interface layer through high-temperature rapid annealing treatment so as to form effective electric dipoles. Compared with the prior art, the high dielectric constant characteristic is utilized, the threshold voltage can be positively regulated and controlled to a larger extent, meanwhile, the increase of EOT is remarkably inhibited, and good interface quality is kept.

The invention relates to an oxychloride gate dielectric material and a preparation method and application thereof. The preparation method comprises the following steps: respectively placing a chloride precursor and a substrate material at the bottom and a single-side opening of a same reaction container with a single-side opening, and placing the reaction container with an opening at one side in a chemical vapor deposition device, with the opening positioned at one side of a vent in the chemical vapor deposition device, regulating the relative humidity of the reaction chamber, and depositing on the surface of the substrate material to obtain the oxychloride gate dielectric material. According to the invention, a chemical vapor deposition preparation process is adopted to control and obtain the oxychloride gate dielectric material with controllable and uniform morphology, so that the problems of random shape and non-uniform morphology of the oxychloride gate dielectric material in the chemical vapor deposition process are solved, the controllable growth of the material is realized, and the material has a high dielectric constant; the material also has an atomic-scale flat surface and is applied to a transistor device and / or a capacitor device, and the device has higher performance.

The invention discloses an Mg + Nb co-doped TiO2 giant dielectric ceramic material and a preparation method thereof, and relates to the technical field of giant dielectric materials. The (Mg + Nb) co-doped TiO2 ceramic is successfully prepared by adopting a traditional solid phase method, the performance of the TiO2-based giant dielectric ceramic is regulated and controlled through a new doping strategy, the raw material is single, the preparation process is simple, the cost is low, the repeatability is good, the yield is high, the obtained ceramic material has giant dielectric performance, and the preparation method is suitable for industrial production. The (Mg + Nb) co-doped TiO2 novel giant dielectric ceramic can meet the requirements of a dielectric material with high dielectric constant, low dielectric loss and good temperature and frequency stability, and compared with other widely applied giant dielectric materials, the titanium dioxide-based giant dielectric ceramic has the characteristics of simplicity in preparation and excellent dielectric property.

Multi-layered articles or products comprising layers of filled polymer compositions, methods of making and applications or uses thereof.

The invention relates to a base metal high-voltage multilayer ceramic dielectric capacitor and a preparation method, the base metal high-voltage multilayer ceramic dielectric capacitor is formed by stacking and firing dielectric layers, and each dielectric layer comprises a dielectric layer and an electrode printed on the dielectric layer. The dielectric layer comprises the following raw materials: a BMYT main matrix, an NN material, magnesium oxide, manganous-manganic oxide, zirconium dioxide, calcium carbonate, strontium carbonate and rare earth oxide; through the raw material composition and the preparation method of the ceramic dielectric capacitor, the prepared ceramic dielectric capacitor has excellent performances of high dielectric constant, high voltage resistance, stable dielectric-temperature characteristic curve, low loss, high insulation resistance, long-term high-voltage reliability and the like under the condition of high dielectric thickness (30 microns before firing).

Disclosed is a method of forming gate structures for n-type and p-type transistors. The method includes: forming an interfacial layer and high-K (HK) dielectric layer for the gate structures; forming an n-type metal layer over the HK dielectric layer; forming a hard capping layer over the n-type metal layer while simultaneously strengthening the HK dielectric layer by fluorine passivation; patterning photo resist (PR) material over the hard capping layer that exposes a portion of the hard capping layer over the p-type transistor; removing the n-type metal layer and the hard capping layer over the p-type transistor via wet etching operations using high selectivity chemicals that are highly selective to the hard capping layer and the n-type metal layer; removing the patterned PR material while insulating, by the hard capping layer, gate structures from aluminum oxidation; and forming a p-type metal layer over the hard capping layer and the p-type transistor.

A photonic structure and a method for manufacturing the same are provided. The photonic structure includes a substrate, an insulating structure, a first waveguide layer, a second waveguide layer and a high-dielectric constant material. The insulating structure is located over the substrate. The first waveguide layer is embedded in the insulating structure. The second waveguide layer is embedded in the insulating structure and longitudinally spaced apart from the first waveguide layer. The high-dielectric constant material is disposed between the first waveguide layer and the second waveguide layer.

A non-volatile memory device comprises a substrate, a mold structure that includes gate electrodes stacked on the substrate and mold insulating layers alternately stacked with the gate electrodes, a cell contact on the substrate, wherein the cell contact is electrically connected to a selection gate electrode of the gate electrodes and is not electrically connected to a non-selection gate electrode of the gate electrodes, an insulating ring on the substrate, wherein the insulating ring is between the non-selection gate electrode and a sidewall of the cell contact and is in contact with the non-selection gate electrode, and a high dielectric constant layer between respective ones of the gate electrodes and the mold insulating layers, wherein the insulating ring includes a first portion that overlaps the high dielectric constant layer in a vertical direction, and a second portion that does not overlap the high dielectric constant layer in the vertical direction.

The invention discloses a microfibrillated cellulose / Al2O3 composite diaphragm and a preparation method and application thereof, and belongs to the technical field of new energy materials and electrochemistry, the preparation method of the microfibrillated cellulose / Al2O3 composite diaphragm comprises the following steps: adding microfibrillated cellulose and Al2O3 particles into deionized water, and mechanically stirring to form a homogeneous suspension; and carrying out suction filtration and freeze drying to obtain the microfibrillated cellulose / Al2O3 composite diaphragm. The microfibrillated cellulose / Al2O3 composite diaphragm prepared by the preparation method provided by the invention not only provides excellent mechanical strength and prevents piercing of zinc dendrites, and Al2O3 particles induce uniform deposition of Zn < 2 + > by virtue of the high dielectric constant of the Al2O3 particles, so that the overall cycling stability of the battery is improved.

The invention relates to the technical field of synthesis and processing of ceramic materials, and discloses a multiphase composite coated high-dielectric-constant ceramic material and a preparation method of the multiphase composite coated high-dielectric-constant ceramic material. 11%-13% of strontium titanate; 5%-7% of holmium oxide; 5%-6% of lead magnesium niobate; 6%-7% of titanium dioxide; 2%-3% of yttrium oxide; 3%-4% of magnesium oxide; 3%-4% of bismuth oxide; 2%-3% of lithium carbonate; 4%-5.5% of silicon dioxide; 1%-2% of zinc oxide; 2.5%-3.5% of manganese dioxide; 6%-7% of copper oxide; 3%-4% of glass powder; 0.05% to 0.08% of lanthanide series elements; through the steps of component pretreatment, ball milling and mixing, drying and sieving, forming, sintering and post-treatment, the component activity is improved through high-temperature calcination pretreatment, and directional growth of crystal grains in the components can be promoted by precisely controlled sintering temperature; the prepared ceramic material has the advantages of high dielectric constant, low dielectric loss, excellent densification effect and good mechanical property.

The invention discloses a polypropylene composite material with high dielectric constant, high strength and high modulus as well as a preparation method and application thereof, and belongs to the technical field of polymer composite materials. According to the composite material, homo-polypropylene is used as a matrix and matched with a high-dielectric-constant composite filler, a modified reinforcing filler and a functional additive, and through reasonable component design and process optimization, the dielectric property and the mechanical property are synergistically improved. Wherein the barium titanate-graphene with the core-shell structure is used as a high-dielectric-constant composite filler, and an efficient dielectric path can be constructed in a polypropylene matrix; the epoxy resin modified chopped glass fiber can significantly enhance the mechanical strength and modulus of the material; the maleic anhydride grafted polypropylene effectively improves the interfacial compatibility of the filler and the matrix. The dielectric constant (10GHz) of the prepared composite material is greater than or equal to 8, the tensile strength is greater than or equal to 60 MPa, and the bending modulus is greater than or equal to 4000 MPa. The composite material has excellent dielectric properties and mechanical properties, and can be widely applied to the fields of electronic appliances, high-frequency communication, new energy automobiles and the like.

The invention relates to the technical field of energy storage materials, and provides a composite solid polymer electrolyte membrane and a preparation method thereof.The composite solid polymer electrolyte membrane is prepared through the steps that a polymer matrix serves as a matrix, a polar solvent is adopted for dissolving to form a pure polymer solution, then lithium salt and nematic phase liquid crystal E7 are added, a chiral dopant can also be added, uniform printing slurry is formed, and the composite solid polymer electrolyte membrane is obtained through 3D printing. And carrying out hot pressing treatment to prepare the composite solid polymer electrolyte membrane. The electrolyte membrane prepared by the invention has a controllable porous structure, a high dielectric constant and excellent piezoelectricity and energy storage performance, complex structures such as a three-dimensional grid and a porous structure can be directly printed, and the thickness and shape of the membrane can be accurately controlled by adjusting parameters such as a printing path, a layer height and filling density; the method is very suitable for the requirements of rapid customization of product shapes and sizes in the fields of flexible electronics, wearable equipment and the like. The invention also provides an application of the composite solid polymer electrolyte membrane prepared by the method in an energy storage device.

The invention provides a maskless etching method of a silicon through hole. The method comprises the following steps: etching a first dielectric layer by adopting a first continuous radio frequency wave plasma etching process; etching the second dielectric layer by adopting a pulse plasma etching process; and further etching the second dielectric layer by adopting a second continuous radio frequency wave plasma etching process. According to the pulse plasma etching, bias power is periodically turned on and turned off, polymer protection layers are formed at the corners and the side walls of the silicon through holes in the bias power turning-off stage, and meanwhile etching of the bottoms of the holes is kept. According to the method, dynamic balance is established between etching and protection, so that the problem that a high-dielectric-constant film layer is exposed due to insufficient corner protection in a traditional process is effectively solved, the thickness of a corner protection layer larger than 100 nm can be reserved, and the yield and reliability of a chip are remarkably improved.

Described herein are isolator devices designed to reduce cracking and mechanical stress despite the use of wire bonds made of hard materials (e.g., copper-based). The isolators employ thin film dielectric materials with high dielectric strength and permittivity underneath the top coil (electrode) to enhance the isolation of the device. However, these materials are susceptible to cracking. Described herein are designs in which the dielectric material is partially removed from the isolator. A dielectric layer may be kept in the region(s) where its large dielectric permittivity is particularly beneficial (e.g., near the edge of a coil) but may be removed from the region immediately underneath the bonding pad, where a large amount of pressure is applied during the bonding process. Optionally, a cushion layer is employed to absorb some of the energy produced during the bonding process.

The invention belongs to the technical field of lunar subsurface material attribute inversion, and relates to a diffraction-reflection combined constraint dielectric constant inversion method for lunar exploration radar data, which comprises the following steps: preprocessing the lunar exploration radar data to obtain a radar profile; diffracted waves and reflected waves are separated from the radar profile; performing medium background impedance inversion based on the diffracted wave to obtain background impedance, and converting the background impedance into logarithmic impedance to obtain logarithmic background impedance; dielectric impedance disturbance inversion is carried out based on the reflected waves, and logarithmic impedance disturbance is obtained; matching and fusing the logarithmic background impedance and logarithmic impedance disturbance in a frequency domain to obtain a full-band impedance model; a dielectric constant distribution is calculated based on the full-band impedance model. By comprehensively utilizing complementary advantages of diffracted waves and reflected waves in dielectric constant inversion, stable constraint of dielectric constant low-frequency background information and fine description of high-frequency change characteristics are realized, so that the overall reliability and resolution capability of a dielectric constant inversion result are improved.

The invention discloses a high-performance dielectric elastomer film, a driver capable of being driven at low voltage and a preparation method of the driver. According to the preparation method of the high-performance dielectric elastomer film, customization and balance of mechanical properties and electrical properties of a dielectric elastomer are realized by regulating and controlling the proportion of a chemical cross-linking agent, a high-polarity physical cross-linking agent and a monomer; according to the preparation method of the driver capable of being driven at the low voltage, a dielectric elastomer film and a flexible electrode are stacked through an optimized dry stacking method, the dielectric elastomer driver of a multilayer structure is constructed, and the driver has excellent performance under the low driving voltage. The preparation method has the potential of large-batch and large-scale production, and the prepared dielectric elastomer film has low Young modulus and enhanced strain hardening effect, can avoid electromechanical coupling instability, has high dielectric constant, has large-area strain in a low electric field, and can be used for preparing a dielectric elastomer film. The resulting dielectric elastomer driver can have a blocking force of 0.8 N and an energy density of 80 J / kg at a voltage of 500 V.

The embodiment of the invention discloses a manufacturing method of a semiconductor structure and the semiconductor structure, and the method comprises the steps: providing a substrate which comprises an NMOS (N-channel Metal Oxide Semiconductor) device region and a PMOS (P-channel Metal Oxide Semiconductor) device region; forming a high dielectric constant dielectric layer covering the NMOS device region and the PMOS device region above the substrate; forming a gate stack structure above the high dielectric constant dielectric layer, wherein the gate stack structure is located in the NMOS device region and the PMOS device region; patterning the high-dielectric-constant dielectric layer to reserve the high-dielectric-constant dielectric layer in the NMOS device region and the high-dielectric-constant dielectric layer covered by the gate stack structure in the PMOS device region; and after isolation side walls are formed on the side walls of the gate stack structure to define boundaries of sigma trenches, forming the sigma trenches between the isolation side walls of the gate stack structure in the PMOS device region by using an etching process by taking the patterned high-dielectric-constant dielectric layer as a mask. According to the embodiment of the invention, the height difference between the pseudo gate of the PMOS device region and the pseudo gate of the NMOS device region is eliminated.

The present invention relates to the technical field of negative electrode materials of a lithium-ion battery. Provided are a silicon-carbon negative electrode material, and a preparation method therefor and the use thereof. A pre-lithiated silicon-carbon negative electrode material comprises a silicon-carbon material substrate as well as a carbon coating layer and a composite coating layer which sequentially coat the silicon-carbon material substrate, wherein the silicon-carbon material substrate comprises a porous carbon substrate and nano silicon particles distributed in pores of the porous carbon substrate; and the composite coating layer comprises a high-dielectric-constant material and a lithium-containing polymer. The composite coating layer of the pre-lithiated silicon-carbon negative electrode material has a high-dielectric-constant material, which can undergo self-polarization under the action of an electric field, such that the dissociation of a lithium salt in a lithium-containing polymer is promoted, more lithium ions are converted into active lithium, and active lithium loss caused by SEI film formation and other side reactions is compensated, thereby improving the capacity and initial efficiency of the battery, and improving the reversibility of an electrode reaction, which is beneficial for improving the cycle stability of the battery.

Disclosed is a semiconductor device including a metal gate electrode optimized for a peripheral region. The semiconductor device includes a substrate including a first NMOS region and a second NMOS region whose line width is different from a line width of the first NMOS region; a first conductive pattern including a stacked structure of a first gate dielectric layer and a first metal electrode over the substrate of the first NMOS region, and including a first high-k layer interposed at an interface between the first gate dielectric layer and the first metal electrode and containing a dipole-inducing chemical species; and a second conductive pattern including a stacked structure of a second gate dielectric layer and a second metal electrode over the substrate of the second NMOS region, and including a second high-k layer interposed at an interface between the second gate dielectric layer and the second metal electrode.

The present application relates to the technical field of gas purification and separation, and discloses a selective separation material for carbon dioxide and hydrogen sulfide, which is prepared from 15-25 parts of a hindered hydrazine salt active component, 5-15 parts of a dielectric regulation dissociation agent, 1-5 parts of a proton transfer agent and 55-79 parts of an inert poor water solvent, and preparation is performed by using a step-by-step strategy of pre-solvent activation, dissolution assistance and homogeneous complexing. The present application solves the problems of low solubility of a high-concentration hindered hydrazine salt in a poor water organic solvent and shielding of active sites by introducing a high-dielectric-constant regulating agent to construct a solvent separation ion pair environment. By using the synergistic effect of the large steric hindrance effect of a hindered hydrazine group and a poor water environment, carbon dioxide chemical absorption is strongly inhibited in thermodynamics and kinetics, while the high-efficiency proton transfer and capture capacity for hydrogen sulfide is retained. The material has a very high selectivity factor, excellent hydrogen sulfide absorption capacity and low regeneration energy consumption.

The invention discloses a fast-charging electrolyte with wide temperature range and high voltage and application thereof.The electrolyte comprises a cosolvent, a solute and a film-forming additive, the cosolvent comprises a fluoro-carboxylic ester compound and a nitrile compound, the fluoro-carboxylic ester compound and the nitrile compound both have wide liquid range and strong oxidation resistance, and the solute and the film-forming additive form a film. And a foundation is laid for wide-temperature and high-voltage application of the electrolyte. The fluorocarboxylate compound enables the electrolyte to have obvious weak solvation characteristics, and promotes rapid desolvation of lithium ions at low temperature and high rate; the nitrile compound has a high dielectric constant, so that the conductivity of the electrolyte is improved. And the two can exert respective advantages and show a synergistic effect, so that the multiplying power and the cycle performance of the lithium ion battery under wide temperature range and high voltage are greatly improved.

The application relates to a preparation method of a high-dielectric high-Curie-temperature garnet ferrite without rare earth, which comprises the following steps: pre-treating raw materials to make the raw materials with different particle sizes basically reach the same particle size state, and then obtaining mixed materials with uniform components through mechanical stirring and one-time granulation, so that ideal pre-sintering effect can be realized. Meanwhile, three kinds of second grinding materials with different pre-sintering temperatures and particle sizes are uniformly mixed to control the sintering activity of the powder, and the sintering process is matched, so that the microstructure of the sintered body can be finally improved, the porosity of the ferrite material is reduced, and the ferromagnetic resonance line width is reduced. Through the combined substitution of bismuth, zirconium and calcium elements and the adjustment of the preparation process, the particle size of the powder is adjusted, the sintering stage is controlled to the end of continuous grain growth, the microstructure of the garnet ferrite material is improved, and finally the ferrite material with high dielectric constant, high saturation magnetization, low ferromagnetic resonance line width and high Curie temperature is prepared.

The application belongs to the field of high dielectric constant (ε r ), low dielectric loss (tan delta) composite dielectric material, and particularly relates to a preparation method of a modified polyether sulfone / polyether imide polymer alloy. g Polymer polyether imide is blended, the mixture is added into DMAc at a solid content of 15%-20%, is stirred and dissolved at 80 DEG C, then a thin film is prepared on a glass plate by using a scraping coating method, finally the glass plate is transferred to a vacuum oven, is kept at 55 DEG C overnight, is kept at 100 DEG C for 3-5 hours, and is cured at 180 DEG C for 3-5 hours, thereby a blended film is prepared, wherein the mass fraction of the modified polyether sulfone in the mixture is 1wt%-30wt%. The modified polyaryl ether sulfone polymer segment with a side chain branched large dipole moment polar group is used as an organic filler, a small amount of addition can greatly reduce the dielectric loss, the operation is simple, the spectrum is good, and the influence on T g is very small, and the dispersion and interface problems of inorganic fillers are avoided.

FET designs, and in particular NMOSFET designs based on SOI fabrication technology, that exhibit low leakage in the presence of the edge transistor phenomenon. Embodiments include FETs in which the threshold voltage VTE of the edge FETs is increased to a level that is at least equal to the threshold voltage VTC of the central conduction channel FET using a novel dual work function configuration of a high dielectric constant (high-κ) replacement metal gate (RMG) structure. One embodiment encompasses a FET including an RMG structure overlying a doped silicon region, the RMG structure including: an interface insulator formed over the doped silicon region; a high-K material formed over the interface insulator; an N-type work function material overlaying and in contact with a central portion of the high-κ material; and a P-type work function material overlaying and in contact with at least one edge portion of the high-κ material.

The invention belongs to the technical field of high polymer materials, and discloses a polymer slurry, a polypropylene capacitor film and a preparation method thereof.The polymer slurry contains polyvinyl alcohol, ceramic filler and deionized water, based on the total weight of the polymer slurry, the content of the polyvinyl alcohol is 2-10 wt%, the content of the ceramic filler is 2-10 wt%, and the content of the deionized water is 2-10 wt%. The content of the deionized water is 80 to 96 weight percent; the ceramic filler is lanthanum and niobium co-doped titanium dioxide ceramic particles. The polypropylene capacitor film comprises a polypropylene film and a coating coated on the polypropylene film, and the coating is prepared from the polymer slurry. The polypropylene capacitor film provided by the invention has high dielectric constant and excellent bending property, and meanwhile, the capacitor film has excellent breakdown strength and energy storage density.

The invention discloses a semiconductor device which comprises a substrate, a gate structure, a plurality of insulating intervals, a plurality of first bonding pads, an insulating layer and a high-dielectric-constant material layer. The insulating spacers and the gate structures are alternately disposed on the substrate. The first pad is disposed on the insulating space. The insulating layer covers the insulating interval and the gate structure, and the insulating layer covering the gate structure is provided with a recess. The high dielectric constant material layer is disposed in the recess, and the bottommost surface of the high dielectric constant material layer is lower than the topmost surface of the first pad. Therefore, by means of the arrangement of the high-dielectric-constant material layer and / or the insulating layer, the structural defect of the top of the gate structure is improved, and the problem of possible short circuit between the gate structure and the metal interconnection line arranged above is avoided.