19results about How to "Increase capacitance" patented technology

The invention provides an ultra-high-speed electric connector which comprises an insulating body, the insulating body is provided with a lengthwise slot, a plurality of terminal slots are formed in lengthwise side walls on the two sides of the slot respectively, and a fool-proof part is arranged in the slot and used for dividing the insulating body into a power supply and low-speed signal area and a high-speed signal area which are located on the two sides of the fool-proof part; the plurality of terminals comprise differential signal terminals distributed in the high-speed signal area and other terminals distributed in the high-speed signal area and the power supply and low-speed signal area, every two differential signal terminals are adjacent, and two sides of every two adjacent differential signal terminals are respectively provided with a grounding terminal; every two adjacent differential signal terminals and two grounding terminals located on the two sides of the two differential signal terminals form a terminal module, and the two differential signal terminals and the two grounding terminals of each terminal module and an insulating block inserted into the insulating body are formed in an embedded mode. The ultra-high-speed electric connector can enable signal transmission to be better and more stable.

The application provides a non-continuous three-phase rectifier adjustable power decoupling method, and relates to the field of power electronics. The method is characterized in that a capacitor equivalent circuit is connected in parallel to the DC side of a three-phase PWM rectifier, the capacitor equivalent circuit is composed of a first capacitor connected in series with an active negative capacitor circuit, and a digital signal controller is used to sample the relevant voltage and current signals of the AC side and the DC side, and the active negative capacitor capacitance is adjusted by controlling the switching tube, so that the equivalent capacitor circuit can be flexibly adjusted. The application does not require an additional DC power supply, the capacitance and inductance of the passive device used are small, and the volume advantage is significant. The closed-loop control has high precision and equivalent inhibition effect as the traditional large capacitor. The equivalent capacitance is adjusted only by software, the external physical structure does not need to be changed, and the adjustment range is wide. The preset DC side voltage fluctuation amplitude can be calculated and adjusted automatically, different unbalanced working conditions can be adapted, the fluctuation suppression demand can be met, different working modes can be switched according to the AC side working condition, and the application is not continuously operated, so that the switching loss is lower.

A capacitor structure includes lower and electrodes, and a capacitor dielectric film interposed therebetween. The lower electrode includes a lower electrode film including a first metal element, a first doped oxide film including a second metal element and an oxide of the first metal element, and a first metal oxide film. The first metal oxide film includes an oxide of the first metal element and is free of the second metal element. The upper electrode includes an upper electrode film including the first metal element, a second doped oxide film including the second metal element and an oxide of the first metal element, and a second metal oxide film that includes an oxide of the first metal element, and is free of the second metal element.

This invention relates to the field of carbon material preparation technology, specifically disclosing a method for preparing porous carbon materials using a hierarchical synergistic activation method and its application. This method uses waste biomass from *Siraitia grosvenorii* pomace as raw material, sequentially undergoing low-temperature pre-activation, water washing, high-temperature synergistic activation, and isothermal acid washing to obtain porous carbon materials with ultra-high specific surface area. Scanning electron microscopy analysis and pore structure detection results show that the carbon material exhibits a hierarchical porous layered structure. Electrochemical tests show that the material possesses excellent capacitance performance, with a specific capacitance reaching 200-450 F / g at a current density of 0.5 A / g. When this porous carbon material is assembled into a symmetrical supercapacitor, after 10,000 cycles at a current density of 10 A / g, the specific capacitance retention rate remains above 90%, demonstrating good cycle stability and showing promising application prospects in the field of energy storage.

The invention relates to the technical field of preparation of active carbon materials, in particular to a method for preparing a biomass porous carbon material through a coupling activation method and application of the biomass porous carbon material. The preparation method comprises the following steps: by taking waste biomass such as cassava peel as a raw material, performing fermentation, acid leaching activation, low-temperature carbonization, alkali activation, ultrasonic acid pickling and high-temperature impurity removal to obtain the biomass-derived porous carbon material, and performing electron microscope analysis and pore detection on the biomass-derived porous carbon material prepared by the steps. The biomass derived porous activated carbon material is of a porous layered structure and has abundant micropores and mesopores; according to the present invention, the electrochemical test experiment detection results show that the biomass derived porous carbon material has excellent capacitance performance, and when the current density is 0.5 A / g, the specific capacity value range is 200-400 F / g; the material also has good stability, the biomass derived porous carbon material is assembled into a symmetric supercapacitor, and after 10000 circles of stability tests, the retention rate of the specific capacitance of the symmetric supercapacitor can be maintained to be 90% or above.

The application relates to the field of electrochemical energy storage technology and discloses a nitrogen-doped porous nanocarbon material, wherein the nanocarbon material has microporous structure and mesoporous structure, the BET specific surface area of the nanocarbon material is 300-3000 m 2 / g, the proportion of the specific surface area in micropores in the total specific surface area is higher than 60%; the total pore volume of the nanocarbon material is 0.5-2 cm 3 / g, the proportion of the pore volume in micropores in the total pore volume is higher than 50%; the mass percentage of surface carbon of the nanocarbon material is 70-95% measured by X-ray photoelectron spectroscopy; the mass percentage of nitrogen is 1-20%; and the nanocarbon material has a sheet-like appearance. The preparation method can realize high nitrogen doping, catalytic graphitization and activation pore-forming of the nanocarbon material at the same time. When the nitrogen-doped nanocarbon material is applied to a supercapacitor and a water-based alkaline electrolyte is used, the specific capacitance of a single electrode can be up to 252 F / g at a current density of 1 A / g, and the nanocarbon material exhibits excellent capacitive performance.

The invention provides an MEMS device and a manufacturing method thereof, and a method for reading an output signal of the MEMS device, the MEMS device comprising: a first substrate in which a back cavity is formed; the first movable film layer, the first isolation layer, the first fixed electrode layer, the second isolation layer, the third movable film layer, the fifth isolation layer, the fourth movable film layer, the fourth isolation layer, the second fixed electrode layer, the third isolation layer and the second movable film layer are located on the first substrate; the first cavity is positioned between the first movable film layer and the third movable film layer; the second cavity is positioned between the second movable film layer and the fourth movable film layer; the first connecting column is positioned in the first cavity and is connected with the third movable film layer and the first movable film layer; the second connecting column is positioned in the second cavity and is used for connecting the second movable film layer and the fourth movable film layer; and the release hole penetrates through the third movable film layer, the fifth isolation layer and the fourth movable film layer. According to the scheme, the sensitivity and the signal-to-noise ratio of the device can be improved.

The application provides a tunable phase shifter and an electronic device. The tunable phase shifter comprises a dielectric layer between a first substrate and a second substrate; a first electrode arranged on the first substrate; and a second electrode arranged on the second substrate. The second electrode comprises at least one patch electrode arranged on the second substrate. A projection of the first electrode on the second substrate covers at least part of a projection of the dielectric layer on the second substrate and at least part of a projection of the patch electrode on the second substrate. The first electrode, the dielectric layer and the at least one patch electrode form at least one variable capacitor. This structure facilitates voltage application, does not require additional electrodes and has little effect on the performance of the phase shifter. The capacitance of the variable capacitor can be increased by changing the thickness of the first electrode and / or the patch electrode. When the dielectric constant of the liquid crystal in the variable capacitor changes, the phase shifter can obtain a larger phase shift.

The application discloses a preparation method of a high specific capacitance supercapacitor electrode based on carbon materials, which comprises the following steps: mixing carbon materials with sodium alginate or a carboxymethyl cellulose aqueous solution to obtain a slurry; coating the slurry on a substrate to form a slurry film, immersing the slurry film together with the substrate in a crosslinking agent to perform crosslinking, and then separating the hydrogel film from the substrate; cleaning the hydrogel film with distilled water to remove residual crosslinking agent, and then immersing the hydrogel film in an electrolyte to perform electrochemical treatment, so as to obtain a high specific capacitance supercapacitor electrode. The application can widen the electrochemical stable potential window of the carbon materials and the electrolyte by 30% and improve the specific capacitance of the carbon materials by about 100% under the condition that the carbon materials and the electrolyte are used in existing commercial applications, and the preparation method is simple, compatible with existing commercial production lines, and can realize large-scale preparation.

This invention relates to the technical field of voltage-adjustable capacitors, and discloses a voltage-adjustable capacitor structure and its application based on an ionized double layer. The voltage-adjustable capacitor structure includes: a driving layer comprising an electrodeformable material and matching positive and negative electrodes, the electrodeformable material capable of out-of-plane deformation upon application of voltage; and an ionized capacitor layer comprising an ionically active material with surface microstructures, a pair of electrodes for reading capacitance values, and elastic washers controlling the initial spacing between the electrodes. The ionized capacitor layer is encapsulated with insulating layers on both the top and bottom. This invention utilizes the principle of an ionized double layer, applying voltage to the driving layer to generate out-of-plane deformation, transmitting uniform pressure to the flexible ionized capacitor layer. This causes dynamic changes in the contact area between the ionically active material with surface microstructures and the electronically conductive electrodes. Leveraging the high capacitance density of the double layer, a significant increase in capacitance value from 58 pF to 1200 pF is achieved, with an adjustment ratio exceeding that of existing technologies by 2-8 times.

The present application relates to a method and device for filling redundant metal in a chip, a chip and a semiconductor device. The method comprises: dividing each metal layer of a chip comprising a plurality of metal layers into a plurality of regions; selecting, from the plurality of regions of each metal layer, a region requiring addition of redundant metal as a to-be-filled region based on a layout of each metal layer after routing; determining whether each to-be-filled region of an adjacent metal layer overlaps in a thickness direction of the metal layer; in response to no overlap, performing interdigital redundant metal filling on the to-be-filled region of each metal layer respectively; in response to an overlap, connecting the to-be-filled regions of adjacent layers by a via, and performing interdigital redundant metal filling on one of the plurality of to-be-filled regions having the overlap, and performing floating metal filling on the remaining to-be-filled regions of the plurality of to-be-filled regions having the overlap. The present application significantly improves the capacitance value and the utilization rate of redundant metal in a limited space.

This invention discloses a high-speed, high-density ferroelectric memory, its fabrication method, and its applications, belonging to the field of semiconductor memories. The memory consists of an array of multiple memory cells, with substantially orthogonal word lines and bit lines connecting the two sides of the array. The memory cells of this invention employ a stacked structure of a top electrode, a varactor dielectric layer, an intermediate metal layer, a ferroelectric dielectric layer, and a bottom electrode. Electrically, this is equivalent to a ferroelectric capacitor connected in series with a varactor selector. By adjusting the voltage division relationship of the memory cells, the voltage division of the ferroelectric capacitor in the unselected cells is reduced, thus reducing its disturbance. Furthermore, the series capacitors reduce the RC delay of the memory cells, improving memory access speed. Therefore, this invention reduces the disturbance of unselected cells, increases the memory's storage window, reduces the memory's bit error rate, and improves memory access speed without increasing additional area overhead.

The utility model provides a radio frequency energy bidirectional digital tuning circuit and a radio frequency energy acquisition system, and relates to the technical field of integrated circuits, and the radio frequency energy bidirectional digital tuning circuit comprises a capacitance increasing circuit, a capacitance reducing circuit and a finite-state machine. Wherein a first port of the capacitance increasing circuit and a third port of the capacitance reducing circuit are connected in parallel; a second port of the capacitance increasing circuit and a fourth port of the capacitance reducing circuit are connected in parallel; the finite-state machine is respectively connected with a bias voltage end of the capacitance increasing circuit and a bias voltage end of the capacitance reducing circuit, and is used for providing bias voltage for the capacitance increasing circuit and the capacitance reducing circuit; the capacitance increasing circuit is used for increasing the capacitance of the radio frequency energy bidirectional digital tuning circuit; and the capacitance reduction circuit is used for reducing the capacitance of the radio frequency energy bidirectional digital tuning circuit. According to the technical scheme of the embodiment of the utility model, bidirectional tuning can be realized, and the working bandwidth of the tuning circuit is expanded.

This disclosure provides a multilayer ceramic capacitor and a method for manufacturing the same. The multilayer ceramic capacitor includes: a capacitor body comprising a dielectric layer and an inner electrode layer; and an outer electrode disposed on the outer surface of the capacitor body. The dielectric layer comprises a plurality of dielectric grains, at least one of which has a core-shell structure. The core-shell structure includes a core and a shell surrounding at least a portion of the core. The core comprises barium (Ba) and titanium (Ti), and the shell comprises zirconium (Zr) and calcium (Ca) and / or strontium (Sr).

The application provides a Co-doped ternary hydrotalcite and a preparation method thereof. The Co-doped NiCoMo ternary hydrotalcite material is synthesized by a simple water bath heating method in one step, has a nanoflower surface morphology, increases the specific surface area of the material, and the incorporation of Co elements improves the electrochemical performance and storage performance of the positive electrode material. The preparation method comprises the following steps: dissolving nickel salt, cobalt salt and molybdenum salt in deionized water, adding an intercalation agent and a pH regulator, washing and drying the obtained precipitate after the reaction is completed, and the Co-doped ternary hydrotalcite is obtained.

This application discloses a method for forming a trench capacitor, comprising: forming an oxide layer and a nitride layer from bottom to top on a substrate doped with impurity ions of a first conductivity type; performing dry etching after forming a patterned hard mask layer to form a trench in the substrate, and removing the hard mask layer after dry etching; performing wet etching to laterally etch the oxide layer to form an etched region of a predetermined length between the nitride layer and the substrate; performing thermal oxidation to form a capacitor dielectric layer on the trench sidewalls and bottom, and forming an isolation dielectric layer in the etched region, the thickness of the isolation dielectric layer being greater than the thickness of the oxide layer; forming an upper electrode conductive material layer in the trench, and removing the nitride layer and oxide layer during the formation of the upper electrode conductive material layer; and forming metal silicides on the substrate and the surface of the upper electrode conductive material layer. This application is beneficial for reducing the short-circuit risk between the substrate and the metal silicides on the upper electrode conductive material layer.

The invention relates to a storage structure and a preparation method thereof, and the storage structure comprises a word line structure, a bit line, a semiconductor layer, and a capacitor structure. The word line structure comprises a first word line and a second word line which are oppositely arranged in the first direction. The first word line and the second word line extend along a second direction. The bit line extends along the first direction and penetrates through the first word line and the second word line. The semiconductor layer is located between the first word line and the second word line and arranged around the bit line. The capacitor structure comprises a first electrode, a capacitor dielectric layer and a second electrode which are sequentially arranged around the semiconductor layer. A groove is formed in one side, facing the bit line, of the second electrode, and the groove is sunken in the direction away from the bit line. The first electrode includes a first portion and a second portion connected to each other. The first part is located in the groove, and the second part is located outside the groove. And the orthographic projection of the second electrode on the bit line is overlapped with the orthographic projection of the second part on the bit line. The performance of the storage structure can be effectively improved.

A capacitor structure comprises: a first plate structure and a second plate structure, the first plate structure and the second plate structure are plate structures of the same structure, the plate structure comprises: a plurality of sub-structures; the sub-structure comprises: a first metal segment and a second metal segment located in the same layer; a third metal segment and a fourth metal segment located in the same layer; a first via; a second via; a third via; the plate structure further comprises: a connecting metal segment, the connecting metal segment is electrically connected with the plurality of sub-units, and the midpoint position of the connecting metal segment along the extension direction is suitable for an input signal. The plate structure comprises a plurality of sub-structures, the plurality of sub-structures are electrically connected through the connecting metal segment; the key position of the connecting metal segment along the extension direction is suitable for the input signal, the difference in the length of the signal channel can be effectively shortened to reduce the difference in the pressure drop, and the capacitance value and the Q value of the capacitor structure formed can be effectively improved.

The embodiment of the specification discloses a preparation method of a carbon fiber-tungsten sulfide-graphene compound for a sodium ion battery, which comprises the following steps: S1, dissolving sodium tungstate, hydroxylamine hydrochloride, thiourea and sodium hydroxide in deionized water, and uniformly stirring to prepare a reaction solution; s2, mixing the reaction liquid obtained in the step S1 with carbon fibers and graphene in a reaction kettle, and carrying out hydrothermal reaction at a constant temperature; s3, filtering, cleaning and drying a product obtained in the step S2 to obtain a composite material precursor; and S4, carrying out calcination treatment on the composite material precursor in an inert gas atmosphere at 800-950 DEG C to obtain the carbon fiber-tungsten sulfide-graphene composite material.