3036results about "Multiple-port networks" patented technology

Various embodiments provide an antenna assembly and associated systems, devices, and methods. The antenna assembly may include two or more antennas, including a first antenna and a second antenna, coupled to a ground plane. The antenna assembly may further include an isolation network coupled to the ground plane between the first and second antennas. The isolation network may include a conductive structure between conductive antenna portions of the first and second antennas, and an isolation circuit coupled between the conductive structure and the ground plane. The isolation circuit may include a resistor, an inductor, and / or a capacitor (e.g., coupled in parallel with one another). Other embodiments may be described and claimed.

An IPD high-selectivity band-pass filter based on a weak coupling transformer technology comprises an LC parallel resonance circuit, an LC series resonance circuit, an LC parallel resonance circuit and a fourth capacitor C4, and inductors in the LC parallel resonance circuit and inductors in the LC parallel resonance circuit have a weak transformer coupling relation; the coupling coefficient required by the weak coupling transformer provided by the invention is very small and can be realized in a mode of adjacently placing metals on the same layer, so that the structural complexity of the filter is effectively reduced; the band-pass filter is based on an IPD technology, an extra decoupling equivalent inductor is introduced through a weak transformer coupling technology, the extra decoupling equivalent inductor and a parallel capacitor which is connected between the input end and the output end of the filter in a bridging mode form a new resonance path, and a transmission zero point is introduced into an upper stop band and a lower stop band of the filter respectively to improve the selectivity of the filter. According to the invention, the selectivity of the filter can be effectively improved on the premise of not additionally introducing an inductance element and not increasing the order of the filter.

In order to solve the problem that quick response and distortionless recording of ultrahigh-frequency partial discharge signals are difficult to realize when accidental pulses are generated in the prior art, the invention relates to a dual-channel parallel processing architecture for ultrahigh-frequency partial discharge signals, which comprises a signal cloning circuit and a signal processing circuit, the ultrahigh-frequency partial discharge module is used for receiving ultrahigh-frequency partial discharge signals and synchronously outputting the ultrahigh-frequency partial discharge signals as first target signals and second target signals after lossless copying; the low-gain channel circuit is used for performing buffer transmission for maintaining an original bandwidth and a dynamic range on the first target signal to generate a first gain signal; the high-gain channel circuit is used for performing gain amplification on the second target signal to generate a second gain signal; the digital signal processing unit is used for performing synchronous clock control on the low-gain channel circuit and the high-gain channel circuit; and the FPGA chip is integrated in the digital signal processing unit and is used for performing fusion splicing processing on the first gain signal and the second gain signal based on a waveform fusion splicing algorithm and generating a fusion signal.

Embodiments disclosed herein include an apparatus that includes a radio frequency (RF) power supply, and a power splitter electrically coupled to the RF power supply. In an embodiment, the apparatus includes a plurality of impedance matches electrically coupled to the power splitter, where the power splitter is configured to split RF power from the RF power supply in order to supply the RF power to each of the plurality of impedance matches. In an embodiment, the apparatus further includes a plurality of chambers, wherein each chamber is electrically coupled to a different one of the plurality of impedance matches.

A filter multiplexer for variable bandwidth annealing selection is described. The filter multiplexer has multiple pathways, where each pathway comprises a switch and a filter. Each filter has a different cutoff frequency from the other filters. Switches may be cryogenic switches. Each pathway may be communicatively coupled to an external annealing line. Upon receiving a problem, an annealing bandwidth can be selected, set or configured via the multiplexer to operate a quantum processor with a desired annealing schedule. The multiplexer may be used for calibration of a quantum processor by performing a calibration with a large annealing bandwidth, then calibrating the quantum processor by iterating through all available annealing bandwidths from the multiplexer.

The utility model provides a directional coupler and a radio frequency chip, and relates to the technical field of electronic communication. The directional coupler comprises an input port, an output port, a coupling port, an isolation port and an impedance adjusting network, the impedance adjusting network comprises an access switch, an impedance adjusting module and an inductance unit. The impedance adjusting module comprises an adjustable resistor unit and an adjustable capacitor unit which are connected in parallel; one end of the impedance adjusting module is connected to the isolation port through the access switch, and the other end of the impedance adjusting module is connected to the inductance unit; wherein the inductance unit is used for compensating parasitic capacitance in the directional coupler. According to the scheme, the impedance matching and phase characteristics of the directional coupler can be adjusted according to different working frequencies and environmental conditions through mutual cooperation of the access switch, the impedance adjusting module and the inductance unit, so that the directional coupler can maintain good directivity under various working conditions.

Described herewith are an RF filter assembly for processing a coupled RF power originated from a substrate support assembly of a processing chamber, a chucking circuit for the substrate support assembly, and a method for processing the coupled RF power. The RF filter assembly includes a compensation circuit connected to an electrode of the substrate support assembly and configured to receive the coupled RF power and reduce a reflection of the coupled RF power back to the substrate support assembly; and an RF filter block configured to receive signals processed by the compensation circuit and comprising a plurality of RF filters configured to filter out predetermined frequencies of the coupled RF power. The chucking circuit includes the RF filter assembly. The method includes process and operations of the RF filter assembly.

Embodiments of the invention includes various power supplies for plasma systems. These power supplies, for example, closes a switch to connect and disconnect a current pathway to cause an application of an asymmetric periodic voltage waveform. Where each cycle of the asymmetric periodic voltage waveform includes a first portion that begins with a first negative voltage and changes to a positive peak voltage, a second portion that changes from the positive peak voltage to a third voltage level and a fourth portion that includes a negative voltage ramp from the third voltage level to a fourth voltage level.

The invention discloses an ultrasonic transducer series resonant frequency tracking method and an ultrasonic driving power supply, and the tracking method comprises the steps: calculating a current phase difference between a voltage signal and a current signal, determining a phase difference error and an error change rate through the combination of a target phase difference, and determining the resonant state of an ultrasonic transducer according to the comparison of the phase difference error and an error threshold value; if the current driving frequency is in the resonance state, keeping the current driving frequency unchanged; and if in a non-resonant state, correcting the driving frequency through a fuzzy PID algorithm. In order to cope with the sudden change of the load, the tracking method introduces an AI model to identify the load and predict the optimal driving frequency, and then the predicted optimal driving frequency is used as the current driving frequency. According to the invention, the response speed and the adjustment precision in dynamic frequency tracking are improved, and adaptive resonance driving and frequency control of the ultrasonic transducer under variable load and variable working conditions can be realized.

The invention discloses a low-output-ripple ultralow-offset-voltage operational amplifier and a working method thereof. The low-output-ripple ultralow-offset-voltage operational amplifier comprises a first chopper circuit, a first-stage operational amplifier additionally provided with an offset voltage adjusting circuit, a second chopper circuit, a notch filter, a second-stage operational amplifier and a third-stage operational amplifier which are sequentially connected. The offset voltage adjusting circuit trims the input offset voltage of the first-stage operational amplifier to hundreds of microvolts and then outputs the offset voltage to the second chopper circuit; the first chopper circuit and the second chopper circuit are used for modulating the offset voltage of the first-stage operational amplifier to a chopping frequency, and then the ripple voltage at the chopping frequency is filtered by the notch filter; the first-stage operational amplifier is designed to be a high-gain amplifier so as to restrain input offset voltage errors caused by the second-stage operational amplifier and the third-stage operational amplifier. According to the invention, low output ripple voltage and ultralow input offset voltage can be realized only by using the wave trap with a small area.

The invention discloses an automatic impedance range calibration method for a radio frequency matcher, which comprises the following steps of: driving a variable capacitor of a standard matcher according with a design standard to scan and record impedance data under the connection mode that the input end is connected with a standard load and the output end is connected with a network analyzer and the specific configuration of the network analyzer; establishing a standard impedance range database; performing equivalent impedance scanning on the matcher to be calibrated in the same connection mode, and recording data; comparing the impedance data of the matcher to be calibrated with the standard database to determine an effective working interval of the capacitor; and finally, writing the effective interval as a limit into the control configuration of the matcher to be calibrated, and limiting the capacitance adjustment range of the matcher to be calibrated during normal operation. The automatic calibration system comprises a standard impedance measurement unit, an automatic control and data processing unit and a calibration execution unit. And the whole calibration process is controlled by a program, manual intervention is not needed, and the production efficiency is remarkably improved.

This application relates to methods and apparatus for switched mode drivers. A BTL driver has a switch network operable in different switch states, wherein, in each switch state, each of first and second output nodes is connected to a respective one of a first switching voltage, a second switching voltage or an intermediate switching voltage between the first and second switching voltages which is provided by a driver capacitance. A controller is configured to control the switch network to operate in a sequence of switch states to generate a differential drive signal based on an input signal. The controller is configured such that operation of driver switch network in said sequence of switch states to generate said differential drive signal provides voltage regulation of the intermediate voltage provided by said driver capacitance.

Methods, systems, and media for feedback control systems for impedance matching are described. A computer program product for an impedance matching and power distribution network is disclosed. The computer program product may comprise computer-executable instructions which may cause obtaining, at a present time, present values of variable reactances associated with a station of a process chamber, wherein the variable reactances are associated with a first feedback control system for performing impedance matching for the process chamber, and wherein frequency tuning is being performed on an RF generator of the process chamber in association with a second feedback control system for performing impedance matching for the process chamber. The instructions may cause determining updated values of the variable reactances for the station to be utilized in connection with the first feedback control system based at least in part on an error associated with the second feedback control system.

Embodiments herein relate to an apparatus and method for calibrating a notch filter which filters a power supply signal for a voltage-controlled oscillator (VCO). In one aspect, a control circuit performs a number of calibration cycles for the filter to determine a value of a calibration code for the filter which minimizes a change in a frequency of the output signal of the VCO due to a change in the voltage of the power supply signal. After each calibration cycle, the calibration code is adjusted based on whether the frequency of the output signal increase or decreases. The calibration cycles can therefore converge on an optimal calibration code which minimizes the change in frequency due to the change in voltage. This minimizes a sensitivity of the VCO to noise in the power supply signal.

An example power splitter and associated methods are provided herein. In some embodiments, the power splitter may include a first port. In some embodiments, the power splitter may include a plurality of second ports. In some embodiments, the power splitter may include one or more low pass elements. In this regard, the one or more low pass elements may include at least one series inductor and at least one shunt capacitor. In some embodiments, the power splitter may include one or more high pass elements. In this regard, the one or more high pass elements may include at least one series capacitor and at least one shunt inductor. In some embodiments, each of the one or more high pass elements and each of the one or more low pass elements is electrically connected to the first port and the plurality of second ports.

Embodiments of the invention include a plasma system. The plasma system includes a plasma chamber; an RF driver configured to drive bursts into the plasma chamber with an RF frequency; a nanosecond pulser configured to drive pulses into the plasma chamber with a pulse repetition frequency, the pulse repetition frequency being less than the RF frequency; a high pass filter disposed between the RF driver and the plasma chamber; and a low pass filter disposed between the nanosecond pulser and the plasma chamber.

Embodiments of the present disclosure provide a system for fast impedance tuning. The system includes a radio frequency (RF) generator to generate power, a plasma chamber to receive the power from the RF generator and a RF matching network inserted between the RF generator and the plasma chamber configured to match a plasma load impedance to a RF generator impedance using a solid state based variable capacitor. The RF matching network includes a bias circuit that applies a reverse bias to the solid state based variable capacitor to control a capacitance value of the solid state based variable capacitor. The plasma load impedance is matched with the RF generator impedance when pulsed voltage, multi-level pulsing, or RF match ignition tuning is applied.

A filter module is disclosed. The filter module includes a first ground layer, a second ground layer disposed so as to be spaced apart from the first ground layer, a first conductive pattern layer disposed between the first ground layer and the second ground layer, a second conductive pattern layer disposed on one side of the first ground layer or the second ground layer, and a via interconnecting at least two of the first ground layer, the second ground layer, the first conductive pattern layer, and the second conductive pattern layer.

Described are a NFC apparatus, an electronic device and a signal processing method. The NFC apparatus includes a NFC controller, a NFC antenna, and a balanced to unbalanced converter. The balanced-to-unbalanced converter comprises a primary coil and a secondary coil. The primary coil is connected to the NFC controller. Coupled to the primary coil, the secondary coil is connected to the NFC antenna. The balanced-to-unbalanced converter is configured to convert a first current signal in the form of a pair of differential signals generated by the NFC controller to a second current signal in the form of a single-ended signal received by the NFC antenna, and amplify a magnitude of the first current signal to a magnitude of the second current signal through a coupling relationship with a ratio between a first impedance of the primary coil and a second impedance of the secondary coil as N:1.

The invention discloses a radio frequency matching method, a radio frequency matcher and a storage medium, which are used for solving the problems of matching dead zone and overlong time. Load impedance is detected through a load state sensor, input impedance is adjusted through an impedance adjusting network, and the impedance adjusting network comprises adjustable capacitors C1 and C2; and constructing a loss function L based on the modulus square of the reflection coefficient gamma, calculating the gradient and iteratively adjusting the capacitance parameter. The main control module drives the vacuum capacitor to continuously adjust, dynamic optimization is carried out in combination with a gradient descent algorithm, discrete limitation and dead zones of a traditional table look-up method are eliminated, pulse mode microsecond-level rapid matching is adapted, and radio frequency overshoot is restrained. The method improves the matching precision and speed under a dynamic load (such as plasma), gives consideration to the stability of a complex process, and is suitable for the technical processes of semiconductor etching and the like.

The invention relates to the technical field of impedance matching, and discloses an impedance matching method and device, external line gateway equipment, a storage medium and a computer program product, the method is applied to the external line gateway equipment, the external line gateway equipment is connected with a telephone network for use, and the method comprises the following steps: sending a multi-frequency detection signal to the telephone network based on a preset period, echo signal attributes corresponding to the collected echo signals are obtained; feature extraction is carried out according to the echo signal attribute to obtain a feature vector, the normalized feature vector is input into a preset neural network prediction model to obtain a prediction impedance value, and the preset neural network prediction model is obtained by training the sample impedance value and the sample feature vector; and obtaining a target impedance value based on a preset smooth transition algorithm and the predicted impedance value, and performing impedance matching according to the target impedance value. Since the corresponding target impedance value is generated in real time for impedance matching, the equipment can adapt to different telephone network line characteristics for impedance matching.

An electronic device is provided. The electronic device includes a slidable housing including a first housing and a second housing, a first substrate included in the first housing and including a processor, a second substrate included in the second housing, a flexible printed circuit board (FPCB) which includes a ground line, electrically connects the first substrate and the second substrate to each other, and has a shape changed according to the movement of the slidable housing, and a matching circuit electrically connecting the first substrate and at least a portion of the ground line of the FPCB, and changing impedance under the control of the at least one processor according to the shape of the FPCB.

There is provided a phase shifter circuit of an optical encoder. The phase shifter circuit receives a first signal, a second signal, a third signal and a fourth signal sequentially having a 90-degree phase shift, and includes a first cascaded resistor string, a second cascaded resistor string, a third cascaded resistor string and a fourth cascaded resistor string. The first, second, third and fourth cascaded resistor strings respectively delay the first, third, second and fourth signals by selecting a switch connected at a tap-out node of the first, second, third and fourth cascaded resistor strings to correct phase deviations between incremental signals and an index signal and / or between incremental signals.

An apparatus for providing signals to a device may include one or more radiofrequency signal generators, and electrically-small transmission line, which couples signals from the one or more RF signal generators to the fabrication chamber. The apparatus may additionally include a reactive circuit to transform impedance of the electrically-small transmission line from a region of relatively high impedance-sensitivity to region of relatively low impedance-sensitivity.

An electronic device may include wireless circuitry having a first circuit, a second circuit, and an impedance matching network coupled between the first and second circuits. The impedance matching network can include a transformer having a primary coil and a secondary coil and a first feedforward resistor having a first terminal coupled to the primary coil and having a second terminal coupled to the secondary coil. The impedance matching network can further include a second feedforward resistor coupled between the primary coil and the secondary coil. The first and second feedforward resistors can be configured to provide a flat passband gain response for the impedance matching network.

A superconducting quantum circuit apparatus includes a qubit; and a first wiring with a wiring used as a transmission of a signal to generate a magnetic flux to be applied to the qubit and a wiring used as a transmission of a signal input by capacitive coupling to and / or output, by capacitive coupling from the qubit, combined together thereinto, as a single wiring.

To provide a filter stage system.SOLUTION: A filter stage system includes a continuous time baseband filter comprising a feedback loop that employs at least one first impedance node and at least one second impedance node. The at least one first impedance node has a higher impedance than the at least one second impedance node. The at least one first impedance node provides a dominant pole, and the at least one second impedance node provides a non-dominant pole. The continuous time baseband filter generates a filtered current. The filter stage system also includes a mirroring component that mirrors the filtered current to an output.SELECTED DRAWING: Figure 2

A busbar filter including a core with a through hole, two busbars extending through the through hole, and a first over-molding part formed on the two busbars and between the two busbars and the core, wherein the first over-molding part fills up gaps between the two busbars and a remaining space in the through hole.

The invention discloses a frequency quasi-independent controllable double-frequency electrically small rectification circuit, and belongs to the field of radio frequency energy collection. The rectifying circuit comprises a double-frequency matching network, a blocking capacitor, two Schottky diodes, a filter capacitor and a resistive load. The dual-frequency matching network is composed of a capacitor, an inductor and a microstrip line and used for achieving impedance matching of two working frequency points and achieving quasi-independent regulation and control of the positions of the two frequency points by adjusting the value of the inductor and the length of the microstrip line. And the microstrip line is bent for five times so as to realize the miniaturization of the overall structure of the circuit. The blocking capacitor is used for blocking a direct current component and avoiding energy feedback; the two Schottky diodes are used for converting a radio frequency signal into direct current energy; the filter capacitor is used for improving the smoothness of output direct current energy and improving the energy conversion efficiency. The device is compact in structure, adjustable in frequency point position and suitable for a dual-band radio frequency energy collection scene.

An active compensation device including a first element group including an integrated sensing / compensation unit configured to generate a sensing signal corresponding to at least one of common-mode noise and differential-mode noise on at least two high-current paths, and a second element group including a compensation control unit including a negative impedance converter and configured to generate a compensation signal corresponding to the sensing signal and provide the compensation signal to the integrated sensing / compensation unit. The compensation control unit further including a stabilization unit configured to prevent oscillation caused by the sensed noise. The first element group and the second element group are mounted on a single substrate.