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622results about "Printed inductances" patented technology

Data and power isolation with double isolation barrier

A packaged integrated circuit (IC) including a package substrate. The package substrate includes pins; a first metal layer on the pins; a second metal layer on the first metal layer; vias on the second metal layer; an insulation material covering the pins, the first metal layer, the second metal layer, and the vias, and exposing surfaces of the pins and the vias. The packaged IC further includes a semiconductor die on the package substrate, the semiconductor die having a surface opposing the second metal layer; metal posts coupled between the semiconductor die and the exposed surfaces of the vias; and a mold compound covering the semiconductor die and the metal posts, in which the surface is separated from the second metal layer by the insulation material and the mold compound.
Owner:TEXAS INSTRUMENTS INC

Planar inductor structure with integrated shielding to contain electric field

An example planar inductor includes a winding structure including a plurality of conductive windings arranged in layers of a printed circuit board (PCB) around a core, where the plurality of conductive windings include at least a top winding and a bottom winding. The planar inductor includes a conductive shield encasing the winding structure. The conductive shield includes an upper conductive shield layer disposed over the winding structure in a first direction, a lower conductive shield layer disposed under the winding structure in a second direction opposite the first direction, an inner conductive shield disposed within and around the plurality of conductive windings, and an outer conductive shield disposed around and outside the plurality of conductive windings.
Owner:VIRGINIA TECH INTELLECTUAL PROPERTIES INC

Signal and power isolation with double isolation barrier

A packaged integrated circuit (IC) (300) including a package substrate (110). The package substrate includes pins (321); a first metal layer (323) on the pins; a second metal layer (325) on the first metal layer; vias (322, 324, 326) on the second metal layer; an insulation material (308a, 308b) covering the pins, the first metal layer, the second metal layer, and the vias, and exposing surfaces of the pins and the vias. The packaged IC further includes a semiconductor die (101) on the package substrate, the semiconductor die having a surface (301) opposing the second metal layer; metal posts (305a, 305b) coupled between the semiconductor die and the exposed surfaces of the vias (326); and a mold compound (304, 304a) covering the semiconductor die and the metal posts, in which the surface is separated from the second metal layer (325) by the insulation material (308a) and the mold compound (304a).
Owner:TEXAS INSTRUMENTS INC

Inductor device wiring architecture, integrated circuits and communication equipment

The embodiment of the present application discloses an inductor device wiring architecture, including an inductor device and multiple virtual metals located below the inductor device. The multiple virtual metals are arranged in a multi-layer metal layer, each metal layer in the multi-layer metal layer corresponds to a portion of the virtual metals of the multiple virtual metals, and in the direction away from the inductor device, the arrangement area of ​​the virtual metals corresponding to at least two metal layers in the multi-layer metal layer increases. The above-mentioned inductor device wiring architecture can reduce the adverse effects on the performance of the inductor device and improve the product yield. The embodiment of the present application also discloses an integrated circuit and a communication device.
Owner:HUAWEI TECH CO LTD

Three dimensional inductor and method of manufacturing the same

The inductor includes a substrate, a plurality of first horizontal wires above an upper surface of the substrate, a plurality of second horizontal wires above a back surface of the substrate, and a plurality of vertical wires, wherein the plurality of vertical wires connect the plurality of first horizontal wires to the plurality of second horizontal wires to form a spiral.
Owner:SAMSUNG ELECTRONICS CO LTD

Multilayer inductor

A multilayer inductor is provided. The multilayer inductor includes a multilayer winding portion comprising a plurality of coil layers that are vertically stacked, and having an inner surface that defines a hollow of the plurality of coil layers and having an outer surface that defines an outer side and a magnetic compensator made of a soft magnetic material and comprising a magnetic wall located at at least one of the inner surface or the outer surface of the multilayer winding portion.
Owner:SAMSUNG ELECTRONICS CO LTD

Filter circuit

Provided is a smaller filter circuit. The filter circuit has an LC circuit, one end of which is connected to a signal path connecting an input terminal and an output terminal, and the other end of which is connected to a reference potential. A filter circuit according to a first embodiment includes a substrate and a plurality of electrodes provided on a main surface or inside of the substrate. The LC circuit includes a first capacitor, a first inductor connected in parallel, and a second capacitor connected in series. The electrodes overlap each other at least partially when viewed in the thickness direction of the substrate. The portion where the electrodes overlap each other is the electrode of the first capacitor or the second capacitor.
Owner:MURATA MFG CO LTD

Three-dimensional inductor and method of manufacturing same

A three-dimensional inductor and a method of manufacturing the same are disclosed. The three-dimensional inductor includes a substrate, a plurality of first horizontal wirings over an upper surface of the substrate, a plurality of second horizontal wirings over a back surface of the substrate, and a plurality of vertical wirings, the plurality of vertical wirings connect the plurality of first horizontal wirings to the plurality of second horizontal wirings to form a spiral body.
Owner:SAMSUNG ELECTRONICS CO LTD

Tunable inductor device

Disclosed is a tunable inductor device having a substrate, a planar spiral conductor having a plurality of spaced-apart turns disposed over the substrate, and a phase change switch (PCS) having a patch of a phase change material (PCM) disposed over the substrate between and in contact with a pair of adjacent segments of the plurality of spaced-apart turns, wherein the patch of the PCM is electrically insulating in an amorphous state and electrically conductive in a crystalline state. The PCS further includes a thermal element disposed adjacent to the patch of PCM, wherein the thermal element is configured to maintain the patch of the PCM to within a first temperature range until the patch of the PCM converts to the amorphous state and maintain the patch of the PCM within a second temperature range until the first patch of PCM converts to the crystalline state.
Owner:QORVO US INC

Multilayer coil component

A multilayer coil component includes an element body, a coil, and an external terminal. The element body includes a plurality of insulator layers that is laminated. The coil is disposed in the element body. The external terminal includes a plurality of conductor layers that is laminated. The external terminal is electrically connected to the coil. The element body includes a main face and a first side face adjacent to the main face. The external terminal is embedded in the element body in such a way as to be separated from the first side face and exposed from the main face. The external terminal includes a first separated face that is separated from the first side face as being separated from the main face.
Owner:TDK CORP

Inductor with increasing outer fill density

A structure includes a first layer having inductor windings. An inner area of the first layer is at least partially enclosed by the inductor windings and an outer area of the first layer is separated from the inner area by the inductor windings. This structure further includes a second layer having structural fill elements. The first layer and the second layer are parallel, and the second layer is relatively below the first layer in a direction perpendicular to the first layer. The density of the structural fill elements aligned below the inner area is less than the density of the structural fill elements aligned below the outer area.
Owner:GLOBALFOUNDRIES US INC

Methods and apparatus for power delivery through package substrates with stacks of glass layers having different coefficients of thermal expansion

PendingEP4712114A1Printed inductances
Systems, apparatus, articles of manufacture, and methods for power delivery through package substrates with stacks of glass layers having different coefficients of thermal expansion are disclosed. An example substrate for an integrated circuit package includes: a first glass layer having a first coefficient of thermal expansion (CTE); a second glass layer having a second CTE, the second CTE different from the first CTE; a conductive material extending through a first hole in the first glass layer and a second hole in the second glass layer; and a magnetic material between an inner wall of the first hole and the conductive material.
Owner:INTEL CORP

Coil electronic component

A coil electronic component includes a support substrate, a coil pattern disposed on the support substrate, an encapsulant encapsulating at least portions of the support substrate and the coil pattern, and external electrodes disposed externally on the encapsulant and connected to the coil pattern. The coil pattern includes a seed layer having a thickness of 1.5 μm or less and a plating layer disposed on the seed layer.
Owner:SAMSUNG ELECTRO MECHANICS CO LTD

Integration of directional couplers with power combiners

An example device includes a first primary coil, a second primary coil, a combined power output, a first directional coupler output, a second directional coupler output. The example device also includes a secondary coil coupled to the combined power output, configured to magnetically couple to the first primary coil, and configured to magnetically couple to the second primary coil. The example device further includes a tertiary coil configured to magnetically couple to the secondary coil and including a first end coupled to the first directional coupler output, and a second end coupled to the second directional coupler output.
Owner:TEXAS INSTRUMENTS INC

Chip-type electronic components

To provide a chip-type electronic component that can achieve both sufficient bonding strength during mounting and mitigation of stress concentration at the boundary between the base body and the electrode portion. [Solution] The chip-type electronic component 1A comprises a base body 2 formed by stacking a plurality of base layers 11, an internal conductor 3 disposed inside the base body 2, and an external electrode 4 electrically connected to the internal conductor 3 and embedded in the base body 2 flush with the outer surface of the base body 2. The outer surface of the base body 2 is provided with grooves M extending in a direction perpendicular to the stacking direction of the base layers 11 across the base body 2 and the external electrode 4.
Owner:TDK CORP

Semiconductor device

A semiconductor device is provided. The semiconductor device includes a first conductive layer and second conductive layer. The second conductive layer is disposed opposite to the first conductive layer. One of the first conductive layer and the second conductive layer includes a first grounding net and a first signal ball-pad. The first grounding net has a first ground void, and the first signal ball-pad is disposed in the first ground void. The first signal ball-pad has a first ball-pad diameter, the first ground void has a first ground void diameter, and a ratio of the first ground void diameter to the first ball-pad diameter is equal to or greater than 1.2.
Owner:MEDIATEK INC

Electronic device

An electronic device (1) is provided with an element body (2) and an inductor. The inductor is provided with: a first conductor (10), a second conductor (11), a third conductor (12), a fourth conductor (13), a fifth conductor (14), and a sixth conductor (15) that extend in the stacking direction of a plurality of element body layers (7); the inductor comprises a first conductor (10), a second conductor (11), a first inductor conductor (20), a second inductor conductor (21), a third inductor conductor (22), and a fourth inductor conductor (23). The first inductor conductor (20) connects an end portion of the first conductor (10) on one side in the extension direction and an end portion of the second conductor (11) on one side in the extension direction. The second inductor conductor (21) connects an end portion of the second conductor (11) on the other side in the direction of extension, an end portion of the third conductor (12) on the other side in the direction of extension, and an end portion of the fourth conductor (13) on the other side in the direction of extension.
Owner:TDK CORP

Passive component, three-dimensional device, and method for manufacturing passive component

To provide passive components that can reduce the overall thickness of devices such as stacked semiconductor packages.SOLUTION: A passive component has a body part having a first major surface and a passive element at least partially provided inside the body part, and the first major surface includes a flat surface at least partially made of an inorganic material and having a surface roughness of less than 1 / 1000 of the thickness of the body part or 10 nm in a direction orthogonal to the first major surface.SELECTED DRAWING: Figure 1
Owner:MURATA MFG CO LTD

Semiconductor device package and method of manufacturing the same

The present disclosure relates to semiconductor device packages and methods of manufacturing the same. The semiconductor device package includes a substrate having a first surface and a second surface opposite the first surface. The semiconductor device package also includes a first electrically conductive layer disposed over the first surface of the substrate and an insulating layer disposed over the first surface of the substrate. The semiconductor device package also includes a magnetically conductive layer disposed between the first electrically conductive layer and the insulating layer. The magnetically conductive layer has a bottom surface facing the first surface of the substrate, a top surface opposite the first surface of the substrate, and a side surface extending between the bottom surface of the magnetically conductive layer and the top surface of the magnetically conductive layer. Another embodiment of the present disclosure relates to a method of manufacturing a semiconductor device package.
Owner:ADVANCED SEMICON ENG INC

Multilayer coil components

To provide a laminate type coil component including a determination mark that can suppress an increase in floating capacitance.SOLUTION: A laminate type coil component 1 includes a multilayer body 10, and a first external electrode 21 and a second external electrode 22 electrically connected to a coil L. The coil L is formed by electrically connecting a plurality of coil conductors 32a to 32d stacked with an insulating layer. The multilayer body 10 includes a first end surface 11 and a second end surface 12 that face each other in a length direction. On a surface excluding the first end surface and the second end surface where the first external electrode is disposed, a first determination mark 50 is provided. The first determination mark 50 includes a first mark conductor pattern that is in contact with an inner surface of the external electrode and has its surface spreading in a direction perpendicular to an axial direction of the coil L. The first mark conductor pattern includes a notch at a position facing a coil shaft A of the coil L.SELECTED DRAWING: Figure 4A
Owner:MURATA MFG CO LTD

Inductor components

This invention provides an inductor component. There is a concern that the lead-out electrodes may excessively interrupt magnetic flux when current flows through the inductor wiring. The inductor component (10) includes a blank (20). The blank (20) has a mounting surface (21) and a top surface (22) that are parallel to each other, a first end surface (23) and a second end surface (24) that are parallel to each other, and a first side surface and a second side surface that are parallel to each other. Inductor wiring (30) is disposed inside the blank (20). A first lead-out electrode (40) is connected to a first end in the extending direction of the inductor wiring (30). A second lead-out electrode (50) is connected to a second end in the extending direction of the inductor wiring (30). The lower surfaces of the first lead-out electrode (40) and the second lead-out electrode (50) are exposed from the mounting surface (21) of the blank (20). The first lead-out electrode (40) is a quadrangular prism extending in the height direction (Td). The first lead electrode (40) is exposed from the first end face (23) and the first side face.
Owner:MURATA MFG CO LTD

Magnetic element and circuit board including the same

The present invention relates to a slimmable magnetic element and a circuit board including the same. An EMI filter according to one embodiment includes a core unit including an upper core and a lower core, and a coil unit partially disposed within the core unit and including a first coil unit and a second coil unit, wherein the first coil unit includes a first substrate, a first upper conductive pattern disposed on an upper surface of the first substrate, and a first lower conductive pattern disposed on a bottom surface of the first substrate, and the second coil unit includes a second substrate, a second upper conductive pattern disposed on an upper surface of the second substrate, and a second lower conductive pattern disposed on the bottom surface of the second substrate, and the coil unit includes the first upper conductive pattern, the first lower conductive pattern, and the second upper conductive pattern. a primary pattern lead-out portion disposed on one side of the central portion, where one ends of the first upper conductive pattern and the first lower conductive pattern are led out from the central portion; and a second pattern lead-out portion disposed on the other side of the central portion, where one ends of the second upper conductive pattern and the second lower conductive pattern are led out from the central portion, and within the second pattern lead-out portion, the second upper conductive pattern and the second lower conductive pattern may be overlapped in a vertical direction so that at least a portion of the second upper conductive pattern and the second lower conductive pattern intersect on a plane.
Owner:LG INNOTEK CO LTD

Structural body and structural body manufacturing method

Provided are a structure having a high Q value and a small size, and a method for manufacturing a structure. The structure has a planar inductor disposed on a substrate, and further has a first magnetic body portion disposed on a substrate side with respect to the planar inductor with a first insulating layer interposed therebetween, a second magnetic body portion disposed on a side opposite to the substrate side with respect to the planar inductor with a second insulating layer interposed therebetween, and a third magnetic body portion disposed on a center portion of the planar inductor. At least a part of the first magnetic body portion, the second magnetic body portion, and the third magnetic body portion overlap with each other in a normal direction of the substrate, and the first magnetic body portion consists of a first center portion and a plurality of extending portions extending outward from the first center portion in an in-plane direction, or consists of a flat plate portion that covers at least a part of a region from a center of the planar inductor to the outside. The second magnetic body portion consists of a second center portion and a plurality of extending portions extending outward from the second center portion in an in-plane direction, or consists of a flat plate portion that covers at least a part of a region from the center of the planar inductor to the outside.
Owner:FUJIFILM CORP

Common mode noise filter

A common mode noise filter includes a body, a plurality of conductor layers, and a via conductor. An even number of conductor layers, belonging to the plurality of conductor layers, are spiral layers. The spiral layer includes a spiral conductor and at least one via pad. An outer edge of the via pad includes an outwardly facing portion. The outwardly facing portion has a shape conforming with a shape of an inwardly facing portion of a corresponding spiral layer, belonging to an even number of spiral layers, when viewed in an upward / downward direction.
Owner:PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO LTD

Thermal interface material heat transfer antennas

A semiconductor device having a front and a back and comprising a package substrate, an epoxy base layer applied to a back side of the package substrate, and a planar inductor in the epoxy base layer is etched to make a trench at the back of the semiconductor device in the epoxy base layer adjacent the planar inductor, and a thermal interface material is put in the trench, whereby a heat transfer antenna is formed. A semiconductor device has a package substrate having a front and a back; an epoxy base layer applied to a back side of the package substrate, a planar inductor at the back of the package substrate in the epoxy base layer, and a heat transfer antenna at the back of the package substrate in the epoxy base layer.
Owner:MICROCHIP TECHNOLOGY INC

Stacked integrated passive device

A device according to some embodiments includes a first IPD die including a first SiC substrate. The first IPD die has a first surface and a second surface on the first SiC substrate opposite the first surface and includes a first contact and at least one first metal portion on the respective surfaces of the first SiC substrate. The device further includes a second IPD die including a second SiC substrate. The second IPD die has a third surface and a fourth surface on the second SiC substrate opposite the third surface and includes a second contact and at least one second metal portion on the respective surfaces of the second SiC substrate. The device further includes an electrical interconnection structure between one of the first and second surfaces of the first IPD die and one of the third and fourth surfaces of the second IPD die.
Owner:MACOM TECH SOLUTIONS HLDG INC