100results about How to "Reduce signal reflection" patented technology

A circularly-polarized-wave patch antenna includes a main body having a patch electrode provided with two feeding points and a circuit for generating a phase difference of 90° between signals supplied to the feeding points. A Wilkinson distribution circuit is provided between the 90°-phase-difference generating circuit and a coaxial cable (feeder line) so as to improve a reflection characteristic. The patch antenna includes two feeding points, and thus a favorable axial ratio characteristic can be obtained in a wide band. Also, a favorable reflection characteristic can be obtained in a wide band because of the Wilkinson distribution circuit. Accordingly, the patch antenna can be used in a wider frequency band.

Data line loading on high density modules with multiple DRAMs is minimized permitting the maximum memory density of systems of otherwise limited density to be increased without an ensuing performance degradation due to data line capacitive loading. First the single or dual in-line memory module (SIMM or DIMM) includes in-line bus switches. The bus switches are between the SIMM or DIMM module tabs (system) and random access memory devices (RAM) and are either in a high impedance (off) or active state depending on the READ/WRITE state of the RAM. When in the high impedance state, the effective loading of the module is that of the bit switch device. The logic for determining the READ/WRITE state may be embedded in an application specific integrated circuit (ASIC) that monitors bus activity and controls activation of the bus switches, be provided by a memory controller or, generated by the RAM itself. The bus switches are active when the RAM is performing a read or a write and inactive otherwise. The RAM is Fast Page Mode (FPM) and Extended Data Output (EDO) or Synchronous DRAM (SDRAM).

A step attenuator apparatus is provided, having an attenuation ratio which is switchable according to a control signal. Multiple variable attenuators are connected in series. Each variable attenuator includes a first terminal, a second terminal, multiple paths having different attenuation ratios, a first switch that can be connected to one end of a desired path selected from among the multiple paths, and a second switch that can be connected to the other end of a desired path selected from among the multiple paths. When a control signal is an instruction to set the step attenuator apparatus to a disconnected state, a control unit connects the first switch of the first-stage variable attenuator to one of the multiple paths, and connects the second switch of the first-stage variable attenuator to a different one of the multiple paths.

An enclosure for the open end of a reflector antenna includes a cylindrical shroud coupled to a distal end of the reflector antenna, the shroud generally coaxial with a longitudinal axis of the reflector antenna. A retaining band is coupled to an inner diameter of the shroud, proximate a distal end of the shroud. The retaining band is provided with a retaining groove open radially inward towards the longitudinal axis. The retaining groove provided with a bottom extending radially outward beyond an outer diameter of the shroud. A radome is seated within the retaining groove.

A low voltage differential signal driver includes first and second current sources, a first branch and a second branch. The first branch includes at least two transistors and at least two resistors between them that are all connected in series between the first and second current sources, to define a first node between adjacent resistors that is configured to transmit and receive differential signals. The second branch also includes at least two transistors and at least two resistors between them that also are all connected in series between the first and second current sources, to define a second node between adjacent resistors that is also configured to transmit and receive differential signals.

A system and method is presented for reducing skew between the positive and negative components of a differential signal in a high speed communications link. The communications link includes a signal generator producing and transmitting complementary positive and negative signals over separate transmission lines and a receiver receiving the complementary signals. The communication link further includes a skew compensation circuit having a skew detector, a controller, and separate delay and buffer elements for both the positive and negative component of the differential signal. The controller separately controls each of the delay or buffer elements in response to the detected skew between differential signal components.

A substrate (300) for a package of high frequency semiconductor devices comprising a planar insulating substrate having a plurality of parallel, planar metal layers (301a, 301b, etc.) embedded in the insulator. The substrate further has at least one pair of parallel, metal-filled vias (302 and 303) traversing the substrate; the vias have a diameter and a distance from each other of at least this diameter. The metal in each via has a sheet-like extension (321a, 321b, etc.) in each of selected planes of said metal layers, resulting in an increased via-to-via capacitance so that the reflection of a high frequency signal is less than 10%.

A device for feeding signals between a common line and two or more ports. The device including a branched network of feedlines coupling the common line with the ports. The feedlines have transformer portions of varying width for reducing reflection of signals passing through the network. A dielectric member is mounted adjacent to the network and can be moved to synchronously adjust the phase relationship between the common line and one or more of the ports. The dielectric member also has transformer portions for reducing reflection of signals passing through the network. At least one of the junctions of the network does not overlap with the dielectric member, or overlaps a region of reduced permittivity.

A radar level gauge system, comprising a transceiver; an antenna; a feed-through connecting the transceiver and the antenna; and processing circuitry coupled to the transceiver. The feed-through comprises a first waveguide section comprising a dielectric plug sealingly arranged in a cylindrical first hollow conductor section having a diameter selected for single mode propagation; a second waveguide section arranged between the transceiver and the first waveguide section and comprising a cylindrical second hollow conductor section having a second diameter selected for single mode propagation, a third waveguide section arranged between the antenna and the first waveguide section comprising a cylindrical third hollow conductor section having a third diameter selected for single mode propagation; a first impedance matching waveguide section arranged between the first waveguide section and the second waveguide section, and a second impedance matching waveguide section arranged between the first waveguide section and the third waveguide section.

A slip ring device includes a hollow pipe-shaped shaft rotatably supported inside a tubular body of a main case through a bearing and an electricity-collecting body integrally and concentrically provided in the shaft. The electricity-collecting body preferably includes a plurality of electricity-collecting rings and a plurality of insulating rings alternately layered with one another. The slip ring device further includes a plurality of brushes held by the main case and tip end portions making sliding contact with outer circumferential surfaces of the electricity-collecting rings and a plurality of lead lines introduced into the shaft. The lead lines include tip end portions electrically connected to the respective electricity-collecting rings. Two or more of the lead lines include shielded lines.

The invention relates to a method and a device for pseudo-differential transmission in interconnections used for sending a plurality of electrical signals. The ends of an interconnection having 4 transmission conductors and a return conductor distinct from the reference conductor are each connected to a termination circuit. Three damping circuits are connected between the return conductor and the reference conductor. The transmitting circuits receive at their inputs the signals from the 4 channels of the two sources, and are connected to the conductors of the interconnection. The receiving circuits are connected to the conductors of the interconnection, each receiving circuit being such that the 4 channels of a source connected to a transmitting circuit in the activated state are sent to the four channels of the destinations without noticeable external crosstalk.

A printed circuit board includes: an insulating substrate, and a patterned conductive layer having a signal line and fixed on the insulating substrate, where signal lines on different planes of the patterned conductive layer are electrically connected to a via hole through a pad. An inner wall of the via hole is formed of a conductive bar and an insulating bar that penetrate the via hole; the pad is at an edge of the via hole and is connected to the conductive bar; the pad has an unclosed structure. In the printed circuit board according to the present invention, the size of the pad is significantly reduced by arranging the pad at partial edge of the via hole, thereby effectively improving a layout density of the patterned conductive layer, hence reducing the size of the printed circuit board, and satisfying the market demand for smaller electronic products.

A circuit substrate includes a first pair of ground lines, a second pair of ground lines, a plurality of first connection lines, a plurality of second connection lines and a plurality of conductive pillars. The first and second pairs of ground lines are located on first and second surfaces of the substrate, respecteively. The pillars are located in the substrate and vertically conducted between the first pair of ground lines and the second connection lines and between the second pair of ground lines and the first connection lines, and the first and second pairs of ground lines are conducted, so that a 3-D grounding circuit loop is formed. Moreover, a first pair of signal lines is disposed between the first connection lines for grounding and a second pair of signal lines is disposed between the second connection lines for grounding to get a better signal integrity.

A 1:N MEM switch module comprises N MEM switches fabricated on a common substrate, each of which has input and output contacts and a movable contact which bridges the input and output contacts when the switch is actuated. The input contacts are connected to a common input node, and the output contacts are connected to respective output lines. Each output line has an associated inductance and effective capacitance, and is arranged such that its inductance is matched to its effective capacitance. The switches are preferably arranged symmetrically about the terminus point of the signal input line. A phase shifter employs at least two switch modules connected together with N transmission lines having different lengths, operated such that an input signal is routed via one of the transmission lines to effect a desired phase-shift.