6results about How to "Reduce signal reflection" patented technology

The application discloses a kind of broadband MMIC delay line chips based on constant resistance delay network, including input port, output port and six sequentially connected delay units, the input port is connected with the output port by six sequentially connected delay units;Each of the delay unit includes first port, second port, reference state transmission line, constant resistance delay network and first switch-eighth switch;The constant resistance delay network includes coupled microstrip line, and parallel capacitor loaded on coupled microstrip line.The application is based on the gating of constant resistance delay network and series-parallel switch, realizes delay and ground state selection, can improve isolation, and effectively reduce chip volume.

The utility model relates to an anti-pad structure for optimizing a PCB high-speed via hole, which comprises a via hole pile, the via hole pile penetrates through a multi-layer PCB, and two ends of the via hole pile are respectively connected with differential signal pair wires; the combined elliptical anti-bonding pads are distributed at the wire inlet and the wire outlet of the via hole pile and are composed of a large elliptical bonding pad and a small elliptical bonding pad which are tangent, the long axis length of the large ellipse is D1, the short axis length of the large ellipse is d1, the long axis length of the small ellipse is D2, and the short axis length of the small ellipse is d2; the single circle anti-bonding pad is arranged in the copper column area of the via hole pile, the diameter of the single circle anti-bonding pad is d3, and d3 is larger than the diameter d0 of the via hole and smaller than d1. According to the anti-bonding pad structure for optimizing the PCB high-speed via hole, the combined elliptical anti-bonding pad realizes impedance gradual change from differential routing to a copper column area by means of a specific size proportion, and signal reflection at the two ends of a via hole pile is reduced; a single circle anti-bonding pad optimizes impedance in a copper column area and is matched with a U-shaped shunting groove to shield electromagnetic interference, and meanwhile, a diversion groove is communicated with the U-shaped shunting groove to form a three-stage backflow path, so that crosstalk is reduced.

The present application relates to a kind of printed wiring board deep jump layer hole processing method and printed wiring board, wherein printed wiring board deep jump layer hole processing method includes the following steps: providing printed wiring board with multilayer structure, the printed wiring board includes target inner layer;The depth control drilling processing is carried out to the printed wiring board, to form blind hole from the surface of the printed wiring board to the direction of the target inner layer, the bottom of the blind hole and the target inner layer between remaining preset thickness insulation layer;The laser drilling processing is carried out to the blind hole of the depth control drilling processing completion, to remove the insulation layer reserved at the bottom of the blind hole, until the target inner layer is exposed, to form the jump layer hole that the surface of the printed wiring board and the target inner layer are communicated.The method of the present application can complete high-quality jump layer hole processing from surface layer to deep layer inner layer in printed wiring board under the premise of keeping small aperture.

The utility model discloses a kind of ball grid array packaging structure and PCB of guaranteeing impedance continuity, by the asymmetric spacing of control signal unit and two side ground unit, so that signal unit is offset to one side ground unit, the trace channel of the other side of signal unit is widened, the trace channel of widened not only can double trace, but also can be with thicker line width, so that the characteristic impedance of differential line is consistent on signal transmission path, significantly reduce signal reflection and waveform distortion risk, especially suitable for high-frequency, high-speed signal transmission scene, can ensure signal integrity.

The utility model discloses a hybrid capacitor with a protection function, which relates to the technical field of capacitors and comprises a connecting base and two groups of ceramic chips arranged at the top of the connecting base, a first capacitor chip is arranged between the two groups of ceramic chips, and a second capacitor chip is further arranged between the two groups of ceramic chips. The top of the connecting base is provided with a connecting groove, and the outer side of the connecting base is provided with a heat dissipation opening, so that the problems that the ESL of the existing hybrid capacitor is relatively large, so that the insertion loss of a high-frequency and decoupling circuit is large, and when the hybrid capacitor is used at a position with relatively strong signal interference, high inductance interference is easily caused to the capacitor; according to the high-frequency communication device, the capacitor structure can be applied to the high-frequency communication device, and meanwhile, the stability of the whole structure is improved.

The utility model provides a quick-plug type radio frequency test connector, which comprises an outer conductor, a central conductor, a perforated insulator and an elastic joint, the inner part of the outer conductor is hollow, the central conductor is coaxially arranged in the outer conductor, the perforated insulator is arranged between the outer conductor and the central conductor, and the elastic joint is arranged at one side of the inner part of the outer conductor. Through the arrangement of the elastic joint structure, the quick-plug radio frequency test connector can realize plug-and-test with radio frequency test equipment, and overcomes the problem of low test efficiency caused by threaded butt joint in the prior art.