902 results about "Common line" patented technology

The present invention provides a gaming machine that includes multiple display devices arranged in a common line of sight. An intermediate display device or light filter may be included between the exterior display device and the interior display device. A touchscreen may also be added outside the exterior display device to facilitate player input and gaming machine interaction. The common line of sight arrangement permits a person to view video output on all the display devices simultaneously or without substantially changing their position or line of sight. The interior display device may include a digital display device that includes a curved surface.

Apparatuses, methods, systems and computer-readable media for using proximity inputs on or near a touch screen lens to select objects within a field of view are presented. In some embodiments, a viewing apparatus (e.g. head mounted display, augmented reality goggles) may include at least one lens, wherein the lens can sense touches or near-touches and output data indicative of a location of the proximity input by the user. A processor may receive the data and may select an object within the field of view of the user corresponding to the data, wherein the object and the location of the proximity input on or near the lens by the user are on a common line of sight. In some embodiments, the viewing apparatus may include at least one camera that is configured to record at least one image representative of the user's field of view.

Described herein is an electroluminescence display apparatus comprising: at least one quad-type pixel circuit unit comprising a plurality of sub-pixel circuit units; at least one gate line disposed between the plurality of sub-pixel circuit units and extending along a first direction; at least one first data line group comprising a first pair of data lines disposed at both sides of the at least one pixel circuit unit and extending along a second direction; at least one second data line group comprising a second pair of data lines disposed between the sub-pixel circuit units and extending along the second direction; and at least one common line and at least one anode line disposed between the first pair of data lines of the first data line group and disposed along the first direction, the at least one gate line crosses with the at least one first data line group and the at least one second data line group.

A nasal dilator comprises a laminate of vertically stacked layers forming a unitary, or single body, truss where each layer includes at least one member. The truss features horizontal regions adapted to engage outer wall tissues of first and second nasal passages and to traverse the bridge of a nose therebetween. When in use the dilator acts to stabilize and/or expand the nasal outer wall tissues and prevent said tissues from drawing inward during breathing. Manufacturing methods produce dilator layers and/or finished nasal dilator devices efficiently at the same or lower cost as traditional methods by fabricating dilator elements in whole or part along common lines or edges. Said common lines define peripheral dimensions and form spaced apart relationships between dilator layers, members and finished dilator devices without sacrificing usable material to do so. Manufacturing steps include cutting through a fabrication laminate along lines defining at least portions of one or more layers, members, and the truss's peripheral edges. Manufacturing methods further maximize material usage by incorporating waste material into a subsequent fabrication process. Dilator embodiments further include means for providing disparate dilating force to opposing nasal passages, and means for incorporating promotional printing into the dilator fabrication process.

An LCD includes a first gate line and a second gate line disposed parallel to each other and perpendicular to a first data line and a second data line, thereby defining a unit pixel region, a first common line disposed parallel to the gate lines, a second common line extending from the first common line, a pixel bar and pixel electrodes disposed in the unit pixel region and electrically connected to a first TFT, a second TFT electrically connected to the second common line, a common bar and common electrodes electrically connected to the second TFT, the common electrodes being disposed alternately with the pixel electrodes.

An IPS mode LCD device is disclosed in which a common voltage drop and delay is decreased. The LCD includes gate and data lines crossing each other to define pixel regions. Thin film transistors are formed at crossing portions of the gate and data lines. Common lines are parallel with the gate lines and common electrodes project from the common lines parallel with the data lines. Pixel electrodes connected with drain electrodes of the thin film transistors are formed in the pixel regions between the parallel common electrodes. A first common voltage supplying line applies a first common voltage or a second common voltage to a closed circuit formed by grouping the adjacent odd numbered common lines. A second common voltage supplying line applies the second common voltage or the first common voltage to a closed circuit formed by grouping the adjacent even numbered common lines.

Sipes extending from one end of a block to the central area of the block and sipes extending from the other end of the block to the central area of the block (sipes 24, 28, 32 and 36) are inclined in directions opposite to each other. The sipes extending from one end of the block and the sipes extending from the other end of the block intersect a common line extending along the circumferential direction of the tire. Due to this structure, the number of portions of the sipes, which portions are located in the central area of the block, is made greater than that in the peripheral area of the block. The density of sipes is thus increased in the central area of a block where water tends to form when driving on ice, for improving braking and traction properties on ice.

The present invention provides a structure of a semiconductor device that realizes low power consumption even where increased in screen size, and a method for manufacturing the same. The invention forms an insulating layer, forms a buried interconnection (of Cu, Au, Ag, Ni, Cr, Pd, Rh, Sn, Pb or an alloy thereof) in the insulating layer. Furthermore, after planarizing the surface of the insulating layer, a metal protection film (Ti, TiN, Ta, TaN or the like) is formed in an exposed part. By using the buried interconnection in part of various lines (gate line, source line, power supply line, common line and the like) for a light-emitting device or liquid-crystal display device, line resistance is decreased.

Vertical-color-filter pixel sensors having simplified wiring and reduced transistor counts are disclosed. In an embodiment, a single line is used for reference voltage, pixel reset voltage, and column-output signals in a VCF pixel sensor. In another embodiment, row-reset signals and row-enable signals are sent across a line that is shared between adjacent rows in an array of VCF pixel sensors. The present invention also provides an optimized layout for a VCF pixel sensor with shared row-reset, row-enable, reference voltage and column-output lines as well as a VCF pixel sensor in which source-follower voltage, source-follower amplifier voltage and row-enable signals all share a common line. These combined line embodiments can be used with a single column-output line as well as two row-enable lines. The embodiments can also be implemented in a VCF pixel sensor without a row-enable transistor.

First and second current drivers are connected to one end of corresponding first and second write bit lines, respectively, and the first and second write bit lines are directly connected, at the other end, to a common line. The first and second current drivers receive a first power supply voltage and the ground voltage, while the common line receives a second power supply voltage higher than the ground voltage and lower than the first power supply voltage. The first and second current drivers cause a current for data writing to flow in a first direction based on a voltage difference between the first power supply voltage and the second power supply voltage, and cause a current for data writing to flow in a second direction based on a voltage difference between the second power supply voltage and the ground voltage.

A control system and method for an automatic sprinkler system is disclosed. The automatic sprinkler system includes a first control line and a common line coupled to control a first valve. The control system includes a relay coupled in series with the common line, a sensing circuit coupled to detect the assertion and deassertion of the first valve, and a controller coupled to receive a control data. The controller provides a control signal to enable the relay based on the control data. In operation, the relay is turned on or off based on the control data for controlling the on/off duration of the first value. The relay may be incorporated in the sprinkler system. In one embodiment, the control system learns the programming of the sprinkler system by monitoring the common line to determine the start time, the duration, and the irrigation frequency of the first irrigation zone.

An array substrate for an in-plane switching mode liquid crystal display device and its fabrication method are discussed. According to an embodiment, the array substrate includes a gate line and a data line crossing the gate line on a base substrate, so as to define a pixel region; a thin film transistor connected to the gate line and the data line; a plurality of pixel electrodes disposed in the pixel region and connected to the thin film transistor; a common line extending substantially parallel to the gate line; and a plurality of common electrodes alternately arranged with the plurality of pixel electrodes in the pixel region, wherein the plurality of common electrodes include at least one first common electrode adjacent to the data line and connected to the common line, and at least one second common electrode extending substantially parallel to the date line and not directly connected to the common line.

In a liquid crystal display device of the in-plane switching mode (IPS mode), the potential of data that is output from a data driver is set at values between potentials that are given to common lines. Two levels, i.e., high and low levels, are prepared for the potential to be given to the common lines and the potential is inverted between those levels in every field, whereby the polarity of a voltage between both electrodes of a pixel is inverted. As a result, the potential variation ranges of signals that are output from the data driver and a scan driver can be greatly reduced from those of the conventional case, which contributes to reduction in the power consumption of the drivers. Since the voltage applied to a switching element for controlling each pixel can be reduced, the load of the switching element can also be reduced.

A pixel array including first scan lines, second scan lines, data lines, and sub-pixels is provided. Each sub-pixel includes a first switch, a second switch, a first pixel electrode electrically connected to the first switch, a second pixel electrode electrically connected to the second switch, a third switch, and common lines connected with each other and disposed under the first and the second pixel electrode. The first and the second switch are electrically connected to the same first scan line and data line. The first scan line is located between the first and second pixel electrode. The third switch is electrically connected to the second scan line and the first pixel electrode and has a floating terminal. The floating terminal is capacitively coupled to the second pixel electrode to form a first capacitor and capacitively coupled to the common line under the second pixel electrode to form a second capacitor.