18376 results about "Power supply voltage" patented technology

Amperage control of a power tool motor is provided by pulse width modulation of current from a power supply. The pulse width modulation may be varied according to the determined motor current and measured power supply voltage. The power supply preferably includes a battery, such a lithium ion or nickel cadmium.

An object is to provide a semiconductor device that is capable of wireless communication, such as an RFID tag, which can transmit and receive individual information without checking remaining capacity of a battery or changing batteries due to deterioration with time in the battery for a drive power supply voltage, and maintain a favorable a transmission/reception state even when electric power of an electromagnetic wave from a reader/writer is not sufficient. The semiconductor device includes a signal processing circuit, a first antenna circuit connected to the signal processing circuit, an antenna circuit group, a rectifier circuit group and a battery connected to the signal processing circuit. The first antenna circuit transmits and receives a signal for transmitting data stored in the signal processing circuit and drives a power supply circuit, and each antenna circuit of the antenna circuit group receives a signal for charging the battery and includes an antenna which has a different corresponding frequency.

A method and apparatus for power throttling in a microprocessor. A voltage source supplies voltage to the microprocessor, and a clock source operates the microprocessor at a desired frequency. In one embodiment, a power monitor is configured to measure the short term power consumption of the microprocessor. In another embodiment, a temperature sensor measures the temperature of the microprocessor. Control logic is coupled to the voltage source and the clock source. The control logic receives an indication of the power consumption or temperature, as applicable, and compares it to a predetermined value. In response to the comparison, the control logic varies the supply voltage and the frequency.

A system and method for generating a mask layout file to reduce power supply voltage fluctuations in an integrated circuit are disclosed. The method includes analyzing a pattern in a mask layout file to identify a region in the pattern to add one or more decoupling capacitors. Once the region is identified, a feature located in the identified region is moved based on a design rule from a first position to a second position in the mask layout file to create a space in the identified region. The decoupling capacitors are automatically placed in the space in the identified region.

A storage subsystem includes a charge pump that receives a power signal from a host system, and generates a regulated power signal that is provided to the storage subsystem's controller. When the power signal from the host is interrupted, the charge pump additionally acts as a backup power supply to enable the storage subsystem to continue to operate temporarily, and power isolation circuitry in the storage subsystem prevents power from flowing back to the host system. The storage subsystem further includes a digitally programmable voltage detection circuit that accepts various supply voltages and asserts a busy signal to the controller when an anomaly in the power signal is detected. The controller includes logic circuitry that will block the host system from performing write operations to the storage subsystem either when the voltage detection circuit asserts a busy signal or when the controller is busy executing memory operation commands.

Envelope tracking (ET) methods and systems for controlling the delivery of power to radio frequency power amplifiers (RFPAs). An exemplary ET system includes an RFPA and a wide bandwidth capable and power efficient envelope modulator that includes a first power supplying apparatus and a second power supplying apparatus. The first power supplying apparatus includes a switch-mode converter and a regulator. The first mode converter is operable to dynamically step down a fixed power supply voltage according to amplitude variations in an envelope signal received by the regulator, and use the resulting dynamic power supply signal to power the regulator. The second power supplying apparatus is connected in parallel with the first power supplying apparatus. Depending on a power of an output signal to be generated at an output of the power amplifier, power is supplied to the power amplifier from either or both of the first and second power supplying apparatuses.

An SRAM array and a dummy cell row structure is discussed that permits an SRAM array to be divided into segments isolated by a row pattern of dummy cells. The dummy cell structure avoids the use of special OPC conditions at the power supply line and block boundaries by providing a continuous cell array at the lower cell patterning levels in an area efficient implementation. In one implementation, the SRAM array comprises a first and second array block each comprising an SRAM cell having a first layout configuration, one or more of the dummy cells having a second layout configuration arranged along the row pattern associated with a wordline of the SRAM array, a first power supply voltage line connected to the first array block, and a second different power supply voltage line connected to the second array block. The first and second power supply voltage lines of the array blocks are further connected to the one or more dummy cells. Beneficially, the bitlines of the array may be continuous across the first and second array blocks and a dummy cell associated therewith.

A double-gated low power active clamp circuit for digital circuits includes a first double-gated MOSFET serially connected between an upper power supply voltage and an input terminal to be clamped, and a second double-gated MOSFET serially connected between a lower voltage power supply and the input terminal. The voltages at the gates of the first and second double-gated MOSFETs are held at constant reference voltages by a single or double reference circuits. The clamping action can be switched on or off. The double-gated active clamping network can be implemented with a single power supply voltage, or with multiple power supply voltages. The use of the back gates of the double-gated active clamping network enables additional clamping and ESD protection for smaller generations of transistors, such as, those having dimensions below 0.1 micron. The device is particularly suited for use with dynamic threshold double-gated silicon-on-insulator, FINFET, and bulk triple well technologies.

A driving transistor for outputting a current for driving an organic electroluminescent (EL) element is formed on a pixel circuit of an organic EL display. A first capacitor is coupled between a power supply voltage and a gate of the driving transistor, and a second capacitor is coupled between the gate and a scan line. First a voltage matched with a data current is stored in the first capacitor in response to a select signal from the scan line. The voltage of the first capacitor is changed by variation of the select signal's voltage level. A driving current is output from the transistor because of the changed voltage of the first capacitor, and the organic EL element emits light as a result of the driving current.

A pixel circuit in an organic light emitting device capable of realizing high gradation representation by self-compensating a threshold voltage, and a method for driving the same. The pixel circuit includes an electroluminescent element for emitting light in response to an applied driving current. A first transistor delivers a data signal voltage in response to a current scan line signal. A second transistor generates a driving current to drive the electroluminescent element in response to the data signal voltage. A third transistor connects the second transistor in the form of a diode in response to a current scan signal to self-compensate the threshold voltage of the second transistor. A capacitor stores the data signal voltage delivered to the second transistor. A fourth transistor delivers a power supply voltage to the second transistor in response to a current light-emitting signal. A fifth transistor provides the driving current, provided from the second transistor, for the electroluminescent element in response to the current light-emitting signal.

An organic light emitting diode (OLED) display device for reducing the number of lines of an organic light emitting diode panel is provided. The OLED display device includes first and second data lines; a power voltage supply line supplied with a power supply voltage; a gate line crossing the first data line, the second data line and the power voltage supply line; first and second organic light emitting diodes commonly connected to the power voltage supply line; a first organic light emitting diode driving circuit for driving the first organic light emitting diode with a data voltage from the first data line in response to a scanning signal from the gate line; and a second organic light emitting diode driving circuit for driving the second organic light emitting diode with a data voltage from the second data line in response to the scanning signal from the gate line.

The invention relates to a method and a circuit arrangement for the ageing compensation of an organic light-emitting diode (OLED) which is fed from a supply voltage and is switched by means of a driver transistor operated in saturation operation, by means of a driving of the light-emitting diode. The method comprises the following steps of: storing at least one desired current-voltage value pair of a desired current-voltage characteristic curve of the light-emitting diode; transferring the driver transistor from saturation operation to linear operation during a measurement cycle; measuring a current value for the current through the light-emitting diode by means of a current measuring circuit in the measurement cycle; determining at least one present current-voltage value pair of a present current-voltage characteristic curve of the light-emitting diode by means of the measured current value; comparing the at least one present current-voltage value pair of the light-emitting diode with the desired current-voltage value pair of the light-emitting diode; and generating driving parameters for driving the light-emitting diode in a manner dependent on the result of the comparison.

It is an object to provide a semiconductor device in which power consumption can be reduced. It is another object to provide a highly reliable semiconductor device using a programming cell, such as a programmable logic device (PLD). In accordance with a change in a configuration of connections between basic blocks, power supply voltage furnishing to the basic blocks is changed. That is, when the structure of connections between the basic blocks is such that a basic block does not contribute to a circuit, the supply of the power supply voltage to this basic block is stopped. Further, the supply of the power supply voltage to the basic blocks is controlled using a programming cell formed using a field effect transistor whose channel formation region is formed using an oxide semiconductor, the field effect transistor having extremely low off-state current or extremely low leakage current.

In an active-matrix display device and a method for driving the active-matrix display device, a fifth transistor is connected between a power line and a drain terminal of a first transistor so that a power-supply voltage, namely the fixed voltage required for the compensation of the threshold voltage, is supplied by the power line via a fifth transistor and not by a signal line. Thus, a sufficient length of time for the threshold voltage compensation period can be maintained, and a second transistor of each pixel can accurately be compensated for threshold voltage irregularities.