Patents
Literature
Patsnap Eureka AI that helps you search prior art, draft patents, and assess FTO risks, powered by patent and scientific literature data.

49960 results about "Engineering physics" patented technology

Engineering physics or engineering science refers to the study of the combined disciplines of physics, mathematics and engineering, particularly computer, nuclear, electrical, electronic, materials or mechanical engineering. By focusing on the scientific method as a rigorous basis, it seeks ways to apply, design, and develop new solutions in engineering.

Conductive materials for direct bonding

A structure includes a first substrate including a first layer having at least one electrically conductive first portion and at least one electrically insulative second portion and a second substrate including a second layer having at least one electrically conductive third portion and at least one electrically insulative fourth portion. The structure further includes an interface layer having at least one electrically conductive oxide material between the first layer and the second layer. The at least one electrically conductive oxide material includes at least one first region between and in electrical communication with the at least one electrically conductive first portion and the at least one electrically conductive third portion, and at least one second region between the at least one electrically insulative second portion and the at least one electrically insulative fourth portion.
Owner:ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC

Embedded chiplets with backside power delivery network

An assembly may include a base element comprising a base substrate having a frontside with active circuitry and a backside opposite the frontside, a first bonding layer disposed on the frontside of the base substrate and including a signal pad to convey an electrical signal to the active circuitry. The assembly may further include a first functional element comprising a first semiconductor substrate having a frontside with active circuitry and a backside opposite the frontside, a second bonding layer disposed on the frontside of the first semiconductor substrate, and a back surface of the first functional element having a first contact feature to connect to power or ground, wherein the first bonding layer is hybrid bonded to the second bonding layer.
Owner:ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC

Pulsed Electromagnetic Field Devices Integrated into Adjustable Clothing

Pulsed electromagnetic field systems include planar microcoil arrays integrated into clothing. The planar microcoil arrays are connected to a neuromodulation controller and configured to generate an electrical current and transmit that electrical current, in accordance with a particular stimulation protocol, to each of the planar microcoil arrays.
Owner:ANSARI KAMRAN +1

Irregular devices

A device includes a backplane and a plurality of elements arranged on the backplane. The plurality of elements form an irregular pattern. The backplane includes a plurality of circuits. The plurality of elements are coupled to the plurality of circuits by conductive vias that are regularly spaced.
Owner:PACIFIC LIGHT & HOLOGRAM INC

Electrical bridge package with integrated off-bridge photonic channel interface

A circuit package is described that includes a photonic interposer, a second interposer, and a die partially overlapping and connected to both the photonic interposer and the second interposer.
Owner:SICILY MERGER SUB II INC

Multicomponent photonically intra-die bridged assembly

A package includes a first die with a compute element and first region, a second die with a compute element and second region, and a bridging element connecting the first and second dies. The bridging element includes interconnect regions for electrical coupling, a first photonic path from the first interconnect region to the second, and a second photonic path in the reverse direction. A photonic transceiver is integrated into the bridging element, with one portion sending and receiving optical signals via the photonic paths, and the other portion located in an AMS block in the first die or second die near the memory and compute elements. The transceiver portions are connected by a short electrical interconnect (less than 2 mm).
Owner:SICILY MERGER SUB II INC

Spark gap structures for electrical overstress detection and protection

Apparatuses including spark gap structures for electrical overstress (EOS) monitoring or protection, and associated methods, are disclosed. In an aspect, a vertical spark gap device includes a substrate having a horizontal main surface, a first conductive layer and a second conductive layer each extending over the substrate and substantially parallel to the horizontal main surface while being separated in a vertical direction crossing the horizontal main surface. One of the first and second conductive layers is electrically connected to a first voltage node and the other of the first and second conductive layers is electrically connected to a second voltage node. The first and second conductive layers serve as one or more arcing electrode pairs and have overlapping portions configured to generate one or more arc discharges extending generally in the vertical direction in response to an EOS voltage signal received between the first and second voltage nodes.
Owner:ANALOG DEVICES INT UNLTD CO

Photovoltaic module with automatic cleaning system

The present invention relates to the technical field of photovoltaic modules, and provides a photovoltaic module with an automatic cleaning system. The photovoltaic module comprises a brushing mechanism and a liquid supply mechanism, wherein the brushing mechanism is arranged on a photovoltaic module mounting frame, and the liquid supply mechanism is arranged on one side of the photovoltaic module mounting frame. In the present invention, the brushing mechanism cleans a solar panel while moving across the photovoltaic module mounting frame, the liquid supply mechanism flushes a surface of the solar panel to remove debris such as dust and dirt covering the surface of the solar panel, thereby ensuring a sunlight receiving effect of the solar panel, and stabilizing the power generation capacity of a power generation assembly.
Owner:NEW ENERGY BRANCH OF HUANENG QINGHAI POWER GENERATION CO LTD

Soil moisture sensor with parallel plate capacitance

A soil moisture sensor includes a power source, a parallel plate capacitance sensing element, and an electronics unit. The parallel plate capacitance sensing element is powered by the power source and is adapted for ground insertion to generate and transmit capacitance data. The electronics unit is powered by the power source to: receive the capacitance data transmitted from the parallel plate capacitance sensing element; process the received capacitance data; and communicate the processed capacitance data off sensor.
Owner:HOMEDIGY INC

Dynamic Slab Gate Valves

In one instance, a dynamic slab gate valve is disclosed for use in controlling fluid flow through pipelines and other tubulars, wherein the dynamic slab gate valve has a dynamic seat assembly and a dynamic skirt assembly. The dynamic seat assembly is urged toward a gate of the dynamic slab gate valve by an energizer to maintain a seal between a seat and the gate. The dynamic skirt assembly is urged toward the gate of the dynamic slab gate valve by an energizer to maintain a seal with the gate. Improved seals are provided. Other valves are disclosed herein.
Owner:BESTWAY OILFIELD INC

Back contact battery, manufacturing method thereof and photovoltaic module

The invention discloses a back contact battery, a manufacturing method thereof and a photovoltaic module. The back contact battery comprises a semiconductor substrate, a first semiconductor layer and a second semiconductor layer, the first surface of the semiconductor substrate is provided with a plurality of groove structures, and the groove bottoms of the groove structures are pyramid-shaped suede surfaces; and along the thickness direction of the semiconductor substrate, the distance between the surface, deviating from the semiconductor substrate, of the second semiconductor layer arranged at the pyramid tip of the groove bottom and the surface, deviating from the semiconductor substrate, of the first semiconductor layer is h0, and h0 is larger than or equal to 292 nm and smaller than or equal to 15288 nm. H0 is set in a reasonable range, the situation that teeth of the roller extend into the groove structure to scratch the second semiconductor layer located at the groove bottom is reduced, meanwhile, it is guaranteed that the light absorption rate of the second semiconductor layer in the groove structure and the photoelectric conversion rate of the back contact cell cannot be reduced, and it is further guaranteed that the cell piece has enough mechanical strength.
Owner:LONGI GREEN ENERGY TECH CO LTD

Semiconductor package and method

A semiconductor package includes a redistribution structure, first and second integrated circuit dies that are connected to a first side of the redistribution structure, and third and fourth integrated circuit dies that are connected on a second side, opposite to the first side, of the redistribution structure. An optical bridge die is connected between the third and fourth integrated circuit dies, to the second side of the redistribution structure, which is configured such that the first and second integrated circuit dies optically communicate through the optical bridge die.
Owner:TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

Apparatus and methods for surface inspection

A method for surface defect inspection can comprise obtaining topographical data from one or more portions of a semiconductor element. The semiconductor element can have a surface comprising a dielectric and a plurality of metal pads. The method can further comprise processing the topographical data of the one or more portions of the semiconductor element to determine at least a first property of the plurality of metal pads, computing at least one variability value for the first property, and identifying candidate defects in the one or more portions of the semiconductor element based at least in part on the at least one variability value.
Owner:ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC

Energy storage container

Provided is an energy storage container. The energy storage container comprises a container body (1); in three directions, i.e., a first direction, a second direction, and an up-down direction, the sizes of the container body (1) in two directions among the three directions are the same as the size of a standard container having a preset size, and the size of the container body (1) in the remaining direction is smaller than the size of the standard container having the preset size, wherein the preset size is 10 chi, 20 chi, 30 chi, 40 chi or 45 chi, and the first direction, the second direction, and the up-down direction are perpendicular to each other. Under the condition that the size of the container body (1) is not greatly changed, the weight of the container body (1) can be reduced, and the energy storage container can be matched with conventional transportation apparatuses, thereby satisfying the transportation requirements of land transportation and / or ocean shipping, etc.
Owner:CONTEMPORARY AMPEREX TECHNOLOGY CO LTD

Electric shaver

There is provided an electric shaver having (a) a main body that includes a shaver head and a first pair of contacts through which a first voltage is provided, and (b) a cap that is installable on the main body in a first orientation or a second orientation, and when installed on the main body covers the shaver head. The cap has (1) a second pair of contacts that engage the first pair of contacts when the cap is installed on the main body, to receive the first voltage, and (2) a circuit having (i) a diode bridge that receives the first voltage via the second pair of contacts, and provides a second voltage of proper polarity for utilization by other components of the circuit, and (ii) an ultraviolet (UV) light source that utilizes the second voltage, and when ON, emits UV light that irradiates the shaver head.
Owner:CONAIR CORP

Semiconductor package

A semiconductor package includes a first package substrate having a lower surface and an upper surface respectively including a plurality of first lower surface pads and a plurality of first upper surface pads, a second package substrate having a lower surface and an upper surface respectively including a plurality of second lower surface pads and a plurality of second upper surface pads, wherein the plurality of second upper surface pads comprise all of the upper surface pads at the upper surface of the second package substrate, a semiconductor chip provided between the first package substrate and the second package substrate and attached onto the first package substrate, and a plurality of metal core structures connecting some of the plurality of first upper surface pads to some of the plurality of second lower surface pads and not vertically overlapping any of the plurality of second upper surface pads, each metal core structure having a metal core.
Owner:SAMSUNG ELECTRONICS CO LTD

Packaging architecture including compensation layers for wafer-scale known-good-die to known-good-die hybrid bonding

Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a first layer with a first die having a first contact; a second die having a second contact; and a pad layer, on the first and second dies, including a first pad and a second pad, where the first pad is coupled to and offset from the first contact in a first direction, and the second pad is coupled to and is offset from the second contact in a second direction different than the first direction; and a second layer including a third die having third and fourth contacts, where the first layer is coupled to the second layer by metal-to-metal bonds and fusion bonds, the first contact is coupled to the third contact by the first pad, and the second contact is coupled to the fourth contact by the second pad.
Owner:INTEL CORP

Semiconductor device

To provide a semiconductor device with excellent electric characteristics.SOLUTION: A transistor 200 includes an insulator 216 on an insulator 214, a conductor 205 embedded in the insulator 216, an insulator 222 on the insulator 216 and the conductor 205, an insulator 224 thereon, an oxide 230a thereon, an oxide 230b thereon, an oxide 243a and an oxide 243b thereon, conductors 242a and 242b on the oxides 243a and 243b, insulators 272a and 272b on the conductors 242a and 242b, an oxide 230c on the oxide 230b, an insulator 250 thereon, and a conductor 260 existing thereon and overlapping with the oxide 230c. The oxide 230c is in contact with each of side surfaces of the oxides 243a and 243b and side surfaces of the conductors 242a and 242b. In an insulator 274 and an insulator 280 on the transistor 200, regions 241a and 241b with higher nitrogen concentration than the other regions are formed near an interface with the conductors 240a and 240b.SELECTED DRAWING: Figure 1
Owner:SEMICON ENERGY LAB CO LTD

Semiconductor device with a spaced supply voltage and ground reference

A semiconductor device with a spaced supply voltage and ground reference is disclosed. A stack of semiconductor dies includes a first semiconductor die, one or more second semiconductor dies, and first and second contacts. A gap fill is disposed over a distal end of the one or more second semiconductor dies opposite the first semiconductor die. A first rail (e.g., supply voltage) is disposed at a distal end of the gap fill opposite the first semiconductor die, and a first via extends from the first rail to the first contact. A layer of dielectric material is disposed at least partially over the first rail. A second rail (e.g., ground reference) is disposed at the layer of dielectric material, and a second via extends from the second rail to the second contact. Third and fourth exposed contacts are coupled to the first and second rails, respectively.
Owner:MICRON TECHNOLOGY INC

Arthropod trapping device

An arthropod trapping device comprising a housing and an insert. The housing comprises a base and a shade coupled to the base, where the base comprises a light source (e.g., LED) and where the shade is configured to receive an insert that comprises a light source-facing surface with an adhesive disposed thereon.
Owner:PROCTER & GAMBLE CO

Job-site tool

A job-site tool in one aspect of the present disclosure includes: a display; a flexible printed circuit; and a control circuit. The display is visible tool from outside and includes at least one surface light emitter. The flexible printed circuit includes conductive traces. The at least one surface light emitter is on the flexible printed circuit and is electrically connected to the conductive traces. The control circuit is electrically connected to the display via the conductive traces.
Owner:MAKITA CORP

SiC MOSFET drive circuit and control method thereof

The invention discloses a SiC MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) driving circuit and a control method thereof, the SiC MOSFET driving circuit comprises an active current source driving circuit, a SiC MOSFET, a load current detection circuit, a drain-source inter-electrode voltage overshoot detection circuit, an analog-to-digital conversion module and an FPGA (Field Programmable Gate Array) module, and a self-adaptive adjustment algorithm is built in the FPGA module. The load current detection circuit and the drain-source inter-electrode voltage overshoot detection circuit have low requirements for real-time performance, use of high-speed simulation devices is avoided, hardware design cost is reduced, a self-adaptive adjustment algorithm can adjust SiC MOSFET gate drive parameters in real time according to output of the load current detection circuit and the drain-source inter-electrode voltage overshoot detection circuit, and the self-adaptive adjustment algorithm can adjust the gate drive parameters of the SiC MOSFET in real time according to the output of the drain-source inter-electrode voltage overshoot detection circuit. Therefore, overshoot and switching loss are self-adaptively balanced, and safe operation of the SiC MOSFET is ensured. The technical problems that a SiC MOSFET driving circuit driven by an active grid is high in hardware cost and is difficult to balance voltage and current overshoot and switching loss are solved.
Owner:ELECTRIC POWER RES INST CHINA SOUTHERN POWER GRID CO LTD +2

Package architecture with thermal enhancements for vertically oriented integrated circuit dies

Embodiments of a microelectronic assembly comprise: a first set comprising one or more of first integrated circuit (IC) dies; a second set comprising another one or more of the first IC dies; a plate between, and in direct contact with, the first set and the second set; and a second IC die coupled to the first set, the second set, and the plate. Each IC die comprises a substrate of semiconductor material and an interconnect region including metallization in interlayer dielectric (ILD), the substrate and the interconnect region share a planar interface, and the first IC dies and the second IC die are arranged with the planar interfaces of the first IC dies parallel to each other and orthogonal to the planar interface of the second IC die.
Owner:INTEL CORP

Gate cut structure including an airgap

A semiconductor device comprises a gate cut portion disposed between a first gate region and a second gate region. The gate cut portion comprises a dielectric liner layer disposed around a vacant area. The dielectric liner layer encloses the vacant area, and the gate cut portion isolates the first gate region from the second gate region.
Owner:INTERNATIONAL BUSINESS MACHINE CORPORATION

Multi-energy complementary integrated device based on wind energy, wave energy and solar energy

The invention discloses a multi-energy complementary integrated device based on wind energy, wave energy and solar energy, and belongs to the technical field of offshore power generation, the multi-energy complementary integrated device comprises a semi-submersible platform, a fan is arranged in the center of the semi-submersible platform, a photovoltaic panel is arranged on the upper plane of the semi-submersible platform, and a wave energy device is arranged in the semi-submersible platform; the bottom surface of the semi-submersible platform is connected with a photovoltaic array, the photovoltaic array comprises photovoltaic floating bodies, photovoltaic panels are arranged on the top surfaces of the photovoltaic floating bodies, and the photovoltaic floating bodies are connected through a swing type wave energy device. By the adoption of the structure, complementarity of solar energy and wave energy in space-time distribution can be complementarily utilized, multi-energy power generation output peak-valley staggered compensation is achieved, the overall output stability of the integrated system is improved, the rectification difficulty is reduced, multi-energy complementation is achieved, and the power generation power of the multi-energy integrated system can be effectively improved. Meanwhile, the self-storage capacity of the system can be improved, and the service cycle is prolonged.
Owner:SOUTH CHINA UNIV OF TECH