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63results about How to "Lower the K value" patented technology

Semiconductor device with dual-mosaic structure and forming method thereof

The invention discloses a method for forming a semiconductor device with a dual-mosaic structure, which comprises the following steps of: providing a substrate; forming a first dielectric layer on the substrate; forming a through hole pattern on the first dielectric layer; forming an opening of a through hole; detecting the remaining thickness of the first dielectric layer which remains at the bottom of the opening of the through hole; forming a second dielectric layer on the first dielectric layer and in the opening of the through hole; forming a trench pattern on second dielectric layer; forming a trench; removing the second dielectric layer; adjusting process conditions of the third etching according to the remaining thickness; performing the third etching to remove the first dielectric layer which remains at the bottom of the opening of the through hole; and forming the dual-mosaic structure. The invention also discloses the semiconductor device with the dual-mosaic structure. The semiconductor device with the dual-mosaic structure and the forming method thereof of the invention form high-quality dual-mosaic structure below a stop layer without etching and effectively reduce k value of the dual-mosaic structure.
Owner:SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORP

Internal connection structure of semiconductor device and manufacturing method of internal connection structure

The invention provides an internal connection structure of a semiconductor device and a manufacturing method of the internal connection structure. The manufacturing method includes the steps of forming a first medium layer on the substrate structure and covering a first layer interconnecting wire in the process of forming the inner connecting layer, wherein the first medium layer is attached to the side wall of the first layer interconnecting wire and grows in the direction away from the side wall of the first layer interconnecting wire to partially fill the interval region in a non-filling mode, so that a first air gap is formed in the first medium layer in the interval region, and the first air gap is sealed in the first medium layer; opening the first air gap to form a plurality of opengrooves between the first layer interconnecting wires, and expanding the space size of the grooves; forming a second medium layer on the first medium layer, covering the upper notch of the grooves bythe second medium layer to seal the open slot to form a second air gap, wherein the space enclosed by the second air gap is larger than the space enclosed by the first air gap, so that an air gap with a larger size can be formed between every two adjacent interconnecting wires to realize effective and reliable isolation between the interconnecting wires.
Owner:CHANGXIN MEMORY TECH INC

Air gap forming method in back-end-of-line process

The invention provides an air gap forming method in the back-end-of-line process. The method includes the steps that a semiconductor substrate with a back-end-of-line film layer structure is provided; the back-end-of-line film layer structure is sequentially provided with a low-K dielectric layer and a hard mask layer from bottom to top; a through hole structure is respectively etched in the low-K dielectric layer and the hard mask layer through a photoetching process and an etching process; the side wall of the through hole structure in the low-K dielectric layer is modified through etching so as to form class oxidation film type material; the through hole structures are deposited with seed crystal layers and filled with metal copper; the top of the filling metal copper is subjected to planarization; the hard mask layer is subjected to downward reduction; the hard mask layer located at the top of the oxidation film type material is removed, and the top of the oxidation film type material is exposed outside; the oxidation film type material is removed, and the hard mask layer on which reduction has been conducted is removed, so that in the process of removing the oxidation film type material, the low-K dielectric layer is not damaged, damage to the through hole structures is avoided, and the K value of devices prepared in the later processes is further reduced.
Owner:SHANGHAI INTEGRATED CIRCUIT RES & DEV CENT

A novel 70-series frame and sash mould and engaged ten-seal rubber strips

The invention discloses a new mold for a 70 series frame and fan and ten sealant strips for occlusion, including a widened indoor side aluminum profile and a widened outdoor side aluminum profile, the widened indoor side aluminum profile and the widened room Ten sealing rubber strips are arranged between the outer aluminum profiles, and inverted triangular protrusions for connecting the widened indoor aluminum profiles and the widened outdoor outdoor aluminum profiles are respectively provided at both ends of the ten sealed rubber profiles. The sealing strip breaks the traditional design limitations of single, double, and triple sealing strips, adding ten sealing strips greatly reduces the K value, greatly improves the effect of cold insulation, heat insulation, sound insulation and noise prevention, and at the same time achieves energy saving and emission reduction effects; widened aluminum alloy profiles Better cooling and heat insulation, sound insulation and noise prevention; the design of ten sealing strips can better meet the needs of sound insulation, anti-drying, anti-cold condensation, and anti-heat transfer; high-quality EPDM sealing strips are not easy to age, It is durable and has better sealing effect, which greatly meets the needs of anti-cold poly and anti-heat transfer.
Owner:中明科技(重庆)有限公司

Double control warm frame hollow glass window shade

The invention discloses a double control warm frame hollow glass window shade. The double control warm frame hollow glass window shade comprises a rectangular window body, an inner frame body, front glass and rear glass, a venetian blind, a curtain sheet overturning adjustment control mechanism, a venetian blind lifting adjustment control mechanism, a venetian blind lifting and curtain sheet overturning transition mechanism, a curtain sheet overturning external control mechanism and a venetian blind lifting external control mechanism, wherein the rectangular window body is composed of left andright longitudinal frame strips and upper and lower horizontal frame strips, the inner frame body is composed of left and right inner frame strips and upper inner frame strips, and the venetian blindis arranged in a venetian blind cavity. The double control warm frame hollow glass window shade is characterized in that left inner frame strip lightproof extension edges are arranged on the rear walls of the left inner frame strips and extends to the direction of the venetian blind cavity, right inner frame strip lightproof extension edges are arranged on the rear walls of the right inner framestrips and extends to the direction of the venetian blind cavity, gaps between the left end of the venetian blind and the right side of the left inner frame strips are covered by the left inner framestrip lightproof extension edges, and gaps between the right end of the venetian blind and the left side of the right inner frame strips are covered by the right inner frame strip lightproof extensionedges. Privacy and safety of users are ensured, lifting effect is lasting and stable, and lifting pulling ropes of the venetian blind are not prone to breaking free.
Owner:JIANGSU SDL ENERGY CONSERVATION TECH CO LTD

Manufacturing method of semiconductor device

The invention provides a manufacturing method of a semiconductor device. The manufacturing method of the semiconductor device comprises providing a semiconductor substrate, forming an etching stop layer and an interlayer dielectric layer on the semiconductor substrate from bottom to up in a sequentially stacked mode, and forming copper metal interconnecting wires in the interlayer dielectric layer; forming a silicon layer on the semiconductor substrate; imaging the silicon layer, and etching the silicon layer and the interlayer dielectric layer in sequence to from a groove between the copper metal interconnecting wires; carrying out oxidation treatment on the silicon layer to narrow a top opening of the groove; carrying out ion implantation on the silicon layer which is processed by the oxidation treatment; and forming the interlayer dielectric layer on the semiconductor substrate to completely seal the top opening of the groove. According to the manufacturing method of the semiconductor device, an air gap with a larger feature size can be formed between copper metal interconnecting structures, and therefore the sizes of interconnecting capacitor is effectively reduced. Meanwhile, a k value of the interlayer dielectric layer can be further reduced through an adopted implantation technology.
Owner:SEMICON MFG INT (SHANGHAI) CORP

Double-cavity heat-insulating and temperature-preserving inward casement window structure

InactiveCN105909127ALower the K valueThe heat transfer coefficient K value decreasesInsect protectionWindow/door framesEngineeringLoad capacity
The invention relates to the technical field of processing of combination of casement screen windows and casement windows, in particular to a double-cavity heat-insulating and temperature-preserving inward casement window structure. Specifically, cross sections of a primary frame structure and a secondary frame structure of an original window frame are changed from single-surface contact into double cavities, and the single-surface contact of the cross sections of contact glass of original window sashes is realized as the double cavities; the single-surface contact of a contact glass part of the original window frame is realized as a double-cavity cross section, and the double-cavity cross section is filled with a temperature preserving material, so that the heat preserving property, the load capacity and the wind pressure resistance of a primary frame body and a secondary frame body of a window frame are improved by the cavities of the window frame and a wall surface; the temperature preserving property of the glass contact surfaces of the window sashes is improved, so that the heat-insulating and temperature-preserving effects are improved, and the purpose of reducing a heat transfer coefficient K is achieved. The reasonable arrangement of a combined structure of a screen window and the window frame in a window frame body is realized.
Owner:邸泽勇

Pole piece edge burr cleaning nozzle and device with same

The invention relates to a pole piece edge burr cleaning nozzle and a device with the same, and relates to the technical field of manufacturing of lithium battery equipment. The specific scheme is that the pole piece edge burr cleaning nozzle includes an upper plate, a lower plate, two gas pipes and a vacuum pipe, wherein the upper plate and the lower plate are both horizontally arranged, a gap isreserved between the upper plate and the lower plate, the two gas pipes are installed on the upper plate and the lower plate correspondingly, spraying heads of the two gas pipes are located on the lower surface of the upper plate and the upper surface of the lower plate and are opposite to each other, the two gas pipes are connected to an air pump, one end of the vacuum pipe is connected to the left or right end of the gap, and the other end of the vacuum pipe is connected to a vacuumizer. The pole piece edge burr cleaning nozzle and the device can effectively solve the problem of pole pieceedge burrs of a new process and can remove the edge burrs which cannot be removed by a traditional method; and the K value of a battery cell is reduced, the battery yield is improved, the cost of a single finished battery is reduced, and the battery safety is improved.
Owner:重庆冠宇电池有限公司

Forming method for semiconductor device

The invention provides a forming method for a semiconductor device. The forming method for the semiconductor device comprises that a semiconductor substrate is supplied; an inter-level dielectric layer which is provided with at least two grooves is formed on the surface of the semiconductor substrate; electric leads are formed in the grooves; seed layers which cover the inter-level dielectric layer and the electric leads are formed; pattern layers which are placed on the surfaces of the seed layers are formed, each pattern layer is provided with a first opening, the first opening is arranged in the inter-level dielectric layer placed between two adjacent grooves, and the width of the first opening is smaller than the distance between the two adjacent grooves; the pattern layers are taken as covering mask, the seed layers and the inter-level dielectric layer are etched to form a second opening and sacrificial layers on two sides of the second opening, and the second opening is exposed out of the surface of the semiconductor substrate; the sacrificial layers are eliminated to form an air gap; and an insulating layer which covers the seed layers and crosses over the air gap is formed. The semiconductor device made through the method is good in quality of the air gap and good in performance of an integrated circuit.
Owner:SEMICON MFG INT (SHANGHAI) CORP
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