41787results about How to "High density" patented technology

A three dimensional monolithic memory comprising a memory cell allowing for increased density is disclosed. In the memory cell of the present invention, a bottom conductor preferably comprising tungsten is formed. Above the bottom conductor a semiconductor element preferably comprises two diode portions and an antifuse. Above the semiconductor element are additional conductors and semiconductor elements in multiple stones of memories. The arrangement of processing steps and the choice of materials decreases aspect ratio of each memory cell, improving the reliability of gap fill and preventing etch undercut.

A collapsible medical device and associated methods of occluding an abnormal opening in, for example, a body organ, wherein the medical device is shaped from plural layers of a heat-treatable metal fabric. Each of the fabric layers is formed from a plurality of metal strands and the assembly is heat-treated within a mold in order to substantially set a desired shape of the device. By incorporating plural layers in the thus-formed medical device, the ability of the device to rapidly occlude an abnormal opening in a body organ is significantly improved.

Polymeric delivery devices have been developed which combine high loading / high density of molecules to be delivered with the option of targeting. As used herein, “high density” refers to microparticles having a high density of ligands or coupling agents, which is in the range of 1000-10,000,000, more preferably between 10,000 and 1,000,000 ligands per square micron of microparticle surface area. A general method for incorporating molecules into the surface of biocompatible polymers using materials with an HLB of less than 10, more preferably less than 5, such as fatty acids, has been developed. Because of its ease, generality and flexibility, this method has widespread utility in modifying the surface of polymeric materials for applications in drug delivery and tissue engineering, as well other other fields. Targeted polymeric microparticles have also been developed which encapsulate therapeutic compounds such as drugs, cellular materials or components, and antigens, and have targeting ligands directly bound to the microparticle surface. Preferred applications include use in tissue engineering matrices, wound dressings, bone repair or regeneration materials, and other applications where the microparticles are retained at the site of application or implantation. Another preferred application is in the use of microparticles to deliver anti-proliferative agents to the lining of blood vessels following angioplasty, transplantation or bypass surgery to prevent or decrease restenosis, and in cancer therapy. In still another application, the microparticles are used to treat or prevent macular degeneration when administered to the eye, where agents such as complement inhibitors are administered.

A method of forming a silicon oxide layer on a substrate. The method includes providing a substrate and forming a first silicon oxide layer overlying at least a portion of the substrate, the first silicon oxide layer including residual water, hydroxyl groups, and carbon species. The method further includes exposing the first silicon oxide layer to a plurality of silicon-containing species to form a plurality of amorphous silicon components being partially intermixed with the first silicon oxide layer. Additionally, the method includes annealing the first silicon oxide layer partially intermixed with the plurality of amorphous silicon components in an oxidative environment to form a second silicon oxide layer on the substrate. At least a portion of amorphous silicon components are oxidized to become part of the second silicon oxide layer and unreacted residual hydroxyl groups and carbon species in the second silicon oxide layer are substantially removed.

A method for depositing an amorphous carbon layer on a substrate includes the steps of positioning a substrate in a chamber, introducing a hydrocarbon source into the processing chamber, introducing a heavy noble gas into the processing chamber, and generating a plasma in the processing chamber. The heavy noble gas is selected from the group consisting of argon, krypton, xenon, and combinations thereof and the molar flow rate of the noble gas is greater than the molar flow rate of the hydrocarbon source. A post-deposition termination step may be included, wherein the flow of the hydrocarbon source and the noble gas is stopped and a plasma is maintained in the chamber for a period of time to remove particles therefrom.

A method for depositing an amorphous carbon layer on a substrate includes the steps of positioning a substrate in a chamber, introducing a hydrocarbon source into the processing chamber, introducing a heavy noble gas into the processing chamber, and generating a plasma in the processing chamber. The heavy noble gas is selected from the group consisting of argon, krypton, xenon, and combinations thereof and the molar flow rate of the noble gas is greater than the molar flow rate of the hydrocarbon source. A post-deposition termination step may be included, wherein the flow of the hydrocarbon source and the noble gas is stopped and a plasma is maintained in the chamber for a period of time to remove particles therefrom.

A digital system is provided. The digital system includes an execution unit, a level-zero (L0) memory, and an address generation unit. The execution unit is coupled to a data memory containing data to be used in operations of the execution unit. The L0 memory is coupled between the execution unit and the data memory and configured to receive a part of the data in the data memory. The address generation unit is configured to generate address information for addressing the L0 memory. Further, the L0 memory provides at least two operands of a single instruction from the part of the data to the execution unit directly, without loading the at least two operands into one or more registers, using the address information from the address generation unit.

The present invention relates to an organic electroluminescent (OEL) compound that comprises at least one fluorene derivative and at least one carbazole derivative. The compound has good electrical properties, light emitting properties and charge transport ability, and thus is suitable as a host material suitable for fluorescent and phosphorescent dopants of all colors including red, green, blue, white, etc., and as a charge transport material. An OEL display device that uses an organic layer that includes the OEL compound has a high efficiency, a low voltage, a high luminance, and a long lifespan because it has superior current density.

To form a microcrystalline semiconductor with high quality which can be directly formed at equal to or less than 500° C. over a large substrate with high productivity without decreasing a deposition rate. In addition, to provide a photoelectric conversion device which employs the microcrystalline semiconductor as a photoelectric conversion layer. A reactive gas containing helium is supplied to a treatment chamber which is surrounded by a plurality of juxtaposed waveguides and a wall, the pressure in the treatment chamber is maintained at an atmospheric pressure or a subatmospheric pressure, microwave is supplied to a space sandwiched between the juxtaposed waveguides to generate plasma, and a photoelectric conversion layer of a microcrystalline semiconductor is deposited over a substrate which is placed in the treatment chamber.

A method for forming an insulation film on a semiconductor substrate by plasma reaction includes: introducing into a reaction chamber a source gas of a silicon-containing hydrocarbon compound comprising in its molecule at least one Si—O bond and at least one bond selected from the group consisting of a Si—Si bond, Si—N bond, and Si—H bond; introducing into the reaction chamber an additive gas constituted by C, H, and optionally O; controlling a susceptor at a temperature of −50° C. to 50° C.; forming by plasma reaction an insulation film constituted by Si, O, H, and optionally N on an irregular surface of a substrate at a deposition rate of 100 nm / min or less; and heat-treating the substrate with the insulation film, thereby increasing a density of the insulation film to more than 2.1 g / cm3 as a result of the heat treatment.

Provided is a two-step ALD deposition process for forming a gate dielectric involving an erbium oxide layer deposition followed by a hafnium oxide layer deposition. Hafnium oxide can provide a high dielectric constant, high density, large bandgap and good thermal stability. Erbium oxide can act as a barrier against oxygen diffusion, which can lead to increasing an effective oxide thickness of the gate dielectric and preventing hafnium-silicon reactions that may lead to higher leakage current.

A method for reducing source line bias is accomplished by read / write circuits with features and techniques for multi-pass sensing. When a page of memory cells are being sensed in parallel, each pass helps to identify and shut down the memory cells with conduction current higher than a given demarcation current value. In particular, the identified memory cells are shut down after all sensing in the current pass have been completed. In this way the shutting down operation does not disturb the sensing operation. Sensing in subsequent passes will be less affected by source line bias since the total amount of current flow is significantly reduced by eliminating contributions from the higher current cells. In another aspect of sensing improvement, a reference sense amplifier is employed to control multiple sense amplifiers to reduce their dependence on power supply and environmental variations.

A method for the ultraviolet (UV) treatment of etch stop and hard mask film increases etch selectivity and hermeticity by removing hydrogen, cross-linking, and increasing density. The method is particularly applicable in the context of damascene processing. A method provides for forming a semiconductor device by depositing an etch stop film or a hard mask film on a substrate and exposing the film to UV radiation and optionally thermal energy. The UV exposure may be direct or through another dielectric layer.

A wiring board for mounting a semiconductor element or electronic component having a plurality of wiring layers, an insulating layer provided between these wiring layers, and a via which is provided to the insulating layer and which electrically connects the wiring layers. In this wiring board, the cross-sectional shape of the via in the plane parallel to the wiring layers is obtained by the partial overlapping of a plurality of similar shapes (circles). Stable operation can be obtained in a semiconductor element by minimizing obstacles to increased density, effectively increasing the cross-sectional area of the via, and preventing the wiring resistance from increasing by making the cross-sectional shape of the via into a shape obtained by the partial overlapping of a plurality of similar shapes.

During bottom filling of high aspect ratio gaps and trenches in an integrated circuit substrate using HDP-CVD, a pulsed HF bias is applied to the substrate. In some embodiments, pulsed HF bias is applied to the substrate during etching operations. The pulsed bias typically has a pulse frequency in a range of about from 500 Hz to 20 kHz and a duty cycle in a range of about from 0.1 to 0.95.

A method for forming an insulation film having filling property on a semiconductor substrate by plasma reaction includes: vaporizing a silicon-containing hydrocarbon having a Si—O bond compound to provide a source gas; introducing the source gas and a carrier gas without an oxidizing gas into a reaction space for plasma CVD processing; and forming an insulation film constituted by Si, O, H, and optionally C or N on a substrate by plasma reaction using a combination of low-frequency RF power and high-frequency RF power in the reaction space. The plasma reaction is activated while controlling the flow of the reaction gas to lengthen a residence time, Rt, of the reaction gas in the reaction space.

Disclosed are a phase change memory cell and a method of forming the memory cell. The memory cell comprises a main body of phase change material connected directly to a bottom contact and via a narrow channel of phase change material to a top contact. The channel is tapered from the top contact towards the main body. A minimum width of the channel has a less than minimum lithographic dimension and is narrower than a width of the main body. Therefore, the channel provides a confined region for the switching current path and restricts phase changing to within the channel. In addition an embodiment of the memory cell isolates the main body of phase change material by providing a space between the phase change material and the cell walls. The space allows the phase change material to expand and contract and also limits heat dissipation.