115 results about "Amorphous silicon" patented technology

A MEMS pressure transducer includes a semiconductor body, a fixed electrode region, and a membrane suspended above the fixed electrode region to delimit a cavity, the membrane being deformable as a function of pressure. The membrane includes a lower conductive region made of polysilicon which delimits the cavity at the top and is traversed by holes which face the cavity, the lower conductive region being impermeable to gases, except for the holes; an intermediate structure made of polysilicon permeable to gases, which closes the holes. The membrane also includes an upper conductive region made of polysilicon or amorphous silicon, which extends on the intermediate structure and the lower conductive region and is impermeable to gases. The membrane is laterally delimited by a lateral surface, which is formed by the lower conductive region and the upper conductive region. The intermediate structure does not face the lateral surface of the membrane.

A photonic integrated circuit includes a substrate, an insulating layer on the substrate, an optical device layer on the insulating layer, the optical device layer including an optical coupler, and a reflective layer between the optical coupler and the insulating layer, where the optical device layer further includes hydrogen-containing amorphous silicon.

The application provides a broadband high sound absorption ceramic nanofiber and a preparation method thereof, and belongs to the technical field of ceramic nanofibers. The ceramic nanofiber takes amorphous silicon aluminum oxide as a matrix skeleton, and the fiber is internally dispersed with micro-nano composite units composed of a porous zinc oxide core and an interfacial gap region around the core. The composite units are in-situ formed by using the differential volume shrinkage between the core-shell structure ZIF-8@SiO2 precursor particles and the silicon aluminum skeleton during heat treatment. The gap region and the porous core in the fiber reduce the equivalent density and the dynamic bulk modulus of the skeleton, improve the acoustic impedance matching between the fiber and air, reduce the surface reflection of sound waves, increase the specific surface area of the fiber, improve the tortuosity of the sound wave propagation path, strengthen the viscous friction and heat conduction dissipation, and are beneficial to expanding the effective sound absorption frequency band.

Provided are abrasive grains and a composition for chemical mechanical polishing which are for selectively polishing a silicon nitride film, and which are applicable not only to silicon oxide films but also to amorphous silicon films and polysilicon films. This method for manufacturing abrasive grains includes: a first step of heating a mixture which contains particles having a sulfanyl group (—SH) fixed to the surface thereof via covalent bonds, and which contains a compound having carbon-carbon unsaturated double bonds; and a second step, which is performed after the first step, of further adding a peroxide and carrying out heating.

The application provides a solar cell and a preparation method thereof. The solar cell comprises a silicon base, an intrinsic amorphous silicon layer, a doped amorphous silicon layer, an ITO thin film and a metal electrode which are sequentially arranged on one side of the silicon base. The ITO thin film comprises at least two ITO films, and the grain sizes of the different ITO films are different. Compared with the prior art, the ITO thin film of the application comprises at least two film layers with different grain sizes, so that the IV performance of the solar cell is better, and the product reliability is further guaranteed.

The application provides a semiconductor device and a preparation method thereof, which comprises a substrate, a bit line structure and a gate structure, the substrate comprises a core area and a peripheral area, a plurality of word lines are formed in the core area of the substrate; the bit line structure is located on the core area of the substrate, the bit line structure comprises a first semiconductor layer, a first metal layer and a first amorphous silicon layer which are stacked from bottom to top, and at least part of the first semiconductor layer is located in the substrate between two adjacent word lines; the gate structure is located on the peripheral area of the substrate, and the gate structure comprises a second semiconductor layer. The application can improve the temperature difference between the core area and the peripheral area, so as to improve the performance of the semiconductor device.

The method for preparing an amorphous silicon thin film according to the present invention includes: placing a substrate in a vacuum chamber; controlling the pressure in the vacuum chamber at a predetermined value and performing surface treatment on the substrate; and introducing silane gas and a rarefied gas into the vacuum chamber, heating the substrate, and depositing an amorphous silicon thin film on the substrate using silane gas ions. This method is characterized by low manufacturing difficulty, simple process, and low cost, while improving the growth rate and uniformity of the thin film, making the manufacturing process more stable and controllable, and resulting in a more uniform, dense, and stable amorphous silicon thin film.

A method of heat treating an optically non-transparent substrate using radiant energy. In some embodiments, the method includes flipping the optically non-transparent substrate to expose a non-structured side, depositing an opaque heat layer on the non-structured side of the optically non-transparent substrate, wherein the opaque heat layer has a uniform thickness, flipping the optically non-transparent substrate to expose the structured side, and heat treating the optically non-transparent substrate above about 900 °C. In some embodiments, the opaque heat layer is composed of amorphous carbon, composed of multiple layers of amorphous carbon, adjacent layers of the multiple layers have different optical properties, or composed of alternating layers of different materials, wherein a first layer of the alternating layers is composed of an amorphous carbon material and wherein a second layer of the alternating layers is composed of an amorphous silicon (Si)-based material.

This invention provides a substrate processing apparatus and a substrate processing method. The substrate processing apparatus includes a processing unit, a storage unit, a processing circuit, a circulation circuit, and a gas supply circuit. The processing unit etches a polycrystalline silicon film or an amorphous silicon film formed on the substrate using an alkaline solution. The storage unit recovers and stores the solution used in the processing unit. The processing circuit supplies the solution stored in the storage unit to the processing unit. The circulation circuit removes the solution from the storage unit and returns the removed solution to the storage unit. The gas supply circuit is connected to the circulation circuit and supplies a non-reactive gas to the circulation circuit. The circulation circuit includes an outlet that discharges a mixture of the non-reactive gas supplied by the first gas supply circuit and the solution removed from the storage unit into the interior of the solution stored in the storage unit. Therefore, when the alkaline solution is recovered for reuse, the dissolved oxygen concentration of the solution can be efficiently reduced.

This invention belongs to the field of solar cell technology and relates to a method for producing a tunneling oxide passivated contact solar cell. This invention improves light absorption efficiency and ensures smooth current flow by sequentially texturing, P-type diffusion, and etching a silicon wafer. An aluminum oxide passivation layer is deposited on the front side of the etched silicon wafer. A silicon oxide film is prepared on the front aluminum oxide passivation layer and the back side of the silicon wafer, and a doped amorphous silicon film is deposited on the silicon oxide film. The amorphous silicon film deposited on the silicon wafer is annealed to crystallize it, forming a polycrystalline silicon structure. A silicon nitride film is deposited on the back amorphous silicon layer as an antireflection layer and protective layer, which reduces light reflection on the cell surface and improves light absorption efficiency. Metal grid lines are printed on the front and back sides of the silicon wafer, and the silicon wafer with the printed metal grid lines is placed in a high-temperature furnace for sintering to obtain a tunneling oxide passivated contact solar cell.

This invention belongs to the field of back-contact battery technology, specifically relating to a back-contact battery and its battery assembly with a specific front-side structure. This specific front-side structure includes a tunneling oxide layer and a specifically doped amorphous silicon layer sequentially disposed on the front side of a silicon substrate. Within the specifically doped amorphous silicon layer, a low-doped amorphous silicon layer, a high-doped amorphous silicon layer, and an oxygen-doped amorphous silicon layer are sequentially disposed along the direction away from the tunneling oxide layer. The specifically doped amorphous silicon layer is doped with phosphorus (P) and contains hydrogen (H). The P doping concentration C1 in the low-doped amorphous silicon layer and the P doping concentration C3 in the oxygen-doped amorphous silicon layer are both lower than the P doping concentration C2 in the high-doped amorphous silicon layer. This specific front-side structure enables the back-contact battery to achieve an absorption rate exceeding 85% for incident light within 400 nm. The back-contact battery of this invention maintains good performance even after long-term exposure to ultraviolet light, improving the battery's UV reliability while achieving high transmittance and high battery efficiency.

This application discloses a back-contact solar cell structure and its manufacturing method, relating to the field of battery technology. In the back-contact solar cell structure of this application, the intrinsic amorphous silicon layer and boron-doped amorphous silicon layer in the positive electrode region are disposed on a plane, compared to the existing back-contact solar cell structures where the intrinsic amorphous silicon layer and boron-doped amorphous silicon layer in the positive electrode region are disposed on a textured pyramid structure. This results in better passivation, while simultaneously reducing the metal ion content in the silicon substrate of the cell, reducing cell recombination, and improving cell efficiency.

An exemplary method of semiconductor processing can include forming an amorphous silicon layer on a semiconductor substrate. The amorphous silicon layer can be characterized by a first hydrogen incorporation amount. The method can include performing a beamline ion implantation process or a plasma doping process on the amorphous silicon layer. The method can include removing hydrogen from the amorphous silicon layer until a second hydrogen incorporation amount that is less than the first hydrogen incorporation amount.

This application discloses a back contact battery structure and its manufacturing method, relating to the field of battery technology. In the back contact battery structure of this application, the intrinsic amorphous silicon layer and boron-doped amorphous silicon layer in the positive electrode region are disposed on a plane, compared to the existing back contact battery structures where the intrinsic amorphous silicon layer and boron-doped amorphous silicon layer in the positive electrode region are disposed on a textured pyramid structure. This results in better passivation, a higher implied open-circuit voltage (iVoc), and improved battery efficiency.

This application discloses a perovskite / crystalline silicon tandem solar cell, its fabrication method, photovoltaic module, and photovoltaic system. The perovskite / crystalline silicon tandem solar cell includes a crystalline silicon bottom cell, an intermediate connecting layer, and a perovskite top cell stacked sequentially. A first oxide barrier layer is stacked between the crystalline silicon bottom cell and the intermediate connecting layer; a second oxide barrier layer is stacked between the intermediate connecting layer and the perovskite top cell. The density of the first and second oxide barrier layers is greater than that of the intermediate connecting layer. This invention introduces oxide barrier layers with higher density on both sides of the intermediate connecting layer, achieving physical-level material exchange isolation: on the one hand, it can block organic ions migrating from the perovskite from interacting with OH groups in the intermediate connecting layer. ‑ The reaction inhibits the decomposition of the perovskite interface and also prevents the diffusion and escape of hydrogen from the amorphous silicon layer in the bottom cell under stress, thereby significantly improving the stability of the perovskite / crystalline silicon tandem cell.

The application discloses a 750-850nm waveband photonic crystal surface emitting laser and a preparation method, and belongs to the field of semiconductor lasers. The application is divided into surface etching and buried photonic crystal layer structures, uses n-GaAs as a substrate, combines surface etching or buried photonic crystal structures, uses amorphous silicon, titanium oxide, GaP or AlGaAs as main materials of a resonant cavity, utilizes large-area in-plane resonance and high coupling with a quantum well active layer, realizes low-loss resonance and optical gain, and realizes a 750-850nm waveband semiconductor laser with high light beam quality, high power and surface emission.

Method for structuring a resist layer on an amorphous silicon hard mask in semiconductor devices, the method comprising: forming an amorphous silicon hard mask layer (120) on an underlying stack (110); implanting a surface of the amorphous silicon hard mask layer with one or more hydrophobic elements; and forming a resist layer (140) directly on the surface of the amorphous silicon hard mask layer.

The utility model relates to a silane conveying device and solar cell production equipment. The silane conveying device comprises a gas inlet piece and a gas conveying piece. Wherein the gas transmission part comprises a plurality of gas outlet pipes which are arranged at intervals, the lengths of the gas outlet pipes in the first direction are not equal, each gas outlet pipe is provided with a through gas outlet hole, and the gas outlet holes are communicated with the gas inlet part. By arranging the multiple gas outlet pipes arranged at intervals, silane gas is directly conveyed to the ends, away from the gas inlet piece, of the gas outlet pipes through the gas outlet holes in the gas outlet pipes, the probability that amorphous silicon is accumulated in the gas outlet holes can be reduced, and the service life of the silane conveying device is prolonged.

An electrochemical lithium-ion or lithium-sulfur secondary cell or battery comprising a negative electrode composition utilizing lithium; wherein the lithium is drawn into the negative electrode composition during charging of the cell or battery and is withdrawn from the negative electrode composition during discharging of the cell or battery; the negative electrode material comprising a composite material consisting of silicon, tin, and a second metallic element selected from the group consisting of aluminum, copper, and titanium, wherein the composite material is further characterized in that the silicon, tin, and the second metal are present separately in different phases, the tin phase and the phase of the second metallic element being crystalline or amorphous, and the silicon phase being amorphous;wherein the composite material of silicon, tin and the second metal element is further characterized by nanoscale islands of amorphous silicon phase dispersed in a matrix of a tin phase and a phase of the second metal element, wherein the composite material consists of 50 atomic% silicon, 25 atomic% tin and 25 atomic% of the second metal.

The application relates to the technical field of photovoltaic cells, and discloses a PN junction of a photovoltaic cell, a preparation method of the PN junction, and a preparation method of the photovoltaic cell. The preparation method of the PN junction comprises the following steps: forming a thickened first intrinsic amorphous silicon layer on the back surface of a silicon wafer; patterning and thinning the first intrinsic amorphous silicon layer of a P region to a normal thickness, so that the first intrinsic amorphous silicon layer of an N region and the first intrinsic amorphous silicon layer of the P region have a thickness difference; after boron doping, the thickness difference is used to control the boron doping concentration of the boron-doped polysilicon layer of the N region and the P region (the greater the thickness of the intrinsic amorphous silicon layer, the smaller the boron doping concentration); in this way, the doping concentration of the boron-doped polysilicon layer of the N region can be reduced to reduce the etching difficulty, and the boron-doped polysilicon layer of the P region can maintain a high doping concentration, so that the production capacity is improved, the problems of the boron-doped polysilicon layers of the N region and the P region caused by the height difference, such as the combination and electrode preparation defects, are avoided, the manufacturing cost is low, the combination caused by mutual doping is avoided, and the electrical performance of the cell is improved.

The application discloses a transparent conductive oxide film for a heterojunction cell and a preparation method thereof. The transparent conductive oxide film substrate is sequentially provided with an intrinsic amorphous silicon film and a doped amorphous silicon film and is stably formed into a uniform pyramid structure with a size of 1-2 microns on the surface of a silicon wafer. A buffer layer is grown on the surface of the doped amorphous silicon, and the buffer layer is located between an indium titanium oxide (ITIO) film and the doped amorphous silicon. The application grows a buffer layer with a thickness less than 10 nanometers on the surface of the doped amorphous silicon. The growth process cannot physically damage the effective doping sites of the amorphous silicon. The buffer layer can block the direct bombardment of high-energy particles, protect the doped amorphous silicon film from damage, ensure the smooth progress of the deposition process, make the transparent conductive oxide film still have good conductive performance, make the transparent conductive oxide film have high light transmittance, and thus be favorable to the improvement of the efficiency of the heterojunction solar cell.

A solar cell and its fabrication method are disclosed. The fabrication method includes the following steps: depositing a tunneling layer and an amorphous silicon layer on the back side of a P-type silicon substrate, wherein the back side of the silicon substrate has a first region and a second region; fabricating a barrier layer of a first thickness in the electrode region of the first region and a barrier layer of a second thickness in the non-electrode region of the first region; diffusion doping the amorphous silicon layer using an N-type doping source to form an N-type doped crystalline silicon layer and an oxide layer; removing the oxide layer and the N-type doped crystalline silicon layer in the second region; fabricating a first electrode in the electrode region of the first region and a second electrode in the electrode region of the second region. The fabrication method of this invention forms barrier layers of different thicknesses in the first region, which have different blocking effects on phosphorus diffusion. During phosphorus diffusion, a selective emitter is formed in the first region, improving cell efficiency. Furthermore, the barrier layers are corrosion-resistant to alkaline solutions, protecting the N-poly layer in the first region during subsequent processes while completely removing the N-poly layer in the second region, thus improving cell yield.

The application provides a solar cell and a preparation method thereof. The method comprises the following steps: providing a substrate. The substrate has a light-receiving surface and a back surface. A first passivation layer is formed on the light-receiving surface of the substrate. The first passivation layer is used for oxygen passivation of the light-receiving surface of the substrate. A second passivation layer is formed on the side of the first passivation layer away from the substrate. The second passivation layer comprises doped amorphous oxygen-doped silicon nitride, and the doping type of the second passivation layer is the same as the doping type of the substrate. The preparation temperature of the first passivation layer and the second passivation layer is lower than the crystallization temperature of amorphous silicon. An anti-reflection layer is formed on the side of the second passivation layer away from the first passivation layer. The anti-reflection layer can reduce the decrease of passivation performance caused by bond breakage and the occurrence of ultraviolet-induced decay phenomenon. The second passivation layer can also maintain a relatively stable passivation effect under different working conditions, provide continuous and stable performance support for field passivation, and further reduce the formation of surface dangling bonds and improve the passivation performance.

The application provides a heterojunction solar cell preparation method and a heterojunction solar cell. The heterojunction solar cell obtained by the heterojunction solar cell preparation method provided by the application has a low doping concentration of the first doped amorphous silicon inner layer, can reduce the amorphous silicon structure distortion caused by doping, is beneficial to improving the passivation effect of the solar cell and improving the open circuit voltage; the setting of the doped amorphous silicon oxide layer can increase the optical band gap of the main light-receiving surface of the heterojunction solar cell, reduce the absorption of incident light in the passivation film layer, and improve the short circuit current of the solar cell; the first doped amorphous silicon outer layer has a high doping concentration, can reduce the contact resistance between the first doped amorphous silicon outer layer and the first transparent conductive film, and further reduce the series resistance of the solar cell, thereby effectively improving the photoelectric conversion efficiency of the heterojunction solar cell.

A method for manufacturing a semiconductor device according to one embodiment of the present application includes: a step of preparing a silicon substrate having a first main surface; a step of forming a silicon oxide film on the first main surface of the silicon substrate; a step of forming an amorphous silicon film on the silicon oxide film; a step of forming a metal layer on the amorphous silicon film; a step of converting the amorphous silicon film into a crystalline silicon film by annealing the silicon substrate on which the metal layer is formed; a step of forming a transistor in which a part of the crystalline silicon film serves as a channel; and a step of forming a capacitor adjacent to the transistor and electrically connected to the transistor in a direction perpendicular to the first main surface.

The present invention relates to a method of manufacturing a piezoelectric on insulator (POI) structure, the method comprising: providing a donor substrate comprising a piezoelectric substrate, wherein the piezoelectric substrate comprises or consists of one of lithium tantalate and lithium niobate; transferring a piezoelectric layer from the piezoelectric substrate to a target substrate; and polishing the piezoelectric layer transferred to the target substrate using a chemical mechanical polishing (CMP) slurry, wherein the CMP slurry consists of an aqueous suspension of amorphous silicon, wherein the weight percentage of amorphous silicon is in the range of 4% to 18%.

The application belongs to the technical field of integrated optical devices, and discloses an amorphous silicon-thick film lithium niobate hybrid integrated bending converter and a preparation method thereof. The thick film lithium niobate layer of the device is photoetched to form a thick film lithium niobate end face coupler, a first thick film lithium niobate waveguide and a second thick film lithium niobate waveguide. The amorphous silicon layer comprises a first and a second amorphous silicon-lithium niobate wedge waveguide optical mode conversion structure and an amorphous silicon bending waveguide. The optical signal transmitted in the first thick film lithium niobate waveguide can be transmitted to the amorphous silicon bending waveguide and finally transmitted to the second thick film lithium niobate waveguide, so that the bending conversion output is realized. The amorphous silicon functional component is introduced between the two thick film lithium niobate waveguides, so that the problems of weak optical binding capacity of the thick film lithium niobate bending waveguide and large bending radius of the waveguide are effectively solved.

Disclosed are a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a plurality of memory cells, wherein each memory cell of said plurality of memory cells includes a memory layer; a selector layer disposed over the memory layer to select the memory layer, the selector layer including an amorphous silicon layer including a dopant containing a group-13 element and a group-15 element of a periodic table; and a barrier layer containing boron (B) disposed over or below the selector layer.

The present disclosure relates to the technical field of infrared detection, and particularly relates to an amorphous silicon infrared detector pixel, a chip, a movement and equipment, the amorphous silicon infrared detector pixel comprising an absorption sensing part; the absorption sensing part comprises an amorphous silicon thermal sensitive layer and a metal electrode layer; the amorphous silicon thermal sensitive layer comprises a thermal sensitive working area and a non-thermal sensitive working area, the thermal sensitive working area has a first thickness, the non-thermal sensitive working area has a second thickness, the first thickness is greater than the second thickness, and the effective value of the second thickness is less than 2000 angstroms; the metal electrode layer is in contact with the non-thermal sensitive working area and at least the side surface of the thermal sensitive working area; wherein an adjacent pair of metal electrode layers located on the side surface of the thermal sensitive working area form quasi-parallel electrodes. Thus, the first thickness of the amorphous silicon thermal sensitive layer in the thermal sensitive working area is greater than the second thickness of the non-thermal sensitive working area, the thickness of the amorphous silicon thermal sensitive layer between the quasi-parallel electrodes is relatively thick, noise can be reduced, and the performance of the device is improved.

The disclosure provides a heterojunction solar cell, and belongs to the technical field of solar cells. The heterojunction solar cell comprises an n-type monocrystalline silicon substrate, a first intrinsic amorphous silicon layer, a p-type amorphous silicon layer, a first transparent conductive oxide layer and a first electrode which are sequentially arranged on the upper surface of the n-type monocrystalline silicon substrate, and a second intrinsic amorphous silicon layer, an n-type amorphous silicon layer, a second transparent conductive oxide layer and a second electrode which are sequentially arranged on the lower surface of the n-type monocrystalline silicon substrate; wherein the first transparent conductive oxide layer comprises a first TCO thin film, a metal grid line and a second TCO thin film; and the second transparent conductive oxide layer comprises a first TCO thin film and a second TCO thin film. By adopting transparent conductive oxide layers with different structures, different requirements of the grid line area and the non-grid line area can be met, the performance of the solar cell is better matched, the carrier concentration and the conductivity are effectively improved, and meanwhile, the high transmittance is maintained.