11774 results about "Wafer" patented technology

The invention discloses an AOI optical scheme automatic optimization method based on reinforcement learning, and belongs to the technical field of automatic optical detection. According to the method, a reinforcement learning technology is applied to automatic adjustment of optical schemes in a machine vision system, wafer images under different optical schemes are collected by using an AOI system, and scoring is performed by using a plurality of semantic segmentation models; constructing and training a non-reference image quality evaluation network, evaluating the optical imaging quality in real time, and designing a reward function on the basis; by using the Actor-Critic algorithm, the intelligent agent can autonomously learn an optimal parameter adjustment strategy, quickly adapt to different scenes, realize dynamic optimization of light source parameters and remarkably improve image quality, and an efficient and intelligent solution is provided for efficient application of a machine vision system in a complex industrial environment.

The invention provides a regeneration wafer defect detection method and system based on point cloud, and belongs to the technical field of semiconductor manufacturing detection, and the method comprises the steps: carrying out the registration and fusion processing of the point cloud data of a target wafer, and obtaining the target point cloud data; performing plane fitting on the target point cloud data to determine a reference plane; performing feature extraction on the target point cloud data relative to the reference plane to obtain feature data; positioning a defect area based on the feature data, and calculating geometric parameters of the defect area; correcting the geometric parameters by using a preset error compensation model to obtain target geometric parameters; inputting the position of the defect area, the target geometric parameter and the feature data of the corresponding defect area into a defect classification model to obtain a defect type of the defect area; and generating a defect detection result of the target wafer based on the defect types, the positions, the target geometric parameters and the feature data of all the defect areas of the target wafer. According to the invention, the efficiency and reliability of regenerated wafer defect detection are improved.

The invention provides a wafer edge defect detection method and system based on image recognition and a storage medium, and belongs to the technical field of semiconductor manufacturing, and the method comprises the steps: processing annular image data, and obtaining target image data; inputting the target image data into the edge defect prediction model to obtain a defect probability distribution diagram; based on the defect probability distribution diagram, identifying a pixel region with a probability value greater than or equal to a preset threshold value as a candidate defect region; performing feature extraction on the candidate defect region to obtain a target feature vector; inputting the target feature vector into a defect classification model, and determining the defect type and classification confidence of the candidate defect region; based on the defect type and / or the classification confidence, screening out a target defect area from the candidate defect areas; obtaining three-dimensional point cloud data of the target defect area, and calculating three-dimensional geometric parameters of the target defect area based on the three-dimensional point cloud data; and determining a detection result of the target wafer based on the defect type and the three-dimensional geometric parameters.

The embodiment of the invention provides a wafer defect classification method, a model training method, a system, equipment and a medium. According to the wafer defect classification scheme provided by the invention, the multi-modal test information of the wafer can be acquired, so that a plurality of test maps generated based on the multi-modal test information of the wafer are used as the basis of wafer defect classification, and the test information of different modals (namely, different dimensions) is considered during wafer defect classification; therefore, the accuracy of the classification result can be improved, and an actual manual wafer defect analysis mode can be met. Wherein the plurality of test maps comprise at least two types of maps, and one type of map is generated based on one type of modal test information.

The invention relates to the field of wafer processing, and discloses a wafer grinding and polishing adjustment control system based on a tension sensor, which comprises a processing pressure acquisition module for acquiring the gravity of a heavy object, acquiring the tension of an electric cylinder in real time based on the tension sensor, calculating the processing pressure through a formula, and acquiring grinding state parameters of a wafer in real time; the processing pressure stability analysis module comprises a first analysis unit and a second analysis unit; the first analysis unit is used for calculating the accumulated variable quantity of the processing pressure in a preset monitoring period, comparing the accumulated variable quantity with a change threshold value and sending out an alarm signal; the second analysis unit inputs the grinding state parameters into a grinding state model to analyze a grinding state value, and reversely evaluates the state of the grinding disc; the adjusting control module adjusts the pulling force of the electric cylinder based on the first analysis unit and judges whether the grinding disc is replaced based on the second analysis unit. Accurate monitoring and stability control of the machining pressure are achieved, the state of the grinding disc can be effectively evaluated, and the wafer grinding and polishing quality and efficiency are improved.

The invention relates to the field of semiconductor manufacturing, and discloses a wafer processing quality backtracking evaluation method driven by a cross-modal knowledge graph, comprising the following steps: acquiring and preprocessing time sequence process data and text log data; modeling the time series data by adopting a long short-term memory network to predict the defect probability, extracting entities and relationships from a text by adopting a BERT model, and respectively constructing a process knowledge graph, a defect knowledge graph and an equipment knowledge graph; aligning the cross-modal features by using a generative adversarial network, and fusing the cross-modal features into a unified cross-modal knowledge graph; based on the unified atlas, probability backtracking reasoning of defect causes is carried out, and an active process parameter correction strategy is generated; and outputting a comprehensive quality score through the self-weighted dynamic evaluation model. According to the method, intelligent closed loop from passive diagnosis to active optimization can be realized, the accuracy and efficiency of defect positioning are remarkably improved, and a dynamic and comprehensive quality evaluation means is provided.

The invention relates to the related technical field of semiconductor wafers, in particular to a full-automatic wafer film thickness detection method and system based on spectral reflection, and the method comprises the steps: obtaining a wafer surface reflection spectral signal, and extracting spectral feature information and wavelength parameters; identifying a polarization characteristic parameter and an interface interference characteristic parameter, introducing the wavelength parameter as an adjusting variable, determining a wavelength dependence term, and generating a global film thickness distribution map, thereby solving the problems that in a detection scene with a multi-layer film or a rough interface, the influence of an incident light polarization state on a reflection signal is not fully considered, the reflection signal characteristic extraction is distorted, and the detection accuracy is poor. According to the method, the technical problem that the film thickness obtained through reflection characteristic backstepping deviates from the actual film thickness is solved, polarization characteristic parameters and interface interference characteristic parameters are recognized, the thickness of each detection point is determined after the film refractive index is corrected, the thickness detection precision is effectively improved, and the influence of spectral signal noise and interface interference is reduced; the technical effect of accurately presenting the global film thickness distribution of the wafer film is achieved.

The invention discloses a wafer defect detection method and related equipment, and relates to the technical field of data processing, and the method comprises the steps: receiving a preset first resolution image of a corresponding wafer collected by a camera in response to a wafer defect detection instruction, and carrying out the parallel processing of the preset first resolution image based on a CPU-GPU cooperative calculation strategy, determining a binary mask corresponding to the preset first resolution image according to the preset first resolution image, and judging whether the wafer has defects or not based on a preset wafer defect judgment rule and the binary mask so as to obtain a wafer defect detection result. According to the method and the device, the preset first resolution image is processed in parallel through a CPU-GPU cooperative computing strategy, so that the image processing speed is improved, and the real-time performance of wafer defect detection is improved.

The invention discloses an intelligent sealing test method and system for a wafer in a semiconductor chip, and relates to the technical field of semiconductor manufacturing, and the method comprises the steps: initializing a magneto-electric field cooperation parameter, optimizing the magneto-electric field cooperation parameter through a multi-target genetic algorithm, and driving core-shell nanoparticles to carry out the metallization filling of a high-precision through hole wafer, generating a wafer with a metalized through hole structure; based on the metalized through hole structure wafer, bonding parameters are generated through a laser Doppler frequency vibration spectrum analysis method, flip interconnection is achieved through a thermal ultrasonic virtual process, and a low-defect bonding wafer is generated; a finite element inversion algorithm is adopted, a stress distribution map of a bonding interface is established, an anti-thermal-stress packaging layer is constructed through an intelligent stress matching algorithm, and the low-defect bonding wafer is packaged; and through a multi-target genetic algorithm, magnetoelectric field cooperation parameters are optimized, core-shell nano-particles are driven to directionally deposit, and accurate control over the metallization filling process is achieved.

The invention relates to the technical field of semiconductor manufacturing, in particular to an accurate detection method and system for a flat-edge sheet wafer placement rotary chuck, and the method comprises the steps: when a wafer is placed on the rotary chuck, scanning the lap joint condition of a wafer edge and a chuck contact area through a laser sensor, and obtaining the real-time distribution data of an edge lap joint sheet; flat edge position information is extracted from the edge lap joint distribution data, an image matching algorithm is adopted to compare a preset orientation reference, and a specific angle value of orientation deviation is determined; according to the orientation deviation angle value and the edge lapping piece distribution data, the rotating speed and the angle of the rotating chuck are adjusted through a cooperative control algorithm, and a final positioning result of the wafer on the chuck is obtained; after a final positioning result is obtained, the in-place state of the wafer is classified and judged through a deep learning model, and whether the residual deviation or wafer lapping phenomenon exists or not is determined; and extracting abnormal data from a classification judgment result, and adjusting collaborative parameters of carrying and placing according to the abnormal data to obtain an optimized process control scheme.

The invention relates to the technical field of artificial intelligence and the technical field of semiconductor detection, and discloses a wafer defect identification method based on feature fusion, which comprises the following steps: acquiring a first type of image and a second type of image of a wafer detection area, and performing alignment processing; performing feature extraction on the first type image and the second type image to generate a first type feature and a second type feature; fusing the first type of features and the second type of features to generate fused features; filtering the fusion features, and screening target fusion features meeting a confidence threshold condition; and determining a defect position and corresponding process layer information based on the target fusion feature. According to the invention, features of different types of images are fused, so that the characterization capability of wafer surface defects is enhanced, and the recognition precision of a detection system is improved; by screening the target fusion features meeting the confidence threshold, false detection and missing detection are reduced, and the detection reliability is improved.

The invention provides a data detection method and system, a detection device, computer equipment and a storage medium, and the method comprises the steps: obtaining a detection signal of each wafer surface in a planetary reaction cavity, and cutting the detection signal based on a trigger signal to obtain a first signal sequence and a second signal sequence; processing the first signal sequence by adopting a classification model to obtain a material type on each wafer; querying a corresponding optical model based on the material type; and performing iterative optimization on the optical model, the first signal sequence and the second signal sequence by adopting a decoupling algorithm to obtain a temperature detection value and a reflectivity detection value. According to the method, the original detection signal is segmented into the independent signal sequences based on the trigger signal, then the material type is determined according to the independent signal sequences, the corresponding optical model is selected according to the material type, and finally the temperature detection value and the reflectivity detection value with high accuracy are obtained through decoupling according to the optical model. Accurate analysis of a single wafer signal is realized, and process repeatability and stability are greatly improved.

The invention relates to a polishing process for improving local flatness of a silicon wafer, which belongs to the technical field of semiconductor manufacturing, and comprises the following operation steps of: 1, pretreating the silicon wafer, cleaning the silicon wafer, activating the surface of the silicon wafer, removing surface impurities and an oxide layer, and preparing for subsequent polishing; secondly, partition parameter setting is conducted, the wafer is scanned, the surface of the wafer is divided into a plurality of different areas, and independent polishing parameters are set for each area according to the material characteristics, the thickness and the preset flatness target of each area; and thirdly, dynamic polishing is conducted, specifically, multi-axis linkage polishing equipment is adopted, and the movement tracks and working parameters of the polishing head in different areas are dynamically adjusted in real time according to preset partition parameters. Through silicon wafer pretreatment, partition parameter setting and dynamic polishing process monitoring and feedback adjustment mechanisms, polishing process parameters can be accurately controlled, deviation in the polishing process can be corrected in time, and stability and consistency of polishing quality are ensured.

The embodiment of the invention provides a defect detection method, electronic equipment, a storage medium and a program product, and the method comprises the steps: obtaining the actual morphology data of one or more local regions of a target wafer and a global layout of the target wafer, and carrying out the global layout of the target wafer for each local region based on the mapping relation between the wafer morphology and technological parameters, determining a prediction process parameter corresponding to the actual morphology data of the local region, and predicting the wafer morphology of the global layout under the prediction process parameter of the local region for each local region based on a mapping relationship between the wafer morphology and the process parameter to obtain wafer morphology prediction data, and determining the defective pixel areas of the target wafer based on the predicted wafer morphology prediction data corresponding to each local area, determining a to-be-detected area from all the defective pixel areas, and scanning the to-be-detected area of the target wafer by using defect scanning equipment to obtain a defect detection result, so as to effectively improve the efficiency and precision of defect detection.

The invention provides a wafer defect detection method and system and electronic equipment, and relates to the technical field of machine vision, and the method fully utilizes the transformation relation between an imaging unit and an objective table in the wafer defect detection process to precisely splice strip images, thereby obtaining a high-precision wafer image, and improving the wafer detection precision. Meanwhile, an improved VAE model can be adopted to accurately obtain the defect area of the wafer to be detected from the brightness, the contrast ratio and the structural difference, high-precision recognition can be carried out on the fine defects, and therefore the problem that in the prior art, the fine defect detection effect is poor is solved.

The invention provides a manufacturing method of an MEMS device and the MEMS device, and the manufacturing method comprises the steps: providing a first wafer which is provided with a groove; a protective layer is arranged in the groove; providing a second wafer, and bonding the second wafer and the first wafer to seal the groove to obtain a first cavity; the second wafer is etched to form a comb tooth structure, and the protection layer is used for protecting the comb tooth structure. According to the embodiment of the invention, the protection layer is arranged in the first cavity of the first wafer as a buffer layer, so that when the second wafer is etched to form the comb tooth structure, the plasma backwash in the over-etching stage can be reduced, the comb tooth structure is further protected, the damage to the bottom of the comb tooth caused by the backwash of etching particles is reduced and solved, and the service life of the comb tooth structure is prolonged. Therefore, the mechanical strength and the anti-failure capability of the device are enhanced.

The embodiment of the invention provides an optical detection device which comprises an imaging assembly and a photoelectric detection device, and the imaging assembly is used for forming an image on an image plane of a to-be-detected area of a wafer. And the photoelectric detection device is used for receiving images and is arranged at the image plane. The photoelectric detection device comprises a light beam separation assembly and a sensor assembly, the light beam separation assembly is used for dividing a continuous first light signal in an image into multiple beams of second light signals, and the light beam separation assembly comprises a microlens array. The sensor assembly is used for receiving multiple beams of second optical signals, and each pixel unit of each sensor in the sensor assembly is used for receiving one beam of second optical signal in the multiple beams of second optical signals. The sensor assembly comprises a single-pixel sensor, and the single-pixel sensor corresponds to one micro lens in the micro lens array; and / or, the sensor assembly comprises a multi-pixel sensor, the multi-pixel sensor corresponds to a plurality of microlenses in the microlens array, and spatial segmentation is beneficial to improving the signal-to-noise ratio.

The embodiment of the utility model provides a polishing head and polishing equipment. The polishing head comprises a base, a polishing head and a driving device, the retaining ring is arranged below the base; the polishing head gas film is arranged on the base, is arranged on the inner side of the retaining ring and is used for fixedly holding the wafer; the retaining ring gas film is arranged on the inner side of the retaining ring and is arranged between the retaining ring and the polishing head gas film, the retaining ring gas film is in contact with the edge of the wafer when the retaining ring gas film is pressurized and expanded so as to apply acting force to the edge of the wafer, and the acting force forms radial clamping force and axial downward pressure on the edge of the wafer. Radial clamping force and axial downward pressure are applied to the edge of the wafer through the retaining ring gas film, the wafer can be clamped through the radial clamping force, the wafer is prevented from moving in the polishing process, and the risk of wafer sliding is reduced; the axial downward pressure can apply pressing force to the edge of the wafer in the wafer polishing process, the polishing effect of the edge of the wafer can be controlled more accurately, and the polishing consistency of the surface of the whole wafer is guaranteed.

The invention provides an etching parameter adjusting method and device in MOSFET chip production, and relates to the technical field of semiconductors, and the method comprises the steps: obtaining plasma density distribution data and an etching rate monitoring value of a wafer surface, and dynamically dividing the wafer surface into a plurality of segment independent control units; adjusting a radio frequency power distribution weight, and synchronously adjusting a reaction gas injection parameter; carrying out coupling analysis on the concentration gradient of the etching by-product and the matching degree of the surface morphology of the wafer; and when the deviation of the target value threshold is detected, temperature compensation and air pressure compensation are carried out. According to the method and the device, the technical problem of poor etching precision of the MOSFET chip caused by non-uniform etching rates of different regions in the etching process is solved, and the uniformity of the etching rates is improved through real-time monitoring and dynamic compensation, so that the etching precision of the MOSFET chip is improved.

The invention discloses a wafer probe mark accurate detection method based on deep learning, and belongs to the field of wafer probe mark detection, and the method comprises the steps: constructing a pin mark image denoising preprocessing network, employing a small target feature protection and enhancement strategy based on HSV color space and local contrast joint adjustment, and carrying out the recognition of a small target feature; denoising and contrast optimization are carried out on the needle mark image; a multi-scene training sample is generated through mosaic splicing and mix fusion; a dense small target enhancement module is introduced into the backbone network to enhance needle mark feature expression, and a multi-scale feature fusion module is arranged in the neck network to extract full-scale features; and establishing an anchor frame optimization system adaptive to the minimum needle mark target, and adopting an optimizer and learning rate collaborative optimization training strategy to realize model adaptive convergence. According to the method, high-precision detection and robust identification of the wafer probe mark can be realized under a complex background, and the detection accuracy and stability are remarkably improved.

The invention discloses a wafer polishing laser interference closed-loop pressure control method, and relates to the technical field of semiconductor manufacturing, and the method comprises the following steps: S1, triggering an automatic measurement program after a ceramic plate and a wafer are overturned; s2, driving a laser interference measuring head to perform non-contact scanning on T2 / T4 point positions of the wafer through a six-axis mechanical arm positioning system to obtain thickness distribution data; s3, fitting the thickness distribution data by adopting a Zernike polynomial to generate a three-dimensional distribution diagram, and calculating a pressure correction amount based on a process dynamic model and a pressure prediction model constructed by a support vector machine regression algorithm; s4, detecting a data outlier in real time through an exception handling module, and triggering an equipment protection strategy when the deviation exceeds a set threshold value; and S5, a pressure control instruction is transmitted to the polishing head through the PROFINET bus by means of the PLC. Through non-contact laser interference measurement, the laser interference technology is applied to thickness detection of the polished wafer for the first time, the single measurement time is shorter than 20 seconds, and the detection efficiency is remarkably improved.

The invention provides a wafer carrying device for a vertical furnace, and belongs to the technical field of wafer carrying. In order to solve the problem that an existing wafer carrying device is low in carrying efficiency, the wafer carrying device for the vertical furnace comprises a box opening platform, a first carrying mechanism, a transfer platform and a second carrying mechanism which are connected in sequence. Rapid box opening operation of wafer boxes is achieved through the box opening platform, and the first carrying mechanism can carry the wafer boxes to at least one transmission channel and a plurality of storage stations of the transfer platform firstly, so that the same batch of wafer boxes can rapidly flow between the box opening platform and the transfer platform; and at least one transmission channel can continuously transmit the wafer boxes, so that the second carrying mechanism can rapidly carry the wafers between the transmission channel and the vertical furnace, redundant wafer boxes can be directly stored on the multiple storage stations, the carrying process is simplified, and the carrying efficiency is improved.

The invention relates to the technical field of semiconductor chips, in particular to a semiconductor chip flushing device and a cleaning method thereof.The semiconductor chip flushing device comprises a cleaning table, a cleaning frame is arranged on the inner wall of the middle of the cleaning table, the cleaning table comprises a cleaning water recycling box, and the rear side of the cleaning water recycling box is fixedly connected with a U-shaped vertical plate; according to the wafer cleaning device, the cleaning table and the cleaning frame are arranged, rapid cleaning of wafers is achieved, one wafer is flushed while the other wafer is pre-flushed through circulating water, the cleaning efficiency is effectively improved, the cleanliness of the surfaces of the wafers is ensured, in addition, the cleaning efficiency is improved, and the cleaning efficiency is improved. According to the device, through the design of the transmission mechanism, the orientation of the wafer is rapidly switched, the overall working efficiency is further improved, meanwhile, through the recycling design of cleaning water, water resources are saved, the production cost is reduced, and the concept of green production is met.

The invention relates to the technical field of real-time inhibition of wafer cutting cracks, in particular to a real-time inhibition method and system for wafer cutting cracks based on multi-modal sensing, the system is provided with an acoustic emission sensor and a thermal infrared imager in a cutting area for collecting acoustic emission signals and temperature signals in the cutting process, and the real-time inhibition of the wafer cutting cracks based on the multi-modal sensing is realized by processing the signals. Extracting an acoustic emission characteristic curve and a temperature change value; the characteristics are utilized to construct a two-way long-short-term memory neural network model, the crack risk in the wafer cutting process is predicted, and according to the predicted crack risk, the system adaptively adjusts cutting parameters, such as the cutting speed and the fretsaw tension, so that real-time inhibition of cracks is realized. According to the method, through multi-modal sensing fusion, more comprehensive cutting state perception is provided, early symptoms of crack formation can be captured, and a reliable basis is provided for accurate prediction of crack risks.

The invention is suitable for the technical field of filters, and particularly relates to a manufacturing method of a linear gradient filter and the linear gradient filter. The manufacturing method of the linear gradient filter comprises the following steps that a glass wafer serves as a substrate, and a lower reflecting layer is plated on the surface of the glass wafer; wherein the lower reflecting layer is formed by alternately stacking a plurality of layers of low-refractive-index materials and a plurality of layers of high-refractive-index materials; coating a resonant cavity layer on one side, far away from the glass wafer, of the lower reflecting layer through a stepped coating process; plating a reflecting layer on one side, far away from the glass wafer, of the resonant cavity layer; and plating a long-wave-pass layer on one side, far away from the glass wafer, of the upper reflecting layer and in an area larger than the central wavelength to obtain the linear gradient filter. Compared with the prior art, the linear gradient filter provided by the invention is better in spectral resolution in a long wave band, smaller in energy difference of channels, excellent in wavelength selection performance and capable of being applied to spectrum applications such as a miniaturized infrared spectrometer and the like.

The invention relates to the technical field of semiconductor manufacturing, in particular to a wafer pre-alignment device and method, and the device comprises a mounting platform, an XY motion platform, a rotating platform, a suction cup, and an edge detection assembly. The method comprises the steps of device correction, coarse scanning and circle center positioning, fine scanning and notch accurate positioning and alignment execution. Through software and hardware cooperation, online self-correction is used for eliminating system errors, high-order fitting and feature screening algorithms are used for restraining random errors and model errors, the repeated positioning precision, notch orientation precision and equipment consistency of the wafer pre-alignment device are improved, and the high-precision requirement for a wafer transmission system under the advanced manufacturing process can be met.

The invention provides a pressure sensor based on silicon-silicon bonding and a preparation method thereof. The preparation method comprises the following steps: providing a low-resistance silicon wafer, forming a silicon deep hole in a first surface of the low-resistance silicon wafer, and depositing an isolation material in the silicon deep hole to form an isolation ring; etching the first surface to form a shallow groove and a conductive silicon column to obtain a low-resistance cap wafer; providing an SOI wafer, performing ion implantation on the first surface of the SOI wafer to form a resistance region, and obtaining a substrate wafer; bonding the low-resistance cap wafer with the substrate wafer; grinding the second surface of the low-resistance cap wafer until the isolating ring is exposed; depositing an insulating layer on the second surface of the low-resistance cap wafer, and forming a metal electrode on the insulating layer; and forming a back cavity structure on the second surface of the substrate wafer, exposing the top silicon of the SOI wafer, and forming a sensitive film layer. The conductive silicon column is made of low-resistance silicon, copper ion pollution is avoided, the preparation process is simple, and the period is controllable; the device obtained based on the silicon-silicon bonding process has high bonding strength and high air tightness.

The invention provides a wafer back surface and edge detection device which comprises a base, and a rotary lifting module, a clamping lifting module, a motion direction conversion module and a visual detection module which are mounted on the base, the rotary lifting module comprises a rotary mechanism and a lifting mechanism; a supporting part for placing a wafer is arranged in the lifting mechanism, and the lifting mechanism is configured to jack the wafer up / down to a working position; the rotating mechanism is configured to provide a circumferential direction movement trend for the movement direction conversion module; the motion direction conversion module is arranged above the rotary lifting module and the clamping lifting module, and is driven by the clamping lifting module to realize displacement in the vertical direction, and the lifting motion of the clamping lifting module is converted into radial displacement of the motion direction conversion module; and the visual detection module comprises a camera unit, the camera unit faces the wafer, and the visual detection module is configured to perform image acquisition and detection on the wafer.

The invention provides a wafer film thickness measuring method and device and chemical mechanical polishing equipment, the wafer film thickness measuring method comprises the following steps: a measuring spectrum and an interference spectrum are obtained, the measuring spectrum is formed by measuring light, and the interference spectrum is formed by reflected light after the measuring light is reflected by a wafer; calculating a correction coefficient according to the measured spectrum, and correcting the interference spectrum according to the correction coefficient; calculating a reflectivity curve of the wafer according to the corrected interference spectrum; and determining the film thickness of the wafer according to the reflectivity curve. According to the wafer film thickness measurement method, the influence of measurement noise on an interference spectrum is eliminated, the control precision of the wafer surface quality is improved, and the chip manufacturing yield is further improved.