386 results about "Integrator" patented technology

The invention relates to an integrator circuit for eliminating thermal noise and a Delta-sigma modulator, and belongs to the technical field of electronic signal processing, the modulator comprises at least two stages of integrators, a quantizer, a feedback DAC and an adder; the integrator comprises an integrator circuit, and the integrator circuit comprises a sampling module for sampling an input signal source; the double-path multi-phase clock control pre-amplification auxiliary storage circuit module alternately samples and stores thermal noise voltage and offset voltage; the integral amplifier is used for amplifying a signal output by the double-path multi-phase clock control pre-amplification auxiliary storage circuit module; and the integrating capacitor is connected between the integrating amplifier and the two-way multi-phase clock control pre-amplification auxiliary storage circuit module, and feeds back the signal after integration processing to the two-way multi-phase clock control pre-amplification auxiliary storage circuit module to realize signal modulation and noise shaping. The thermal noise introduced in the sampling process is effectively reduced, and the area of the whole chip is reduced while the signal-to-noise ratio is improved.

The invention discloses a six-degree-of-freedom multi-spacecraft control experiment platform and method based on semi-physics-virtuality, belongs to the technical field of spacecraft system and control system simulation, and constructs a multi-spacecraft system composed of semi-physics spacecrafts and pure virtual spacecrafts. The attitude of the semi-physical spacecraft is simulated by a simulator mounted on a three-dimensional attitude air floating table, is acquired by a sensor and is converted into a rotation matrix form, and a translation part of the semi-physical spacecraft is virtually calculated through a simulation integrator; the pose of the virtual spacecraft is virtually simulated by an SE (3) integrator with high-guarantee geometric characteristics; the system takes the ROS as a communication framework, and realizes state and instruction release by adopting a custom message; and ensuring that the time system of each spacecraft is consistent with the real time through a time synchronization mechanism. The platform supports cooperative operation of a semi-physical spacecraft and a pure virtual spacecraft, and has the characteristics of flexible structure, high simulation precision and good expandability.

The invention relates to a ripple suppression PI loop control method, a storage medium and a device, and the method comprises the steps: extracting a frequency doubling component in an inversion power flow based on the filtering and Park transformation of a secondary second-order generalized integrator, determining the reverse compensation amount at each moment based on the frequency doubling component and a battery connected with a DC circuit, and carrying out the control of the ripple suppression PI loop. And finally, based on the sum of the reverse compensation amount at each moment and an original reference current value output by a voltage outer ring on each bridge arm of the DC circuit, determining a current reference instantaneous value after reverse compensation of a current inner ring input to each bridge arm at each moment. According to the method, a pure frequency doubling component with very high dynamic performance and related to ripple information is obtained, then according to the extracted frequency doubling component and battery parameters, the reverse compensation amount used for suppressing ripple in loop control is obtained, and then the reverse compensation amount is accumulated to a voltage outer loop, so that the ripple information is suppressed. Therefore, ripple suppression with good dynamic performance and good suppression effect in loop control is realized.

Disclosed is a system to influence detectability of a target object by machine perception. The system receives input data that includes a representation of the target object and an objective corresponding to reduce detectability or induce a designated detection of that object. The system generates a plurality of candidate adversarial patterns based on the objective for the object. For each candidate adversarial pattern, the system simulates an integration of the target object in a virtual environment across a plurality of sensor modalities. The system evaluates each simulated pattern against a plurality of sensor modalities and calculates a performance metric for each candidate. The system determines whether the metric reaches a predetermined threshold level for the objective. If not, it iteratively adjusts the candidate to converge on an optimized output adversarial pattern. If so, it confirms the pattern as optimized and compiles it for output.

Wireless circuitry can include a radio-frequency amplifier configured to operate in a plurality of different mode, configuration, or bias settings, a power detector coupled to an output of the radio-frequency amplifier, a plurality of power integrators, and a switching circuit having an input configured to receive a measured power level from the power detector and having outputs coupled to the plurality of power integrators. The switching circuit can have a switch state that is adjusted based on a current mode, configuration, or bias setting for the radio-frequency amplifier. The power integrators may be part of multiple power control loops. The power control loops can be coupled to additional switching circuitry activated based at least party on the current mode, configuration, or bias setting and a subsequent mode, configuration or bias setting for the radio-frequency amplifier.

The invention belongs to the technical field of electronic power, and particularly relates to an LCL grid-connected inverter model-free predictive current control system and method based on sampling noise compensation, and the system comprises an inverter main circuit, an LCL filter and a controller. The controller is configured to firstly calculate a current gradient and a voltage gradient according to a collected system operation signal; then, a second-order generalized integrator is used for conducting accurate compensation on sampling noise contained in the gradient; and finally, executing a model-free predictive control algorithm based on the compensated gradient, and preferably selecting an optimal voltage vector through a multi-objective value function integrating inverter side current, capacitor voltage and network side current. According to the method, sampling noise interference is effectively suppressed, the control precision and the anti-interference capability of the system are improved, and stable and efficient operation of the LCL grid-connected inverter can be realized without additional damping.

The invention discloses a deadbeat predictive current control method based on a composite disturbance observer, and belongs to the technical field of dual three-phase permanent magnet motor control. The dual three-phase permanent magnet motor is composed of two sets of stator three-phase windings, and the space phase shift angle is 30 degrees. The method comprises the following steps: establishing a discretized motor model containing total disturbance under a double-dq coordinate system; a composite disturbance observer is designed, and direct current disturbance and alternating current disturbance are synchronously estimated through a second-order disturbance expansion state observer embedded into a generalized integrator; and performing feed-forward compensation by using the disturbance estimation value, and calculating a voltage control quantity in combination with deadbeat prediction. By introducing the second-order disturbance expansion state observer and the generalized integrator, synchronous compensation of direct current disturbance and alternating current disturbance is realized, so that current harmonics are effectively reduced, and the current waveform quality is improved. Meanwhile, complete decoupling of the current control loop and the disturbance suppression loop is realized. In addition, the method still shows high robustness under the condition of motor parameter mismatch.

The invention relates to the technical field of motor insulation state monitoring, and discloses a motor winding turn-to-turn discharge monitoring method and device based on Rogowski coils. The high-pass integrator is matched to carry out integral operation on coil output signals in a centralized mode to obtain high-frequency discharge current data, then fault characteristic quantity is constructed based on the data, the fault position of the motor cable is determined, an independent monitoring module does not need to be configured for each phase of cable, and the single high-pass integrator can complete centralized processing of multi-coil signals. Not only is the use amount of core monitoring parts greatly reduced to reduce the monitoring cost, but also the hardware layout is remarkably simplified to save the installation space, and meanwhile, the data processing nodes are reduced to reduce processor resource occupation, and the problems of high monitoring cost, large space and resource consumption and low monitoring efficiency in the prior art are effectively solved.

An analog frontend architecture for a capacitive pressure sensor. The analog frontend architecture includes a low-noise amplifier unit for low-noise amplification of sensor signals of the capacitive pressure sensor, the low-noise amplifier unit including a first integrator unit and a second integrator unit, the first integrator unit being connected to input terminals of the low-noise amplifier unit, being designed as a boxcar integrator, and being configured to amplify sensor signals of the capacitive pressure sensor according to the boxcar integration technique, and the second integrator unit being connected to output terminals of the low-noise amplifier unit and being configured to integrate the amplified voltage signals of the first integrator unit.

The invention discloses a wide-frequency three-phase phase-locked loop method, which relates to the technical field of three-phase phase-locked loops and comprises an alternating-current signal acquisition and coordinate transformation unit, a double-reduced-order generalized integrator, a frequency-locked loop frequency estimation unit, a double-second-order generalized integrator, a parallel delay signal cancellation filtering module and a phase-locked loop phase estimation unit. A three-phase power grid voltage signal is input into the alternating current signal acquisition and coordinate conversion unit to obtain a two-phase voltage under a static coordinate system; the double-reduced-order generalized integrator and frequency-locked loop frequency estimation unit outputs a three-phase power grid frequency estimation value and carries out feedforward; and the bisecond-order generalized integrator outputs a three-phase power grid positive sequence component, inputs the three-phase power grid positive sequence component into the parallel delay signal cancellation filtering module to filter out a higher harmonic component, and then inputs the three-phase power grid positive sequence component into the phase-locked loop phase estimation unit to output a three-phase power grid phase estimation value. The method can effectively solve the problem that a traditional phase-locked loop is difficult to lock the phase quickly and accurately when the ship microgrid frequency fluctuates in a large range, and improves the phase-locking precision and dynamic performance.

Wireless circuitry can include a radio-frequency amplifier configured to operate in a plurality of different mode, configuration, or bias settings, a power detector coupled to an output of the radio-frequency amplifier, a plurality of power integrators, and a switching circuit having an input configured to receive a measured power level from the power detector and having outputs coupled to the plurality of power integrators. The switching circuit can have a switch state that is adjusted based on a current mode, configuration, or bias setting for the radio-frequency amplifier. The power integrators may be part of multiple power control loops. The power control loops can be coupled to additional switching circuitry activated based at least party on the current mode, configuration, or bias setting and a subsequent mode, configuration or bias setting for the radio-frequency amplifier.

The invention discloses a long-time-domain predictive control and undisturbed switching method for a hybrid system networking converter, and belongs to the technical field of power system control. In order to solve the problems of poor dynamic performance and easy impact of mode switching of a grid construction / grid following converter hybrid system under new energy high-proportion grid connection, the method specifically comprises the following steps: constructing long time domain model prediction current control, replacing a traditional PI current inner loop, performing discrete modeling based on a dq coordinate system, performing double-step prediction compensation delay, and updating reference current through Lagrange extrapolation. The current tracking precision and the harmonic suppression capability are improved; designing an undisturbed switching strategy, unifying an alpha-beta coordinate system and a current control loop, locking a switching angle, synchronizing an initial value of an integrator, and dynamically adjusting reference voltage to ensure that variables are continuous; two strategies are integrated in a hybrid framework, and stable operation and smooth switching under strong / weak power grids and transition working conditions are realized. According to the invention, the total harmonic distortion rate of the grid-connected current is reduced to below 0.85%, and the method has the advantages of no voltage and current impact in switching and enhanced stability and flexibility of the power system.

The invention relates to the field of magnetic suspension motor driving control, and discloses a high-reliability motor commutation method based on same-frequency displacement conversion of a magnetic suspension rotor, and the method comprises the following steps: collecting a multi-channel rotor displacement signal of a magnetic suspension bearing system; carrying out same-frequency positive-sequence component extraction and phase locking calculation to obtain a rotor space angle position estimation value; multiple paths of redundant rotor angular position signals are constructed, and main rotor space angular position signals are generated; executing initial alignment and error correction of a motor rotor angle, and locking an angle compensation value in a closed loop mode based on the waveform change rate of the direct current bus current at the pre-estimated commutation moment; synthesizing the motor commutation angle, and generating a pulse width modulation signal to drive the motor to operate. A magnetic suspension rotor displacement signal is processed through a second-order generalized integrator cascade instantaneous symmetric component method, so that the effect of high signal-to-noise ratio rotor position detection is realized by directly utilizing an existing magnetic bearing displacement sensor under the condition that a Hall element or a photoelectric encoder does not need to be additionally arranged.

A pulse amplitude modulation 4-level (PAM-4) physical layer (PHY) serializer / deserializer (SerDes) receiver is provided. The receiver may include an analog-front-end (AFE) block to receive a transmit signal, an analog-to-digital converter (ADC) block to convert the transmit signal into a digital signal at sampling intervals defined by a sampling clock signal, a clock and data recovery (CDR) circuit to receive the digital signal from the ADC block and extract a recovered clock signal and a recovered data stream, the recovered data stream containing a sequence of symbols with amplitude values corresponding to four levels of PAM-4, a phase integrator (PI) to generate the sampling clock signal for the ADC block based on the recovered clock signal, and a feedforward phase correction (FFPC) block to receive the recovered data stream and generate a receive signal.

The invention belongs to the related technical field of automatic control, and discloses an active-disturbance-rejection control method and device for dynamic trajectory tracking, and the method comprises the steps: (1) calculating a system tracking error between an output signal of a controlled object and a reference trajectory, and building an error dynamic equation of the system tracking error; (2) reconstructing the error dynamic equation into an integrator cascade standard form through composite lumped disturbance, and regarding the composite lumped disturbance as a to-be-estimated expansion state of the integrator cascade standard form; (3) designing a tracking and guiding type extended state observer, and estimating the extended state vector in real time and outputting a corresponding estimated value by the tracking and guiding type extended state observer by taking a system tracking error and a control input signal as input; and (4) designing a compensation control law based on the obtained estimated value to generate a control input signal, and stabilizing an error system corresponding to the integrator cascade standard form by using the control input signal. According to the method, the problem of target non-equivalence is fundamentally solved.

A controller for generating a control parameter of a feedback system may include a proportional path comprising a first selector configured to select one of a plurality of proportional signals to generate a proportional path output, where each of the proportional signals is based on a respective one of a plurality of error signals, each of the plurality of error signals is associated with a respective adjustment physical quantity; an integration path comprising: a second selector configured to select one of a plurality of integrated signals as a second selector output, where each of the integrated signals is based on a respective one of the plurality of error signals, and a single integrator configured to accumulate consecutive samples of the second selector output to generate an integration path output; and combiner logic configured to combine the proportional path output and the integral path output to generate a control parameter.

An audio amplifier that implements current mode control without the use of an explicit or separate current mode sensor is disclosed. The audio amplifier may include a pair of feedback loops that provide current from a node located before an inductor of an output filter and current from a node located after the inductor of the output filter to an integrator circuit. The integrator circuit may be formed from existing circuitry of the audio amplifier controller. Thus, current mode control can be implemented without a separate current mode sensor. Further, the audio amplifier can be implemented as a half bridge or as a full bridge design without increasing the number of operational amplifiers compared to the half bridge.

A modulator circuit may include an integrator circuit and a gain compensation circuit. The integrator circuit may include a first amplifier including an input to receive a signal and an output to provide an inverted signal and a capacitor including a first terminal coupled to the input and a second terminal coupled to the output. The gain compensation circuit may include a second inverter amplifier including a gain input coupled to the output of the first amplifier and including a gain output; a first resistor including a first terminal coupled to the gain output and including a second terminal; and a second capacitor including a first terminal coupled to the second terminal of the first resistor and including a second terminal coupled to the gain input. The integrator circuit has a finite DC gain and the gain compensation circuit is configured to compensate for the finite DC gain.

A method for operating a fluid system, which has a control device with a control functionality and a piezoelectric valve assembly that can be controlled by the control device. The method involves the following steps: providing a target working pressure at the working connection, measurement of the actual working pressure at the working connection by the pressure sensor, transmitting the measurement data to the control device and applying the algorithm to compare the actual working pressure with the target working pressure, activating the at least one integrator to integrate the control deviation of the control voltage (=offset voltage) after the actual working pressure is constant over a certain time period, and changing the control voltage as a function of the determined target / actual deviation taking into account the integrator operation.

A calibration unit for a sampling system, a sampling system and a method for sampling. The calibration unit for a sampling system includes an oscillator having a number of cycles, a digital counter configured to capture a count value that is representative of a time duration to complete the number of cycles, a digital integrator configured to accumulate a difference between a predetermined count value and the captured count value, and a digital to analog converter (DAC) configured to translate an output from the digital integrator to an analog input for delay cells in the sampling system.

The invention discloses an integrator resetting method and device under flexible direct current partition co-frequency control and a medium, and relates to the technical field of co-frequency control, and the method comprises the steps: obtaining an output value of an integrator in a co-frequency control module; when the output value is saturated, judging whether a target parameter meets a reset starting condition within a target delay duration or not; and if yes, reducing the output value of the integrator at a target rate until a reset ending condition is met. According to the method, the output value of the integrator can be automatically and smoothly reset after the disturbance is relieved, so that the transmission capacity of the flexible direct current is released, the flexible direct current can respond to the subsequent disturbance at any time, and the utilization efficiency and the operation flexibility of regulation and control resources of a power system are improved.

A circuit and method for measuring an average current of a solenoid valve, relating to the technical field of automotive electronics. The circuit comprises a solenoid valve (110), a first power supply (120), a sampling resistor, a field effect transistor drive circuit (130), a current acquisition circuit (140), an integrator circuit (150), and an integration reset circuit (160); the field effect transistor drive circuit (130) is used for controlling an on-off state of a first field effect transistor on the basis of a pulse width modulation gating signal; the first power supply (120) is used for providing a drive current for the solenoid valve (110) when the first field effect transistor is in an on state, and the drive current flows through the sampling resistor; the current acquisition circuit (140) is used for sampling voltage signals on two sides of the sampling resistor, and outputting the voltage signals to the integrator circuit (150); the integrator circuit (150) is used for performing integration processing on the voltage signals, and determining an average current of the solenoid valve (110) on the basis of an integration result; and the integration reset circuit (160) is used for performing periodic reset processing on the integrator circuit (150) on the basis of the pulse width modulation gating signal.

The application discloses a self-disturbance rejection control method and system based on an error compensation type extended state observer, and the method comprises the following steps: a linear self-disturbance rejection controller acquires input signals and each output state of an extended state observer, and outputs a first control signal; the linear self-disturbance rejection controller acquires input signals and each output state of the extended state observer, and outputs the first control signal; an estimation error model of the extended state observer for output displacement is constructed, a controlled object is converted into an integrator series type form, and an output displacement signal is obtained based on the controlled object; the output displacement signal and a control input signal are input into the extended state observer, and each output state is obtained; and then the linear self-disturbance rejection controller and the output displacement model are fed back. The estimation capability of the observer is greatly improved without increasing the bandwidth of the observer; the error compensation type disturbance observer is combined with the self-disturbance rejection control, and the tracking performance of the self-disturbance rejection control is further improved.

The application belongs to the technical field of integrated circuits, and discloses a circuit structure for one-step solution of linear equations based on a memristor array, wherein the linear equations are Ax=b, and in the circuit, a first memristor array matrix operation core realizes mapping of the matrix A, takes a negative value of a first operation voltage vector as a bit line voltage, performs a matrix multiplication operation, reads a word line current as a first operation current vector after the operation, a bias mapping module maps b into a bias current vector, a current superposition module superimposes the first operation current vector and the bias current vector to generate a superimposed current vector, and converts the superimposed current vector into a second operation voltage vector through a transimpedance amplifier module, a second memristor array matrix operation core realizes mapping of the matrix A, takes the second operation voltage vector as a bit line voltage, performs a matrix multiplication operation, reads a word line current, and performs an integral operation on the word line current through an integrator module to obtain an updated first operation voltage vector. T The above hardware circuit can realize solution of the linear equations.

The application discloses a kind of anti-rising sine tracking differential devices and methods, by first subtracter to input signal and the output signal of second integrator carry out subtraction operation, the output result of subtracter is input to first integrator and is integrated, and the output result of first integrator is input to second integrator and is integrated;By delay ware to the output result of second integrator is delayed, the output result of first integrator and input signal are input to second subtracter and carry out subtraction operation, and the output result of second subtracter and the output result of second integrator after time delay are transmitted to third subtracter and carry out subtraction operation, obtain anti-rising sine tracking differential signal.The application subtracts the sum of first integration result and second integration result after time delay from input signal, can improve the cut-off speed of output differential signal, improves the tracking efficiency of differentiator.

The application discloses a time delay control method and system based on an error compensation type extended state observer, which comprises the following steps: a time delay controller acquires input signals and each output state of a tracking differentiator, and outputs a first control signal; an estimation error model of a displacement is constructed for an extended state observer; based on the first control signal, a total disturbance signal and an estimation error of the extended state observer, a controlled object is converted into an integrator series type form, and a displacement signal is output based on the controlled object; the displacement signal is input into the tracking differentiator to obtain real-time estimation values of each state of a nano-positioning stage; and the real-time estimation values of each state are fed back to the time delay controller. By introducing the extended state observer, the application solves the problem that the stability of a control system is easily affected by the uncertainty of a control input matrix; by introducing the tracking differentiator, the application solves the difficult problem that high-order system states and their derivatives required by time delay control are not easy to obtain.

An example apparatus includes: alternating current (AC) source circuitry having an input and an output; comparator circuitry having an input and an output, the output of the comparator circuitry coupled to the input of the AC source circuitry; integrator circuitry having an output of the integrator circuitry coupled to the input of the comparator circuitry; and a capacitor having a first terminal and a second terminal, the first terminal of the capacitor coupled to the output of the AC source circuitry, the second terminal of the capacitor coupled to the integrator circuitry.

The application discloses a frequency modulation rate variable laser linear frequency modulation device and a frequency modulation method thereof. The device comprises a wideband tunable laser, a micro-optical lens, a beam splitter, an adjustable optical delay unbalanced MZ interferometer, a balanced photodetector, a phase discriminator, a loop filter, an up / down switch control circuit and an integrator. The adjustable optical delay unbalanced MZ interferometer comprises two couplers and an adjustable optical fiber delay line unit. According to the relationship between the linear frequency modulation light frequency and time of the upper and lower arms of the interferometer, when the delay amount of the adjustable optical fiber delay line unit changes, the frequency modulation rate of the output laser can be changed. The application changes the time delay of the light by using the adjustable optical fiber delay line, so that the frequency modulation rate can be changed.

The application discloses a kind of secondary steam temperature process signal differential control method and system, utilize first subtracter to carry out subtraction operation to secondary steam temperature process signal and the second integrator output second integral signal, obtain feedback output signal;Utilize first integrator to integrate feedback output signal, obtain first integral signal;Utilize second integrator to integrate first integral signal, obtain second integral signal;Utilize first addition module to process first integral signal, obtain first superimposed signal;Second superimposed signal is obtained by using second addition module to process second integral signal;Utilize second subtracter to subtract first superimposed signal and second superimposed signal, obtain first subtraction signal, utilize fixed proportion controller to obtain fixed proportion control signal;Utilize third adder to superimpose secondary steam temperature process signal and fixed proportion control signal, obtain fixed proportion fastest tracking differential signal.The embodiment of the application provides a kind of secondary steam temperature process signal differential control method and system, improve the output tracking input differential tracking efficiency of secondary steam temperature process signal.

A touch detection circuit, a touch sensing chip and an electronic device are disclosed. The touch detection circuit includes: a charge / discharge circuit, a 1st-order N-bit ΔΣADC comprising an adder, an integrator, an N-bit ADC and an N-bit DAC, the adder comprising two input terminals coupled respectively to an output terminal of the charge / discharge circuit and an output terminal of the N-bit DAC, the N-bit DAC comprising an input terminal coupled to an output terminal of the N-bit ADC, wherein the integrator is configured to integrate net incoming charge that the integrator receives; the N-bit ADC is configured to quantize an output of the integrator into an N-bit digital signal; the N-bit DAC is configured to provide subtractive reference charge according to the instruction of the N-bit digital signal; and the adder is configured to derive the net incoming charge by subtracting the subtractive reference charge from the sense charge.