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233results about How to "Reduce demand" patented technology

Congestion and thru-put visibility and isolation

Offering vertical services to subscribers and service providers is an avenue to immediately improve the competitiveness of digital subscriber line access service, for example of the type offered by a local exchange carrier. To deliver high-quality vertical services, however, the underlying ADSL Data Network (ADN) or the like needs to establish Quality of Service (QoS) as a core characteristic and offer an efficient mechanism for insertion of the vertical services. The inventive network architecture introduces QoS into the ADN, in a manner that enables the delivery of sophisticated and demanding IP-based services to subscribers, does not affect existing Internet tiers of service, and is cost-effective in terms of initial costs, build-out, and ongoing operations. The architecture utilizes a switch capable of examining and selectively forwarding packets or frames based on higher layer information in the protocol stack, that is to say on information that is encapsulated in the layer-2 information utilized to define normal connectivity through the network. The switch enables segregation of upstream traffic by type and downstream aggregation of Internet traffic together with traffic from a local services domain for vertical services and other local services. Systems coupled to the local services domain alone or in combination with software in servers and/or a user's computer enable a testing of connectivity, throughput, QoS metrics and the like through selected points of the ADN network.
Owner:RAKUTEN GRP INC

Method for storing diagonal data of sparse matrix and SpMV (Sparse Matrix Vector) realization method based on method

InactiveCN102141976AReduce demandReduce memory access overheadComplex mathematical operationsCompilerArray data structure
The invention discloses a method for storing diagonal data of a sparse matrix and a SpMV realization method based on the method. The storage method comprises the following steps of: (1) scanning a sparse matrix A line by line and representing a position of a non-zero-element diagonal by using number of the diagonal; (2) segmenting the matrix A into a plurality of sparse sub-matrixes by using an intersection of the non-zero-element diagonal and the lateral side of the matrix A as a horizontal line; and (3) storing elements on the non-zero-element diagonal in each sparse matrix to a val array according to the line sequence. The SpMV realization method comprises the following steps of: (1) traversing the sparse matrixes and calculating vector multiplier y=A1*x of the sparse matrix in each sparse sub-matrix; and (2) merging the vector multipliers of all sparse sub-matrixes. The data storage method disclosed by the invention is not required to store row indexes of the non-zero elements, thereby reducing access expense and requirements on a storage space; a smaller storage space is occupied by the diagonal and the index array of the x array, so that the access complexity is reduced; andall the data required for calculation are continuously accessed, so that a complier and hardware can be optimized sufficiently.
Owner:INST OF SOFTWARE - CHINESE ACAD OF SCI

Multiplex JTAG (Joint Test Action Group) interface-based FPGA (Field Programmable Gate Array) on-chip logic analyzer system and method

ActiveCN102541707AReduce demandReduce the number of output pinsLogical operation testingSignal onHuman–machine interface
The invention discloses a multiplex JTAG (Joint Test Action Group) interface-based FPGA (Field Programmable Gate Array) on-chip logic analyzer system and method, which relate to field programmable gate array technology, are used for realizing debug and observation of an internal signal of an FPGA, and mainly comprise a multiplex JTAG interface, an on-chip logic analyzer circuit and a human-computer interface module, wherein the on-chip logic analyzer circuit can be used for selecting different sampling signals on line; and the human-computer interface module is used for receiving sampling signals and triggering states simultaneously. The multiplex JTAG interface-based FPGA on-chip logic analyzer system and method have the beneficial effects that: a method for utilizing the multiplex JTAG interface to realize the on-chip logic analyzer system is provided, and the sampling signals are selected on line, so that the requirement of the on-chip logic analyzer system for on-chip sampling storage resources is reduced, wherein the required storage resource quantity is inversely proportional to the number of sampling signal groups; and a method capable of realizing time division transmission of the sampling signals and triggering state information of JTAG is provided, so that the efficiency for debugging the FPGA is improved.
Owner:INST OF ELECTRONICS CHINESE ACAD OF SCI

Automatic software project development all-link configuration management system

The invention relates to an automatic software project development all-link configuration management system. The system comprises a version management system, an optional template project, a continuous project building system, a project deploying system, a public service resource system and an automatic operation and maintenance management system, wherein the version management system is used for managing the historical versions, branches and labels of codes; the optional template project is used for generating the basic codes of a new project; the continuous project building system is used for continuously monitoring the version change of a code library, automatically executing unit testing and generating a testing report; Maven is used to compile source codes and generate a release package; the project deploying system is used for pre-generating a container template according project capacity requirements and deploying a container instance according to the project release package; the automatic operation and maintenance management system is used for controlling all flow nodes and calling the interfaces of each subsystem to generate or acquire necessary resources. By the system, automatic configuration and management of the whole life cycle of a project are achieved, project configuration and management is clear and ordered, and enterprises can be helped to save cost.
Owner:上海宝尊电子商务有限公司

Image frequency rejection frequency mixer structure for terahertz wave band

ActiveCN105390783AReduce size and complexityReduce demandWaveguide type devicesMulti-frequency-changing modulation transferencePhase shiftedPhysics
The invention belongs to the technical field of terahertz devices, and provides an image frequency rejection frequency mixer structure for a terahertz wave band. The image frequency rejection frequency mixer structure includes an E-plane rectangular waveguide Chinese character 'tian'-shaped branch wire bridge 3dB directional coupler, micro-strip waveguide double probes, two frequency mixers, and a power combiner. A radio-frequency signal can generate two-channel radio-frequency signals with an equal amplitude and a 90-dgress phase difference via the E-plane rectangular waveguide Chinese character 'tian'-shaped branch wire bridge 3dB directional coupler, and the two-channel radio-frequency signals are input into two-channel frequency mixers respectively; a local oscillation signal can generate two-channel signals with an equal amplitude and a same phase via micro-strip waveguide double probes, and the two way signals are input into the two-channel frequency mixers respectively; two-channel frequency mixer intermediate frequency output signals are combined via the power combiner, and then are output; and each input end of the power combiner is provided with a 90-deree phase shifter for allowing the corresponding frequency mixer intermediate frequency output signal to generate a 90-degree phase shift, so that the two-channel frequency mixer intermediate frequency output signals are stacked in phase and output. The image frequency rejection frequency mixer structure is simple in structure and is applied to the terahertz wave band.
Owner:UNIV OF ELECTRONIC SCI & TECH OF CHINA

Power supply converter with controllable current peak inhibition protection

ActiveCN102368663AReduce demandReduce peak starting currentDc-dc conversionElectric variable regulationShort circuit protectionConstant power circuit
The invention discloses a power supply converter with controllable current peak inhibition protection. According to the invention, a direct current input signal successively passes through an input filter circuit, a main power circuit and an output filter circuit and then the direct current input signal is output; after a voltage stabilizing circuit samples a direct current output signal, an output sampling signal carries out negative feedback control on a main switch tube in the main power circuit through a driving control circuit; a soft start circuit is arranged to connect between the input filter circuit and the driving control circuit; and an output short circuit protection circuit is arranged to connect a negative feedback winding of a transformer in the main power circuit and the driving control circuit. Besides, a current peak inhibition protection circuit is also arranged; an output terminal of the current peak inhibition protection circuit is connected to a joint between the voltage stabilizing circuit and the driving control circuit; and when the power supply converter is started, the current peak inhibition protection circuit outputs a monopulse signal that is used for replacing the voltage stabilizing circuit to work, wherein the amplitude and the time of the monopulse signal are controllable; and after the power supply converter works normally, the current peak inhibition protection circuit acts as being in a disconnection state.
Owner:MORNSUN GUANGZHOU SCI & TECH

Blast furnace injection material

InactiveCN101899343AAlleviate needsReduce demandSolid fuelsBlast furnace detailsMetallurgical cokeCast iron
The invention relates to a blast furnace injection material which is prepared in steps of preparing candle coal or noncaking coal into a lumpiness of 10-100 mm, carrying out carbonization in a carbonization furnace at 600-700 DEG C for 24 hours, classifying and processing the coal after the carbonization, and selecting powder of which the particle size is less than 5 mm as the blast furnace injection material. The invention lowers the blast furnace ironmaking coke ratio and the cast iron cost; can regulate the thermal system of the furnace, improve the operating state of the blast furnace hearth and ensure the stable and smooth operation of the blast furnace; and reduces the theoretical combustion temperature and creates conditions for realizing high-wind temperature and oxygen-enriched blast of the blast furnace. Compared with the gasification of coke, the gasification of injection coal powder discharges more hydrogen, thereby enhancing the reducibility and the penetration diffusivity of the gas and being beneficial to the improvement on ore reduction and blast furnace operation indexes. Metallurgical coke is replaced by the injection coal powder partially, thereby moderating requirements for the coke, decreasing coking facilities and saving the investment of capital construction. Besides, the invention decreases coke furnaces and produced coke and reduces the environmental pollution caused by coking production, and simultaneously, and powder generated in the semicoke production can be fully utilized.
Owner:杨兴平

Nanometre spraying device and method thereof for realizing high-load CPU enhanced heat dissipation function

The invention relates to a nanometre spraying device and method thereof for realizing a high-load CPU enhanced heat dissipation function, belonging to the field of research of internal combustion engines. The nanometre spraying device comprises a PCB, a CPU, a thin copper plate, a condenser pipe, a spraying cavity, a cooling liquid tank, a filter, cooling liquid, an effect mechanism and a controller; when a CPU thermistor on the PCB monitors that the temperature of the CPU is beyond a limit value, a nozzle is opened; cooling liquid fog droplets are sprayed on the thin copper plate on the surface of the CPU; heat on the surface of the CPU is taken away through film boiling heat exchange and forced-convection heat exchange; after being congealed on the condenser pipe, steam flows down along the wall surface and enters a radiator through a cooling liquid recovery hole, such that steam flows back into the cooling liquid tank; a more effective and energy-saving heat dissipation manner is provided for high-power equipment; the heat conductivity coefficient of the cooling liquid is increased by adding nano-particles into the cooling liquid; therefore, the heat dissipation efficiency of the device is further increased; all the adopted components are micro-equipment; the power consumption is low; but, the heat dissipation effect is high; therefore, a lot of electricity can be saved; and the nanometre spraying device and method disclosed by the invention have an important meaning in the energy-saving and environment-friendly aspects.
Owner:泰州市海创新能源研究院有限公司

Air liquefaction and separation method and device

Disclosed are a method and a device for liquefying and separating air, the price of a device used when fluid products are collected can be reduced. The method for liquefying and separating air is comprised of a raw material air compressing process wherein a compressed raw material air having a first setup pressure higher than the operating pressure of an intermediate pressure tower is obtained by compressing the entire amount of a raw material air, an absorbing and purifying process wherein a compressed and purified air is obtained by removing impurities from the compressed raw material air, a circulation air confluence process wherein a circulation air is obtained by joining the compressed and purified air and a compression returned air together, a cooling process wherein an air to be introduced to the intermediate pressure tower is obtained by cooling a first branch current air obtained by dividing the circulation air into two branch currents, so as to have a first setup temperature, and an air to be expanded is obtained by cooling a second branch current air so as to have a second setup temperature higher than the first setup temperature, an expansion process wherein a low-temperature air is obtained by adiabatically expanding the air to be expanded so as to have a second setup pressure lower than the first setup pressure, a process for introducing a part of the low-temperature air to the intermediate pressure tower, a temperature increasing process wherein a returning air is obtained by returning the temperature of the remaining low-temperature air, a circulating and compressing process wherein a compressed returning air is obtained by compressing the returning air, and a process for introducing the air to be introduced to the intermediate pressure tower to the intermediate pressure tower.
Owner:TAIYO NIPPON SANSO CORP
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