297 results about "Gigabit" patented technology

The invention belongs to the technical field of Ethernet high-speed interconnection, and provides a high-speed low-delay 10-gigabit switching method and system based on an FPGA, and the method comprises the steps: receiving Ethernet data frames, storing effective data frames in a data caching module, and generating a caching write-in address and a control signal; reading a destination address, a source address and a type field of the analyzed data frame from the data caching module, and updating a forwarding address table through a dynamic learning mode or a preset mode; based on the updated forwarding address table, a three-level assembly line framework is adopted to complete address searching; reading the data frame from the cache according to the forwarding decision, repackaging the Ethernet header information and the check code, and controlling the sending standard rate; and meanwhile, the sending rate is dynamically adjusted, and VLAN division, port rate and queue scheduling parameters are optimized in combination with an external configuration command. According to the invention, the onboard processor is utilized to cooperate with the FGPA to realize the fast search of the forwarding table, the residence time of the data packet in the switching unit is reduced, and the operation efficiency of the side application is improved.

The invention relates to a video acquisition and transmission method and device for converting a 10-gigabit network into a PCIe (Peripheral Component Interconnect Express) interface. The method comprises the following steps: receiving a video stream through a double 10-gigabit network optical module, carrying out protocol analysis and preprocessing through an FPGA (Field Programmable Gate Array), realizing multi-path alternate reading and writing by utilizing DDR3 ping-pong cache, dynamically distributing the video stream to multiple devices through a three-path PCIe 3.0 * 4 interface and an XDMA (Extensible Direct Memory Access), and optimizing the transmission priority in combination with a load state. The device comprises two paths of SFP + optical modules, a Xilinx Virtex7 series FPGA chip (integrated with a 10-gigabit network MAC, a PCIe XDMA IP core and a DDR3 controller), three paths of PCIe 3.0 * 4 interfaces and an external DDR3 memory. The system has the advantages that the double 10-gigabit network input and multi-PCIe channel collaborative architecture breaks through the single-channel bandwidth bottleneck; the intelligent ping-pong cache and the AXI arbitration strategy reduce the data conflict risk; and dynamic bandwidth allocation optimizes real-time performance.

The invention discloses an uplink subsystem complexity reduction method based on a PCMA technology, and relates to the technical field of high-capacity wireless transmission system design and complexity control, and the method comprises the following steps: collecting uplink signal parameters through spectrum analysis, bit error rate test and MIMO detection, obtaining channel characteristics through a pilot frequency and a Gray sequence, and obtaining the complexity of a high-capacity wireless transmission system; baseband data are generated, scene features are extracted, Wiener filtering and iterative soft decision feedback algorithms are adopted to optimize filtering and coding, channel and coding performance is evaluated, transmission strategies are dynamically adjusted through a gigabit network interface, clocks are unified, synchronization is optimized, and the complexity of a PCMA uplink system is reduced. The complexity of an uplink subsystem is effectively reduced through the PCMA technology, the efficiency and the stability of a high-capacity wireless transmission system are improved, efficient utilization of resources and improvement of synchronization precision are achieved by accurately collecting signal parameters, optimizing filtering and coding and dynamically adjusting a transmission strategy, and the method is suitable for large-scale popularization and application. And powerful support is provided for the development of a wireless communication system.

The invention relates to a 10-gigabit photoelectric composite cable for communication. The 10-gigabit photoelectric composite cable comprises a first coating station, a second coating station and a performance testing station which are sequentially arranged in the cable transmission direction. The first coating station is provided with a first protection mechanism used for installing the armor on the inner layer of the composite cable. The second coating station is provided with a second protection mechanism used for installing and fixing water absorption particles. The performance test station is provided with a detection mechanism used for cooling the cable and detecting the integrity of the outer layer of the composite cable. By arranging the first protection mechanism and the second protection mechanism, the technical problems that the cable armor layer is prone to dislocation and the damaged position cannot be quickly found after the cable is damaged are solved.

The invention discloses a rail transit multi-system fusion platform, and relates to the technical field of intelligent operation and maintenance of rail transit vehicles, and the platform comprises a fusion platform host, a communication switch, an application system and terminal equipment thereof. The core of the system is that logic functions of all application systems are packaged in an SDK mode, interaction with a fusion platform host is achieved through a unified API interface, computing power sharing of hardware resources such as an AI module and an MPU module in the host is achieved through a 10-gigabit PCIE bus, a SWITCH switch module dispatches data transmission in a unified mode, the independent computing capacity of a subsystem is reserved, and the data transmission efficiency is improved. By means of the framework, the newly-added system does not need to additionally deploy a host, the function can be expanded only by accessing terminal equipment meeting the standard, the limitation that in a distributed framework, hardware needs to be added to the newly-added system is effectively solved, and elastic reuse of the hardware resources is achieved.

The invention provides a method for testing the communication bandwidth of a 10-gigabit network between an FPGA (Field Programmable Gate Array) and a CPU (Central Processing Unit), which is applied to a radar system. The FPGA completes a function of regularly generating data and a function of downlink transmission of the data; the 10-gigabit network exchange board card completes data transmission and sends data to the CPU board card through a 10-gigabit network; and the CPU board card receives the data and calculates the communication bandwidth and the network quality. According to the invention, the limitation of traditional single-port point-to-point transmission or simple multi-port parallel transmission on synchronization, load balancing or protocol overhead is solved, and a solution is provided for how to effectively utilize multiple ports, enable the multiple ports to simultaneously and efficiently work and ensure parallel transmission of data without mutual interference.

The invention discloses a data processing method and device and belongs to the technical field of communication. The method is applied to the flexible Ethernet (FlexE), and the method is applied to the flexible Ethernet (FlexE). The method comprises: receiving an initial data stream sent by a FlexE instance, periodically inserting a filling sequence in the initial data stream to obtain a first data stream, the first data stream comprising the periodically appearing filling sequence, the filling sequence comprising continuous n filling code blocks, and n being an integer greater than or equal to 4. The invention provides a FlexE (FlexE)-oriented method capable of inserting more filling code blocks into a data stream, which can be suitable for PHY (Physical Layer) interfaces with higher rate, such as a 800 gigabit Ethernet (GE) PHY interface, a 1.6 TE PHY interface and the like, and can adapt to the evolution of the Ethernet standard.

The invention provides a satellite-borne basic mirror image and customized mirror image containerization deployment operation system and method, and the method comprises the steps: packaging a fixed basic service to form a basic mirror image, such as a satellite-borne hardware drive program, an AI resource interface program, a storage resource interface program, a telemetering and remote control bus interface program, and a PCIE / 10-gigabit network interface high-speed bus interface program; and subscribing to a distribution interface program among satellites and the like. The customized mirror image uses the basic mirror image through a docker FROM command; the customized mirror image comprises a remote sensing intelligent interpretation AI model mirror image, an inter-satellite cooperative task planning mirror image, a user data issuing broadcast mirror image and the like; the basic mirror image serves as factory software firmware of satellite development, the customized mirror image can be tested without binding during batch production of satellites, the basic mirror image is printed on the sky, and the customized mirror image is subjected to on-orbit programming according to user requirements, or a service operation mirror image is pulled from a space-based private mirror image warehouse.

The invention relates to the technical field of optical network transmission, in particular to a twenty-five gigabit symmetric passive optical network transmission quality improvement method and a related device. The method comprises the steps that PCB routing layout optimization is conducted on an LD + / LD-differential signal line in a transmission link, impedance control over the differential signal line is achieved by adjusting the wiring gap and the wiring width of the LD + / LD-differential signal line and the integrity of a reference layer area, the consistency difference in PCB production is improved, and loss and interference in the signal transmission process are reduced. The PCB layout parameters of the LD + / LD-differential signal line are specifically optimized, the wiring gap is adjusted from 11.49 mi of a reference golden finger bonding pad to 5.75 mi of a reference chip BGA bonding pad, the wiring width is reduced from 20 mi to 10 mi, the integrity of a reference layer area is synchronously optimized, the differential impedance is accurately controlled from original 30 ohms to 60 ohms, and the reliability of the circuit is improved. And the parasitic parameter influence in signal transmission is effectively suppressed.

The invention relates to a remote sensing satellite data automatic distribution method and system, and the method comprises the following steps: S1, receiving and analyzing a data transmission plan issued by a superior, completing the legality detection, and extracting and storing the task parameters of a legal plan; s2, matching corresponding satellite parameter information from pre-stored satellite attribute parameters according to task requirements; s3, state information, including a task execution state, a load state, a hardware operation state and a network flow state, of the distribution equipment is collected, and available equipment resources are dynamically distributed based on the multi-dimensional state data; and S4, a scheduling task is completed by using a satellite ground transmission model, and one-to-one or one-to-multiple target center distribution task automation is realized based on data driving. According to the invention, automatic resource scheduling can be realized according to task information, in-station equipment resources and satellite information to complete a one-to-many data distribution task, and reliable and efficient 10-gigabit network transmission is realized.

The invention discloses a data network interaction system for rail transit data transmission, which relates to the technical field of data transmission and comprises a data acquisition module, an intelligent exchange scheduling module, a real-time processing module and a high-reliability transmission guarantee module. And high-speed and reliable transmission is ensured through a 10-gigabit point-to-point direct connection channel, and meanwhile, continuity is ensured by adopting a redundant link, so that efficient, stable and real-time processing of rail transit data is realized. According to the invention, a high-speed dedicated channel is constructed through direct connection of the 10-gigabit Ethernet, and hierarchical transmission of multi-source data is realized in combination with an intelligent scheduling strategy; meanwhile, hardware-level heartbeat detection and redundant links are deployed, and millisecond-level fault switching is guaranteed; and a dynamic threshold adjustment mechanism is introduced, the reliability and robustness of the system are adaptively optimized, and the high-real-time and high-reliability transmission requirements of rail transit are met.

The invention relates to the technical field of computer secrecy, and discloses a secrecy-related computer secrecy self-supervision detection method based on a gigabit network, which comprises the following steps of: firstly, acquiring communication data and equipment characteristic data through a network flow analysis module, and determining monitoring node division; constructing a detection index set according to the communication data, and determining an abnormal data acquisition strategy by combining monitoring node division; then, acquiring real-time communication data by using an abnormal data acquisition terminal according to a strategy, and identifying a confidentiality risk level and a violation item to obtain detection result data; and finally, the detection result data is transmitted to the supervision control platform according to a self-supervision feedback mechanism for index updating. According to the method, accurate detection and self-supervision of the confidentiality risk of the confidential computer in the gigabit network environment are realized, the confidentiality security is improved, and the method is suitable for the field of confidentiality detection of the confidential computer.

The invention discloses a multiprocessor architecture intelligent adaptive base plate of a nuclear power DCS controller, and relates to the field of nuclear power control, and the base plate comprises a signal processing module which is used for collecting and preprocessing each path of signal and then realizing bidirectional data communication with a core board card main processor; the PCIE network controller expansion module is used for realizing gigabit network interface expansion; the storage module is used for storing data; the redundancy synchronization module is used for realizing redundancy switching and network synchronization of the main controller and the standby controller; the bottom plate power supply system is used for providing voltage; the bottom plate clock system is used for providing time information; the connector is used for connecting the core board card and the backboard; and each peripheral module. Each peripheral module comprises a USB module, a serial port module, a network module, an output driving module, an isolation communication module and a B code circuit module. According to the method, the compatibility can be improved, the complexity and cost of system upgrading are reduced, and the flexibility of technical iteration is improved.

The invention discloses an optical interconnection simulation method and system based on full-link parameter optimization, and the method comprises the steps: processing an original signal based on a coding module, a first feed-forward equalizer and a continuous-time linear equalizer, and obtaining a to-be-processed electric signal; modulating and converting the to-be-processed electric signal into a to-be-sent optical signal through a driving circuit, and sending the to-be-sent optical signal through an optical channel; sensing a to-be-sent optical signal through a photodiode to obtain a to-be-received electric signal, and processing the to-be-received electric signal through a trans-impedance amplifier to obtain a to-be-recovered electric signal; and processing the electric signal to be recovered through an automatic gain control continuous time linear equalizer, a decision feedback equalizer and a second feed-forward equalizer to obtain a target receiving signal corresponding to the original signal. The problem of collaborative optimization of electric-optical-electric link distortion compensation and noise suppression in the high-speed optical interconnection system is solved, and the simulation precision is improved to the transmission scene verification requirement of single wave 200Gbps (the data rate of transmitting 200gigabit bit per second) or above.

The invention provides a data stream processing method for binding a kernel and a network card queue, and relates to the technical field of data stream processing, and the method comprises the following steps: setting the number of queues of each gigabit network card and each 10-gigabit network card as the maximum number of queues supported by each network card and the minimum number of idle CPU (Central Processing Unit) cores; binding each queue of each gigabit network card and each 10-gigabit network card to an idle CPU core; the number of queues of each gigabit network card is set to be the minimum value of the maximum number of queues supported by each gigabit network card and the number of idle CPU cores, and the number of queues of each 10-gigabit network card is set to be the minimum value of the maximum number of queues supported by each 10-gigabit network card and the number of idle CPU cores; enabling each queue to process a corresponding data stream through an idle CPU; according to the invention, the problems of non-intelligent and unbalanced resource allocation and possible configuration failure in a mixed rate network card environment are effectively solved.

The invention discloses an ASIC chip for high-performance AOIP network audio stream transmission, and the interior of the chip comprises a function simulation circuit subsystem, a sensor controller, a clock, and a reset control module. The high-speed peripheral interface subsystem is arranged on the first bus, the hardware acceleration subsystem is arranged on the second bus, the low-speed peripheral interface subsystem is arranged on the third bus, the second bus is connected with the first bus and the third bus, and the function simulation circuit subsystem is connected with the third bus through the sensor controller; the hardware acceleration subsystem comprises a plurality of processor cores, two gigabit or 100M bit medium independent interfaces and a real-time transport protocol RTP transceiving engine; the two gigabit or 100M bit medium independent interfaces are compatible with the simplified medium independent interface, one of the two gigabit or 100M bit medium independent interfaces is used as a main network interface, and the other one is used as a standby network interface. The reliability problem of AOIP network audio stream transmission is solved.

In various embodiments, the present disclosure includes a system for sending 50 gigabits per second (Gbps), 75 Gbps, and 100 Gbps at 50 gigabaud (GBaud) for passive optical networks (PON) downstream and upstream. The system allows for transmission of three data rates at a single baud-rate while only using 2-bits of information per sample. A motivation for sending three data rates at a single baud-rate is to allow for further granularity in the control of the data-rates for downstream and upstream traffic in a flexible PON system based on the link margin. For example, the system can use non-return-to-zero (NRZ) at 50 GBaud for 50 Gbps and can use four-level pulse-amplitude modulation (PAM-4) at 50 GBaud for 100 Gbps. In addition for 75 Gbps, a double square-8 (DSQ-8) constellation can be used at 50 GBaud.

The utility model discloses a network encryption control module with a protection structure, comprising an encryption control module which is internally provided with a hardware sub-module and a software sub-module. The hardware sub-module is internally provided with a ZYNQ7020 processor, an external interface, a debugging interface, a socket XS1, a socket XS2, a socket XS3, a reset key, a power supply, a power supply state indicating lamp, a conversion chip, a gigabit PHY and a gigabit transformer. According to the network encryption control module with the protection structure, the XC7Z020-3CLG484I processor realizes the functions of four paths of Ethernet and the like; by arranging the main control IP address module, the audio and video IP address module, the telephone IP address module, the unvarnished transmission mode module, the ad hoc network encryption mode and the access network encryption mode, the problem that in a specific environment, the network is encrypted by a large-capacity memory and abundant external interfaces and convenient debugging interfaces is solved. The network encryption control module selectively carries out encryption or unvarnished transmission on voice, data and other information transmitted by the wireless ad hoc network.

The present disclosure relates to a monolithically integrated dual-wavelength transmitter for a passive optical network (PON), which may be suitable for both a gigabit PON (GPON) and a 10-gigabit-PON (XG-PON). The integrated transmitter includes two distributed feedback (DFB) lasers, a first DFB laser to emit a continuous first laser beam at a first wavelength along an optical path, and a second DFB laser to emit a modulated second laser beam at a second wavelength along the optical path in the same direction as the first DFB laser. The transmitter also includes an electro-absorption modulator (EAM) after the first DFB laser in the optical path, which is configured to modulate the first laser beam, and a distributed Bragg reflector (DBR) between the EAM and the second DFB laser in the optical path, which is configured to transmit light at the first wavelength

The utility model relates to the technical field of adapters, and discloses a switching structure of gigabit and USB interfaces, a front cover is provided with a USB3.0 socket, a gigabit interface socket is fixedly installed on one side of the USB3.0 socket, the USB3.0 socket is a female head, eight core joints are arranged in the gigabit interface socket, the length of the front cover is 54mm, the height of the front cover is 25.8 mm, and the length of the front cover is 25.8 mm. The USB 3.0 socket arranged on the front cover is a female head, so that the installation of an external joint is facilitated, the plugging installation of a crystal head of external equipment is facilitated by the gigabit module socket, and the device is thin, small in size and convenient to install, the structural weight of the device is reduced, and the load is reduced.

1. Name of the designed product: full gigabit switch. 2. Use of the designed product: wireless data transmission. 3. Design points of the designed product: in shape. 4. Picture or photo that best shows the design points: perspective view.

The utility model relates to the technical field of communication, and discloses a wall-mounted and vertical 10GPON router, which comprises a base, mounting blocks are hinged to two sides of the bottom surface of the base, mounting holes are formed in the four mounting blocks, a plurality of heat dissipation openings are formed in the bottom surface of the base, sleeves are fixedly connected to the top surface of the base close to the two sides, and the sleeves are fixedly connected to the top surface of the base close to the two sides of the base. Two mounting seats are fixed in the two holes, after the two mounting seats are fixed, the two sleeves on the bottom face of the base, the two conical blocks and the two mounting seats are correspondingly pressed, the two conical blocks enable two spring clamping blocks to stretch out and draw back when the two spring clamping blocks are attached to one faces of two top blocks through pressing force, and the two spring clamping blocks are clamped into the two top blocks through pressing force. And then one ends of the two spring clamping blocks stretch out and draw back to the outer wall positions of the two sliding rods, so that the ends of the two spring clamping blocks are clamped on the back faces of the two top blocks, then equipment installation is completed, and the stability of the equipment hung on the wall is improved.

1. Name of the product of this design: Fiber optic access terminal equipment (optical modem ONU / ONT gigabit passive). 2. Purpose of this design product: Terminal equipment for passive optical fiber access to the user end using Ethernet technology as the transmission platform. 3. The key point of the design of this product lies in its shape. 4. The picture or photo that best illustrates the design points: three-dimensional picture.

The invention relates to a 16-port CPEX gigabit Ethernet switching module, and belongs to the technical field of gigabit Ethernet switching modules. The module adopts a three-layer switching mode, a user can change the working mode of the switching module through a debugging interface, and the state of each network port can be monitored online or configuration parameters of the network port can be changed. Gigabit network signals are output to the CPEX connector after being isolated by the transformer, and a hardware interface is stable and reliable. The switching module is provided with a single-chip microcomputer management module, so that reliable management of power-on and reset of the switching module can be realized.

The application discloses a kind of refining furnace visual determination automatic argon blowing system and method, including camera, instrument cabinet, host computer, L2 system and bottom blowing argon control cabinet;The instrument cabinet includes gigabit switch, PLC controller and man-machine interface;The camera is connected with the first interface of gigabit switch;The first interface of the PLC controller is connected with the second interface of gigabit switch;The host computer is connected with the third interface of gigabit switch;The second interface of the PLC controller is connected with the L2 system;The third interface of the PLC controller is connected with the man-machine interface;The L2 system is connected with the bottom blowing argon control cabinet, the application not only can improve the operation efficiency of refining furnace, reduce labor cost, but also can improve product quality, reduce energy consumption, it has important significance to promote the intelligent development of industrial manufacturing field.

The invention discloses an implementation method of a large-scale phased array simulation instrument, which comprises the step of designing a signal processing module to be matched with a 10-gigabit network interface for use, so that a single camera-controlled simulation instrument realizes the simulation of thousands of array scales on the premise of 64 physical ports. Through an innovative signal processing architecture and a high-speed data interface technology, the bottleneck that a traditional phased array simulation instrument depends on hardware stacking is successfully broken through. Compared with a traditional method that a large-scale array can be simulated only by adding physical ports or complex cascading of multiple devices, the method has the advantages that the leap of efficiently simulating thousands of array element scales through a single integrated device is achieved, the hardware cost of system construction is greatly reduced, the system topological structure is fundamentally simplified, and the system performance is improved. The problems of complex wiring and synchronization are avoided, so that an efficient and flexible solution is provided for large-scale array simulation required by the frontier technical fields of satellite communication, communication and inductance integration and the like with higher cost performance and reliability.

The application discloses a kind of implementation methods of large-scale phased array simulation instrument, including by designing signal processing module and gigabit network interface cooperation use, make single camera control simulation instrument gauge realize the simulation of thousands of array scale under the premise of 64 physical ports.The application breaks through the bottleneck of traditional phased array simulation instrument relying on hardware stacking by innovative signal processing architecture and high-speed data interface technology.Compared with the scheme that traditional method needs to simulate large-scale array by increasing physical port or complex cascade of multiple devices, the application realizes the leap of efficiently simulating thousands of array elements scale with single integrated device, which not only greatly reduces the hardware cost of system construction, but also fundamentally simplifies the system topology, avoids complex wiring and synchronization problems, thereby providing an efficient and flexible solution for large-scale array simulation required by satellite communication, sensing integration and other frontier technical fields with higher cost performance and reliability.

This invention relates to a fully domestically produced gigabit network outreach system and server based on the VPX architecture. The system includes: a computing board comprising a domestically produced central processing unit (CPU), a domestically produced MAC controller connected to the CPU via a PCIe bus, and a pair of first domestically produced PHY transceivers connected to the MAC controller via an SMI bus and an RGMII bus; an interface board comprising a pair of second domestically produced PHY transceivers, a pair of domestically produced network transformers correspondingly connected to each second domestically produced PHY transceiver via an MDI bus, and a pair of RJ45 interfaces correspondingly connected to each domestically produced network transformer; and a VPX backplane providing a pair of first gigabit SerDes interfaces, each connecting one first domestically produced PHY transceiver and one second domestically produced PHY transceiver. This invention utilizes fully domestically produced chips to outreach gigabit SerDes interfaces conforming to the VPX standard framework.

The invention relates to the technical field of mining application, and discloses a 5G-MEC-based intelligent mine integrated control platform and a 5G communication system. The MEC core network is deployed in a mine core machine room, a switch is hung below the MEC core network, the MEC core network is in butt joint with an existing mine 10-gigabit industrial network, and data interaction between 5G and a mine industrial ring network is achieved; a mobile device data transmission and remote control system; an unattended system; cutting parameters and a tunneling path are optimized in a datamation mode, dynamic adjustment of equipment such as a coal mining machine in the operation process is achieved, and therefore the mining efficiency is guaranteed, meanwhile, energy consumption and abrasion of the equipment are effectively reduced, the service life of the equipment is prolonged, the maintenance cost is reduced, the overall economic benefit of mine mining is improved, and meanwhile the mining efficiency is improved. The advanced fault diagnosis technology is adopted, the identification accuracy of the inspection robot on equipment faults and normal states is improved, false alarms and missing alarms are reduced, the continuity and stability of mine production are guaranteed, and the safety risk is reduced.

The invention discloses an MIMO open-loop uplink precoding optimization system for gigabit transmission, and relates to the technical field of MIMO open-loop precoding, the MIMO open-loop uplink precoding optimization system comprises an MIMO receiving and transmitting module, an MIMO transmitter uplink module, an MIMO receiver uplink module and a simulation platform module, the MIMO receiving and transmitting module comprises components and functions of an MIMO transmitting module and an MIMO receiving module; the MIMO transmitter uplink module is divided into a phase noise test unit, a serial multi-user precoding unit and a system time delay unit; the uplink module of the MIMO receiver is divided into an SC-FDMA (Single Carrier Frequency Division Multiple Access) unit and a terminal polarization multi-antenna unit; the simulation platform module is used for building a simulation platform and accelerating a simulation process through a GPU (Graphics Processing Unit). A phase noise testing technology, a serial multi-user pre-coding technology and a frequency domain resource allocation technology in the method are closely combined with a modern information technology; the method provided by the invention can be ensured to refine the precoding selection standard for the MIMO open-loop uplink precoding optimization system for gigabit transmission in a more accurate range.