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1461results about "Functional testing" patented technology

Circuits, systems, apparatus and processes for monitoring activity in multi-processing systems

An electronic circuit includes a first processor (100) operable to perform processing operations, a first trace buffer (230) coupled to the first processor (100), a first triggering circuit (210) coupled to the first processor (100), the first triggering circuit (210) operable to detect a specified sequence of particular processing operations in the first processor (100); a second processor (101), a second trace buffer (231) coupled to the second processor (101), a second triggering circuit (211) coupled to the second processor (101), the second triggering circuit (211) operable to detect at least one other processing operation in the second processor (101); and a cross trace circuit (330) having a trace output and having inputs coupled to the first triggering circuit (210) and to the second triggering circuit (211), the cross trace circuit (330) configurably operable to respond to a sequence including both a detection of the sequence of particular processing operations of the first processor (100) by the first triggering circuit (210) and a detection of the at least one other processing operation of the second processor (101) by the second triggering circuit (211), to couple at least one of the first trace buffer (230) and the second trace buffer (231) to the trace output. Various circuits, devices, telecommunications products, wireless handsets, systems and processes of operation and manufacture are disclosed.
Owner:TEXAS INSTR INC

Extension Cache Coherence protocol-based multi-level consistency simulation domain verification and test method

The invention discloses an extension Cache Coherence protocol-based multi-level consistency domain simulation verification and test method. An extension Cache Coherence protocol-based multi-level consistency domain CC-NUMA (Cache Coherent Non-Uniform Memory Access) system protocol simulation model is constructed. A protocol table inquiring and state converting executing mechanism in a key node of a system ensures that a Cache Coherence protocol is maintained in a single computing domain and is simultaneous maintained among a plurality of computing domains, and accuracy and stability are ensured by intra-domain and inter-domain transmission; and a credible protocol inlet conversion coverage rate evaluating drive verification method is provided, transactions are processed by loading an optimized transaction generator promoting model, a coverage rate index is obtained after the operation is ended, and the verification efficiency is increased in comparison with a random transaction promoting mechanism. Through constructing one multi-processor multi-consistency domain verification system model and developing relevant simulation verification, the applicability and the effectiveness of the method are further confirmed.
Owner:LANGCHAO ELECTRONIC INFORMATION IND CO LTD
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