1236 results about "Device under test" patented technology

Disclosed is a robotic system and method designed for the verification and validation of smart connected Human-Machine Interface (HMI) devices. The robotic system integrates a multi-finger modular robotic module, a haptic module, a finger actuator, vision cameras, vision lights, a finger rotary module, a Cartesian robotic arm, an onboard user interface, and an L-shaped door. The method involves replicating human finger interactions, simulating touch sensations on a device under test (DUT), ensuring continuous and reliable operation, utilizing vision cameras for navigation and verification, optimizing vision with controlled lighting, positioning cameras strategically, executing various tasks with a robotic arm, and facilitating user interaction through an onboard interface.

A probe card mounted in an of electronic device testing apparatus is described, having a probe head housing a plurality of contact probes, each having a first end portion which abuts onto contact pads of a device under test, a main board and a connected intermediate board which provides a distance spatial transformation between contact pads made on opposite faces thereof. The intermediate board is a space transformer which includes a plurality of modules that are plate-shaped and coplanar, and structurally and functionally independent from each other. Each module has a first face facing towards the probe head and a first plurality of contact pads whereonto respective second end portions of the contact probes abut and an opposite second face facing towards the main board. The second face has a second plurality of contact pads connected to the first plurality of contact pads.

The invention relates to the technical field of wafer testing, and discloses a probe card and a testing system. The probe card comprises a plurality of unit groups which are periodically arranged; the unit group comprises at least two coaxial probes; wherein at least one coaxial probe is used for abutting against the input end of a to-be-tested device, and at least one coaxial probe is used for abutting against the output end of the to-be-tested device. According to the invention, through the plurality of unit groups arranged in the periodic array, a plurality of devices can be tested at a time when wafer testing is carried out, so that the wafer testing speed is improved, the wafer testing time is shortened, and the problems of low testing speed and long testing time existing in wafer testing in the prior art are solved.

A test system has ovens configured to hold devices under test (DUTs), DUT switches, each connected to the DUTs in an oven, splitters, each splitter connected to a DUT switch, an instrument switch connected to one output of each splitter, the other output of each splitter connected to a test instrument, and one or more processors to control the instrument switch to select one of the DUT switches connected to an oven, control the selected DUT switch to connect each DUT in the oven to a channel of the test and measurement instrument, use machine learning to tune the DUT to a set of parameters until the DUT passes or fails, repeat the connecting, tuning, and testing of each DUT until all DUTs in an oven have been tested, and repeat the selection and control of the DUT switches until each DUT in each oven has been tuned and tested.

Disclosed is a test aid unit that is installed between automatic test equipment (ATE) and a device under test (DUT), generates a test data signal according to a data processing and transmission / reception rate of the DUT in response to a control signal transmitted from the ATE, transmits the test data signal to the DUT, self-tests a test result signal transmitted from the DUT, and transmits the test result to the ATE. The test aid unit includes a clock signal divider, an integrated digital logic unit, a transmitter, and a receiver.

Disclosed is a test board which includes a substrate that includes a device under test (DUT) placement area where a first DUT and a second DUT are disposed, a first load switch connected in series with the first DUT and configured to be set to a switch on state or a switch off state based on a first enable signal, a second load switch connected in series with the second DUT and configured to be set to the switch on state or the switch off state depending on a second enable signal, and a test controller. The test controller may be configured to perform a test operation in a (1-1)-th mode by activating the first enable signal and deactivating the second enable signal and then perform the test operation in a (1-2)-th mode by deactivating the first enable signal and activating the second enable signal.

A measurement system includes a common port, the common port being connectable to a signal output of the device under test. The measurement system further includes a signal line being connected to the common port, wherein the signal line includes a first directional coupler portion and a second directional coupler portion. The measurement system further includes a signal processing circuit, wherein the signal processing circuit includes an IQ analysis circuit and an IQ synthesizer circuit. The IQ analysis circuit is connected with the common port via the first directional coupler portion so as to receive a forward-travelling signal from the common port. Further, a testing method of testing a device under test is described.

A method for determining timing accuracy of one or more radio data packets includes: generating stimulus data, wherein the stimulus data includes the radio data packets and a reference time for transmission of the radio data packets over the air; storing the stimulus data on a test device; and replaying the stimulus data, by the test device, in order to determine the timing accuracy of the transmission of the one or more radio data packets by a device under test.

A signal processing method includes: receiving, by a signal input, a digital input signal from a device under test; capturing, by a measurement circuit, at least one IQ measurement set based on the received input signal, wherein the at least one IQ measurement set comprises a plurality of IQ measurement points; determining, by an analysis circuit, a total noise of the digital input signal over frequency based on the at least one IQ measurement set; determining, by the analysis circuit, an instrument noise over frequency, wherein the instrument noise corresponds to noise generated by the measurement instrument; and determining, by the analysis circuit, a ratio of the instrument noise and the total noise over frequency, thereby obtaining a frequency-dependent scaling factor. Further, a measurement instrument is described.

A test and measurement device has an input port to receive a signal from a device under test (DUT), the signal having a symbol rate, one or more analog-to-digital converters (ADC) to convert the signal to waveform samples at a sampling rate, and one or more processors, when aliasing is present: up-sample a portion of the signal having aliased samples to produce up-sampled samples; use the up-sampled samples to produce a real-time waveform; perform clock recovery on the real-time waveform to produce a recovered clock; and resample the aliased samples to produce a non-aliased waveform.

The present disclosure provides a testing apparatus, which includes a plurality of devices under test (DUTs) and an advanced process control monitor (APCM). The APCM includes a switch circuit, a control circuit, a detection circuit, and an auxiliary control circuit. The switch circuit includes a plurality of switch devices corresponding to the DUTs. The control circuit includes a plurality of control devices corresponding to the switch devices, and is configured to sequentially activate one of the switch devices during a test procedure of the testing apparatus. The detection circuit is configured to provide a first power supply voltage to a first terminal of each switch device. The auxiliary control circuit is configured to provide a second power supply voltage to a second terminal of each switch device deactivated the control circuit.

The invention discloses a passive DHTRB test circuit, method and product with optimized performance. The test circuit comprises a power supply, a first test accompanying tube S1, a second test accompanying tube S2, a tested device DUT, a positive overshoot circuit and a negative overshoot circuit. The positive electrode of the power supply is connected to the input end of the positive electrode overshoot circuit, the output end of the positive electrode overshoot circuit is connected with the drain electrode of the first test accompanying tube S1, the source electrode of the first test accompanying tube S1 is connected with the second test accompanying tube S2 and the drain electrode of the tested device DUT, the source electrode of the second test accompanying tube S2 is connected with the input end of the negative electrode overshoot circuit, and the output end of the negative electrode overshoot circuit is connected with the source electrode of the tested device DUT and is connected to the negative electrode of the power supply; when the first test accompanying tube S1 is switched on and the second test accompanying tube S2 is switched off, the positive overshoot circuit outputs forward overshoot voltage to the outside; when the first test accompanying tube S1 is turned off and the second test accompanying tube S2 is turned on, the negative overshoot circuit outputs a reverse overshoot voltage to the outside. According to the invention, the dV / dt performance of the passive DHTRB test can be improved.

The embodiment of the invention provides a test device, test equipment, a test method and a storage medium. The storage device comprises a first communication interface, a control circuit, a second communication interface and a constant temperature device, a first port of the control circuit is coupled with the first communication interface; a second port of the control circuit is coupled with the second communication interface, and the second communication port is also connected with the tested device; a third port of the control circuit is coupled with the constant temperature device, and the constant temperature device comprises a cavity for placing a tested device; and the control circuit is configured to control the temperature in the cavity of the constant temperature device and realize information transmission between the first communication interface and the second communication interface.

The invention provides a calibration piece and a calibration method for a multi-port waveguide antenna test system, and a test method and a test system for a multi-port waveguide antenna, in the calibration piece, a positioning structure can ensure the repeatability of each connection, which is the premise of high-precision calibration, and the calibration accuracy is greatly improved. The load unit, the offset short circuit unit and the offset load unit are provided with a plurality of waveguide ports which are the same as those of a tested piece and can be directly butted, the internal structure of the waveguide port of the load unit is an antenna, electromagnetic wave energy can be radiated out instead of being absorbed internally, and high precision and stability of the load standard are guaranteed; according to the method, the reference surface can be determined at the interface of the tested piece, the calibration error model can be directly tested on the reference surface, the accuracy is good, and the solved calibration error model contains all time-varying characteristics of the whole test link during each calibration, so that the method can be used for frequently calibrating according to requirements, and the calibration accuracy is high. Measurement errors caused by temperature drift and link loss can be handled, and the efficiency is high.

According to the verification method based on Ethernet end-to-end communication, the storage medium and the electronic equipment disclosed by the invention, the initial configuration operation is firstly executed, the communication connection between the test end and the tested equipment is established, then the verification request message is sent to the tested equipment, and the test report is generated based on the response message returned by the tested equipment. The end-to-end communication verification method and system can achieve systematic verification of end-to-end communication, can simulate an actual operation scene, automatically detect and record communication abnormity, counter logic errors, boundary values and CRC verification errors and generate a test report in a high-load, high-concurrency and multi-service-flow parallel complex network environment, improves the automation degree and efficiency of the test, and improves the test efficiency. Dependence on artificial experience is reduced, and stability and reliability of an end-to-end communication mechanism under extreme working conditions can be quantified.

The invention relates to a near-field scanning method and device, computer equipment, a storage medium and a program product. The method comprises the following steps: grouping scanning points in a to-be-scanned area of to-be-tested equipment to obtain a plurality of to-be-scanned point groups; according to the group identifier of the currently scanned to-be-scanned point group, determining a target to-be-scanned point group from each to-be-scanned point group; for each scanning point in the target to-be-scanned point group, determining a first parameter according to the electromagnetic field intensity of the scanned point in the neighborhood of the scanning point; and scanning the scanning points under the condition that the first parameter is greater than the preset threshold value, thereby screening the scanning points in the to-be-scanned area of the to-be-detected equipment, reducing the number of the scanning points needing to be scanned in the near-field scanning process on the premise of keeping certain detection quality, and improving the detection efficiency. And the detection efficiency of the electronic equipment is improved by improving the near-field scanning speed.

The invention relates to multi-range calibration for a single pin parameter measurement unit. A test equipment system may provide a signal to a device under test (DUT), or receive a signal from the device under test (DUT). The test system may include an output stage having an output buffer circuit, which may be controlled locally or externally. An external controller may be used to provide a precision input signal, and in response, to measure current at a DUT interface node of the system, or to measure voltage characteristics of different components within the system. Using the input signal from an external controller, one or more aspects of the test system may be calibrated. For example, a current signal received from an external controller may be used to calibrate the resistance of a sense resistor in the output stage. In another example, a signal from an external controller may be used to determine a buffer offset characteristic to control a local drive circuit of the system.

A method for manufacturing a probe head for the functionality testing of devices under test (DUT) is disclosed. The method includes providing a containment element, arranging a lower guide at a lower face of the containment element which faces toward the devices under test during the test, and arranging an upper guide at an upper face of the containment element. The containment element is interposed between the lower and upper guides which are initially in the shape of a single plate connected to the containment element. The method further includes cutting the lower and / or upper guide thereby defining a plurality of guide portions that are independent and separated from each other, and inserting a plurality of contact elements into respective guide holes formed in the guides. The contact elements are adapted to contact pads of the devices under test. A probe head obtained by the method is also disclosed.

The invention relates to the technical field of power system testing, in particular to a relay protection device testing system and method. The system comprises a tested device, a tester, a device test case module, a test module, a test instrument interface module, a simulation master station module and a comprehensive diagnosis module. The output end of the device test case module is connected with the input end of the test module; the test module is respectively connected with the test instrument interface module, the simulation master station module and the comprehensive diagnosis module; the test instrument interface module is connected with the tested device through the tester, and the tested device is also connected with the test module through the simulation master station module. According to the invention, comprehensive and intelligent testing of the relay protection device is realized; the device can simulate various fault scenes, accurately detect the action response of the device, provide detailed performance evaluation and diagnosis reports through multi-path data feedback and comprehensive diagnosis, and effectively improve the test efficiency and reliability.

Various embodiments provide for a unified interface for testing a system, which can include a device under test (DUT). In particular, some embodiments described herein can be used to implement a Unified Test Framework (UTF) that comprises an architecture that provides a unified (or common) software interface to one or more test methods used during a development life cycle of a system. Example test methods can include, without limitation, modeling, verification, simulation, emulation, validation, customer support, and the like.

An AI decision based multiple telecommunication endpoints system is provided, including a telecommunication endpoint device and an artificial intelligence decision controller. The telecommunication endpoint device performs a communication test with the radio frequency communication device under test. The artificial intelligence decision controller is electrically connected to the telecommunication terminal device to control the communication test, and performs an efficiency analysis on the result of the communication test, and generates a decision instruction according to the result of the efficiency analysis. The artificial intelligence decision controller can centrally control, replace and analyze multiple artificial intelligence modules and generate a large number of telecommunication endpoints device signal sending and receiving behaviors, providing a telecommunication endpoints system with self-adaptive adjustment process, parameters, result analysis and reasonable cost as a test for the development phase, deployment phase, or maintenance phase of the telecommunications equipment product development process.

The present application relates to a dynamic stress aging test method and system for GaN power devices, comprising: obtaining dynamic pulse voltage stress data and temperature stress data corresponding to the GaN power device under test; wherein the dynamic pulse voltage stress data is used to periodically switch the on / off state of the GaN power device under test; obtaining test conditions based on the dynamic pulse voltage stress data and the temperature stress data; performing a dynamic stress aging test on the GaN power device under test according to the test conditions, and collecting electrical parameters of the GaN power device under test during the stress process; obtaining test results based on comparison of the electrical parameters with preset failure thresholds, and reflecting the reliability of the GaN power device in a more realistic and rigorous manner by applying a dynamic pulse voltage stress that is closer to the actual operating conditions of the GaN power device under test, while simultaneously rapidly monitoring the actual degradation of the electrical parameters online during the stress application process, thereby avoiding the problem of inaccurate measurement caused by offline testing and the rapid recovery characteristics of the device.

The invention discloses a linear acceleration environment test platform and a test method. The test platform comprises a platform body, a control system, and a guide rail assembly, an equipment assembly tool, a spring assembly, a spring stretching assembly and a detection unit which are arranged on the platform body, the equipment assembling tool is arranged on the guide rail assembly and is used for installing tested equipment; the spring assembly comprises a plurality of springs which are symmetrically distributed on the two sides of the guide rail assembly. The spring stretching assembly is used for stretching the spring assembly to a preset stretching position, the equipment assembling tool abuts against the spring stretching assembly, and the spring stretching assembly is released to drive the equipment assembling tool to do linear accelerated motion. The invention further comprises a test method of the linear acceleration environment test platform. The device is simple in structure and low in manufacturing cost, can effectively simulate the real dynamic response of the tested device under the action of the linear acceleration, carries out refined evaluation on the independence performance of the tested device, and is especially suitable for batch test requirements of inertial navigation devices, low-cost whole aircrafts and the like.

Embodiments of a device, a method, and a system for channel switching are disclosed. In an embodiment, the device includes a wireless network interface device implemented on one or more integrated circuits (ICs), where the wireless network interface device is configured to negotiate a Target Wake Time (TWT) of a first Device Under Test (DUT) (DUT1) and a TWT of a second DUT (DUT2), and switch channels between DUT1 and DUT2 according to the negotiated TWT of DUT1 and the negotiated TWT of DUT2.

A method for testing device software of a device using a fuzzing algorithm. The method includes: initializing the fuzzing algorithm to detect an initial behavior of the device software of the device under test; executing a fuzzing test loop including: generating a fuzzed message from predefined message types; sending the generated, fuzzed message to the device under test to test the device software on the basis of the fuzzed message; detecting side-channel information during testing of the device software on the basis of the fuzzed message; recognizing anomalies in the side-channel information using at least one machine learning model and / or statistical algorithm; and if an anomaly is recognized, adjusting a parameter including adjusting fuzzability weights, of the initialized fuzzing algorithm and performing a next loop iteration of the fuzzing test loop; and if no anomaly is recognized, performing the next loop iteration of the fuzzing test loop.

A probe needle for testing a device under test (DUT) includes a needle core; a needle coat; and an isolation layer disposed between the needle coat and the needle core, wherein in an extending direction of the needle core, the isolation layer extends exceeding the needle coat and the needle core extends exceeding the isolation layer. A probe card structure including the probe needle having a needle core; a needle coat; and an isolation layer and a method of testing a device under test using the probe card structure are also provided.

A probe unit includes first and second probes of equal length. A probe body of at least one of the probes has a slot extending along a longitudinal direction thereof to define two slats. A total cross-sectional area of the slats of the first probe is greater than that of the second probe. Alternatively, the probe body of the second probe is solid, and the total cross-sectional area of the slats of the first probe is greater than the cross-sectional area of the solid probe body of the second probe. The slats are shaped in such a way that a contact force of the first probe is greater than that of the second probe, thereby meeting testing requirements of conductive contacts of different sizes on an electronic device under test, while reducing problems of different probe tip wear rates and excessive probe mark area ratio differences.

The invention relates to the technical field of electrical measurement, in particular to a current measurement method and device, computer equipment, a storage medium and a product. The method comprises the following steps: carrying out output current measurement on to-be-measured equipment based on at least one range channel to obtain an initial current value corresponding to each range channel at the current moment; fusing the initial current values to obtain a comprehensive current value at the current moment; and performing current correction on each initial current value according to the comprehensive current value to obtain a target current output by the to-be-tested device. The method can realize long-term high-precision measurement while ensuring real-time performance, reduces manual calibration cost, has a wide application prospect, and is suitable for various scenes such as power distribution networks, factory power monitoring, energy efficiency analysis and protection systems and the like.

The invention belongs to the technical field of electronic measurement and control, and particularly relates to a seamless switching method for a VI source voltage range, and the system comprises a digital controller, a digital-to-analog converter, a programmable gain amplifier, an isolation switch module, a voltage maintaining and buffering module, a power amplifier, and a feedback measurement network. The digital controller is configured to receive a range switching instruction, manage the working state of the VI source, execute digital closed-loop voltage regulation and coordinate actions of all hardware components in the range switching process; a digital voltage reference generation module, a measuring range switching control logic module, a loop adjusting module and a high-precision clock synchronization unit are integrated in the digital controller. According to the invention, seamless switching of the output voltage can be realized, the test efficiency is obviously improved, the protection of the tested device is enhanced, and the data continuity and accuracy are improved.

A signal driver system can include one or more force amplifiers configured to provide drive signals to an output node, such as a device under test (DUT) node. The system can include a first switch circuit coupled between a first force amplifier and the output node, and the first switch circuit can include multiple parallel instances of switch circuits with respective different resistance characteristics. The system can include a second switch circuit coupled between a second force amplifier and the output node. The system can include a control circuit configured to control the switch circuit instances of the first switch circuit to mitigate glitch at the output node, for example, when switching between the first and second drive signals.