1355 results about "Probe card" patented technology

An object of the invention is to provide a probe card capable of properly performing a measurement. A probe card according to the invention includes: probes 100 shaped to allow vertical elastic deformation; a supporting substrate 200 with the probes provided on the lower surface thereof; a main substrate 300 positioned opposing the upper surface of the supporting substrate 200; an intermediate substrate 400 disposed between the supporting substrate 200 and main substrate 300; a supporting member 500 that is a column-shaped member with one end thereof attached to the center of the supporting substrate 200 and the other end thereof attached to the intermediate substrate 400 and holds the supporting substrate 200 so that the supporting substrate 200 is inclinable; and elastic members for holding the supporting substrate 200 so that the supporting substrate 200 is in a horizontal position relative to the main substrate 300, which are provided between the supporting substrate 200 and main substrate 300.

The invention discloses a probe card simulation method and system based on counter-acting force analysis, which are used in the field of wafer simulation test, and the probe card simulation method comprises the following steps: integrating multiple physical field working conditions to construct a probe card geometric model, and importing the probe card geometric model into finite element simulation analysis software; carrying out grid division on the geometric model of the probe card by utilizing the hybrid voxel tree model, adjusting the grid density according to the distribution requirement of the multi-physical field, and setting a simulation boundary condition by utilizing a preset boundary condition template according to the actual simulation requirement; starting a simulation calculation process based on the adjusted grid density and simulated boundary conditions; and providing a visual interface of physical field distribution and a structural stress state in the simulation calculation process, and performing iterative optimization on the performance of the probe card in the simulation process according to a reactive force distribution result. According to the method, the grid density is automatically adjusted to adapt to changes of a physical field, and it is ensured that higher simulation precision is obtained in a key area.

Proposed is a vertical probe card capable of effectively testing the electrical characteristics of a test object without a body thereof being elastically bent or curved in a convex shape in the horizontal direction by pressure applied to opposite ends thereof.

Proposed are an electro-conductive contact pin capable of effectively testing the electrical characteristics of a test object without a body thereof being elastically bent or curved in a convex shape in the horizontal direction by pressure applied to opposite ends thereof, and a vertical probe card having the same.

The invention provides a wafer testing device capable of being rapidly maintained, and relates to the technical field of semiconductors, the wafer testing device comprises a fixed plate, the fixed plate is provided with a control module, and a power supply module, a probe card, a heating lifting module and at least one testing module which are connected with the control module, and a wafer to be tested is integrally arranged in the probe card. The power supply module is connected with the probe card to supply power to the to-be-tested wafer, a heater and a probe are arranged in the heating lifting module, and the heating lifting module is used for driving the to-be-tested wafer in the probe card to be in contact with the probe and heating the to-be-tested wafer. The test module comprises a bottom plate which is in push-pull connection with the fixed plate along the first direction and a switch array measurement assembly which is arranged on the bottom plate and is in plug-in connection with the bottom plate along the second direction, and the switch array measurement assembly is used for testing different parameters of the to-be-tested wafer when the to-be-tested wafer is in contact with the probe. The switch array measurement assembly is in plug-in connection with the bottom plate, and the bottom plate is in push-pull connection with the fixed plate, thereby facilitating the replacement of the test module, and achieving the quick disassembly and assembly.

The invention discloses a semiconductor probe card electrical parameter extraction method and system based on an MEMS technology, and relates to the technical field of semiconductor testing, the method comprises the following components: initialization setting: aligning an MEMS probe card to a target test area on a wafer to be tested, firmly fixing the probe card and the wafer together by using a mechanical clamping device, and setting the MEMS probe card and the wafer to be tested; by integrating the decision tree model and the genetic algorithm, accurate mapping and optimization of semiconductor wafer surface features and optimal probe contact parameters are achieved, the intelligent level of testing is improved, the test time is shortened, the test efficiency is improved, and the test cost is reduced. The self-adaptability and stability of the testing process are remarkably enhanced, real-time adjustment of probe contact parameters is ensured through a dynamic monitoring and closed-loop control mechanism, the testing error is effectively reduced, the testing precision is improved, the optimal contact parameter combination is found through an optimization algorithm, the testing period is further shortened, and the testing efficiency is improved.

A probe card mounted in an of electronic device testing apparatus is described, having a probe head housing a plurality of contact probes, each having a first end portion which abuts onto contact pads of a device under test, a main board and a connected intermediate board which provides a distance spatial transformation between contact pads made on opposite faces thereof. The intermediate board is a space transformer which includes a plurality of modules that are plate-shaped and coplanar, and structurally and functionally independent from each other. Each module has a first face facing towards the probe head and a first plurality of contact pads whereonto respective second end portions of the contact probes abut and an opposite second face facing towards the main board. The second face has a second plurality of contact pads connected to the first plurality of contact pads.

The invention provides a discrete device FV-MI mode test anti-needle-burning device comprising a test source which comprises a high potential and a low potential; the tested die is fixed on the chuck, and the chuck is connected with the high potential of the test source; a standard resistor is connected in series between the probe card and the low potential end of the test source, and the standard resistor is used for detecting the current in the test loop; the external standard MOSFET is low in turn-on voltage, high in withstand voltage and high in power, if current in a loop is abnormally large during testing to cause increase of voltage division of the standard resistor, the external standard MOSFET is conducted to shunt current passing through the probe card, and the current flowing through the probe card is controlled to avoid probe burning. The external standard MOSFET is conducted so as to shunt the current flowing through the probe, and the probe is prevented from being burnt by controlling the current flowing through the probe card.

The present disclosure discloses a testing system, a battery production line, and a testing method. The testing system includes a control device and a test device. The test device includes at least two probe card adjustment assemblies. The control device is connected to the test device and configured to adjust the probe card adjustment assemblies according to an adjustment strategy, and drive the adjusted probe card adjustment assemblies to test the battery module currently to be tested. The adjustment strategy is determined based on current module information corresponding to the battery module and historical module information. The historical module information is the module information of a battery module tested last time. The technical solution provided by the embodiments of the present disclosure can quickly adjust the probe card adjustment assemblies to adapt to different battery modules.

The invention provides a manufacturing method of a space converter of a probe card. The manufacturing method comprises the following steps: sequentially forming a titanium layer and a first copper layer on the upper surface of a ceramic substrate; forming a first circuit pattern on the upper surface of the first copper layer; forming a second copper layer on the first circuit pattern; removing the titanium layer and the first copper layer except the titanium layer below the second copper layer; sequentially forming a nickel layer and a first gold layer on the upper surface of the structure; forming a polyimide layer on the upper surface of the structure; removing the polyimide layer on the upper surface of the target position of the first gold layer to form a second circuit pattern; forming a first nickel-cobalt alloy layer on the second circuit pattern, and then forming a third circuit pattern; forming a second nickel-cobalt alloy layer on the third circuit pattern, and then forming a fourth circuit pattern; forming a second gold layer on the fourth circuit pattern; and removing the photoresist to obtain the space converter. According to the manufacturing method of the space converter of the probe card, the installation position of the probe can be accurately adjusted, and the alignment precision of the probe is improved.

The invention relates to a wafer probe test calibration method, device and equipment, a medium and a product, and relates to the field of semiconductor equipment, and the method comprises the steps: obtaining an initial OD value of a wafer test machine in a zero-pressure contact state between a probe on a probe card and a contact point on a wafer, and a length value of the probe; acquiring a first height difference between a first reference measurement point above the wafer and a second reference measurement point below the wafer; acquiring a second height difference between the first reference measurement point and the top surface of the wafer; acquiring a third height difference between the bottom surface of the probe card and the second reference measurement point; calculating a measurement distance value between the bottom surface of the probe and the contact point according to the first height difference, the second height difference, the third height difference and the length value; according to the method, the influence of the WAT machine difference and the product film thickness on OD value setting can be eliminated, and meanwhile, the product film layer change and the equipment state are monitored according to the target displacement value obtained through calibration.

The invention discloses a probe card and a multi-probe channel resistance measuring system and method.The probe card comprises a substrate and a probe bonding pad area located in the middle of the substrate, the probe bonding pad area comprises a plurality of bonding pads arranged in a plurality of rows and columns, the bonding pads are used for welding sleeves of a plurality of elastic probes, and the elastic probes are arranged in the bonding pads. The plurality of rows and the plurality of columns of bonding pads are connected to the corresponding wires in a one-to-one correspondence manner, so that the elastic probes of any four bonding pads form a group of test terminals. According to the probe card and the multi-probe channel resistance measurement system and method provided by the invention, any N of the M elastic probes are selected to form a group through the channel selection device to realize resistance measurement of the to-be-measured sample, and different N elastic probes are selected during multiple times of measurement, so that resistance test of any area of the to-be-measured sample can be realized.

The invention provides a wafer testing system and method, and belongs to the field of semiconductor testing. The wafer test system comprises a control host, a probe card and a test device, the probe card comprises a signal switch; the control host is used for generating a target mode test instruction and sending the target mode test instruction to the probe card; and the probe card is used for enabling the signal switch to select a corresponding target mode based on the target mode test instruction so as to acquire a test signal corresponding to the to-be-tested wafer device, and sending the test signal to the test device so as to obtain test data of the to-be-tested wafer device. Devices required for dynamic detection and static detection of wafer devices are integrated on the probe card, and mode selection is carried out through a signal switch. When a dynamic test and a static test need to be switched, the probe does not need to be switched, and only the signal switch needs to be switched on and off, so that the wafer test efficiency is improved.

The invention relates to the technical field of wafer testing, and discloses a probe card and a testing system. The probe card comprises a plurality of unit groups which are periodically arranged; the unit group comprises at least two coaxial probes; wherein at least one coaxial probe is used for abutting against the input end of a to-be-tested device, and at least one coaxial probe is used for abutting against the output end of the to-be-tested device. According to the invention, through the plurality of unit groups arranged in the periodic array, a plurality of devices can be tested at a time when wafer testing is carried out, so that the wafer testing speed is improved, the wafer testing time is shortened, and the problems of low testing speed and long testing time existing in wafer testing in the prior art are solved.

A probe card for a circuit probe test system and methods of fabrication thereof. The probe card includes a substrate portion, and a probe head including a guide plate located below the substrate portion and having a plurality of openings through the guide plate, and a conductive trace on the guide plate that extends between a pair of the openings. A plurality of probe pins extend through the openings through the guide plate, where a pair of probe pins are electrically connected by the conductive trace to form a loopback signal path. Accordingly, the loopback signals may be routed through the conductive trace located on and / or within the guide plate rather than through the substrate portion of the probe card. This may significantly reduce the total length of the loopback signal path, which may thereby improve the signal integrity (SI) during loopback testing of a device-under-test.

The invention discloses a method for preventing needle burning during testing of breakdown voltage of a discrete device. According to the method, in a test loop comprising a probe card and a test source, a voltage-withstanding module is connected in series between the probe card and a low-potential end of the test source. The voltage-withstanding module comprises a detection resistor Rx and a voltage-withstanding switching device connected with the detection resistor Rx in parallel. When the test current I is applied, if the current is increased abnormally due to poor contact and the like, and the voltage drop on the detection resistor Rx is greater than or equal to the starting voltage VT of the voltage-withstanding switching device, the voltage-withstanding switching device is switched on, the test current I is shunted, and the current flowing through the probe card is reduced, so that the probe is prevented from being burnt. The breakdown voltage of the tested device is calculated by measuring the total voltage V at the two ends of the test source and subtracting the voltage drop (I * Rx) on the detection resistor Rx, and the test accuracy is ensured. The method can effectively protect the probe card and improve the test reliability and efficiency.

A cantilever probe card and a probe module thereof are provided. The probe module includes a supporting board, a substrate disposed on the supporting board, a plurality of cantilever probes, and a plurality of fine adjustment members. The substrate has a non-planar shape and has a difference of warpage along a testing direction. One end of each of the cantilever probes is connected to the substrate, and another end of each of the cantilever probes is a free end. The fine adjustment members are spaced apart from each other and are disposed between the supporting board and the substrate. Each of the fine adjustment members is configured to be independently operable along the testing direction for changing a distance between the supporting board and the substrate. The substrate is deformable through at least one of the fine adjustment members so as to reduce the difference of warpage.

The invention discloses an MEMS (Micro Electro Mechanical System) elastic probe for a collaborative test before co-packaging, which has electrical conductivity on the whole and comprises an elastic main body and a salient point arranged at the upper end of the elastic main body, and when the salient points are pressed, the elastic main body can adaptively and elastically deform. The invention aims to provide the interposer MEMS spring probe for the HBM test, which has the advantages of stable connection signal and lossless and detachable connection.

A light absorption probe includes an arm segment, a main segment located at one side of the arm segment, a testing segment connected to another side of the arm segment, and a light absorption coating layer. The main segment has a soldering end portion and an extending end portion respectively located at two opposite sides thereof along a predetermined direction. The testing segment has an upright shape along the predetermined direction and includes a pinpoint portion and an upright portion that connects the pinpoint portion and the arm segment. The light absorption coating layer covers the upright portion, and the pinpoint portion is exposed from the light absorption coating layer. Through the light absorption coating layer, the testing segment only forms an observation point at the pinpoint portion in an observation process of a detection apparatus.

A probe pin includes a low resistance member consisting of a first metal with a first conductivity, and a high resistance member consisting of a second metal with a second conductivity, the second metal having a resistivity higher than that of the low resistance member. The probe pin has a multi layered part between a contact part and a terminal part, where the multi layered part is configured in the order of the high resistance member, a slit of air gap, and the low resistance member, in a first direction different from a buckling direction of the probe pin at the time of inspection of a test object. The low resistance member and the high resistance member are arranged so as not to overlap with each other, when the multi layered part is viewed from the buckling direction.

The invention discloses a wafer electrical property test method, a storage medium and a terminal. The wafer electrical property test method comprises the following steps: acquiring a standard acupuncture image; obtaining a to-be-detected acupuncture image of the current test structure; judging whether the to-be-detected acupuncture image accords with expectation or not based on the standard acupuncture image; if so, completing the electrical test of the current test structure, and carrying out the electrical test of the next test structure; if not, increasing the insertion depth of the probe card of the current test structure once or multiple times; and after the needle insertion depth of the probe card is increased each time, re-acquiring a to-be-detected needle insertion image of the current test structure, and judging whether the re-acquired to-be-detected needle insertion image conforms to expectation or not. In the process of performing the electrical test on the current test structure, whether the needle insertion of the current test structure meets the expectation or not can be detected, so that the time of re-testing due to abnormal test data caused by the needle insertion problem after the test is completed is saved, and the efficiency of the electrical test of the wafer is effectively improved.

The invention relates to the technical field of probe cards, and particularly discloses a probe card stroke compensation system and method, and the method comprises the steps: analyzing the distance value of each probe in a probe card, obtaining a distance characterization value WB, judging whether the abnormal degree of the probe card generates an adjustment signal or not based on the distance characterization value WB, and adjusting the stroke of the probe card based on the adjustment signal. The method comprises the following steps: applying test pressure to a single probe at a fixed rate, analyzing the change trend of a distance value along with the increase of the test pressure, judging whether the change of the distance value of the probe along with the increase of the test pressure is linear or not, and selecting an appropriate model as a prediction model based on the judgment result of whether the change of the distance value of the probe along with the increase of the test pressure is linear or not. According to the invention, the distance standard value can be adjusted in time according to the actual monitoring condition, and the pressure during the probe stroke compensation can be correspondingly adjusted, so that the problem caused by the overlarge difference between the actual distance value and the predicted distance value can be effectively solved, and the normal work of the probe card and the accuracy of the test effect can be ensured.

A probe card MLO pad point position contraction design simulation method is characterized by comprising the following steps that 1, a temperature field simulation model is established, and a temperature simulation result file is obtained and comprises the steps that 1.1, temperature data are actually measured; step 1.2, establishing a temperature field simulation model by adopting a finite element analysis method, modeling an air fluid part in the cavity into a solid air medium by using a steady-state thermal analysis module, and endowing the solid air with a heat transfer coefficient; calibrating heat transfer coefficients in the temperature field simulation model: a heat transfer coefficient A, a heat transfer coefficient B and a heat transfer coefficient C; 1.3, correcting and iterating the heat transfer coefficient A, the heat transfer coefficient B and the heat transfer coefficient C; 1.4, obtaining a temperature field simulation result file of the probe card at the specified high-temperature loading temperature; 2, establishing a physical field simulation model, and obtaining a simulation pad displacement result; and step 3, calculating to obtain a new pad point position coordinate for iterative production.

[Problem] To facilitate passing of a probe through two or more guide plates. [Solution] Provided is a probe passing method for a probe card 1 in which two guide plates 301, 302 are spaced apart from each other, and a probe 50 is passed through two guide holes 311, 312 respectively formed in the two guide plates 301, 302, the method comprising: a step for passing a towing rod 60 through the two guide holes 311, 312; a step for separably linking the tip-end of the towing rod 60, having passed through the two guide holes 311, 312, to a linking portion 510 provided at the tip-end of the probe 50; a step for pulling the towing rod 60 out of the receiving two guide holes 311, 312, and passing the probe 50 through the two guide holes 311, 312; and a step for separating the towing rod 60, having been pulled out of the two guide holes 311, 312, from the probe 50.

The invention relates to the technical field of wafer testing, and discloses a visual wafer identification probe station which comprises a processing table, a probe card, a bearing table assembly and an observation assembly. The probe card is selectively arranged on the processing table; the probe card comprises four groups of probe array assemblies; the bearing table assembly is used for driving the wafer to move in the space so as to be selectively matched with the probe card; the observation assembly comprises a driving assembly and four groups of visual monitoring assemblies, the four groups of visual monitoring assemblies are in one-to-one correspondence with the four groups of probe array assemblies, and the driving assembly is used for driving the four groups of visual monitoring assemblies to selectively monitor the corresponding probe array assemblies; the visual monitoring assembly comprises a camera and an adjusting assembly, and the adjusting assembly is used for adjusting the angle of the camera so as to monitor each probe body in the probe array assembly. The condition of the tip end of the probe body can be observed more accurately, so that the abrasion loss of the probe body can be compensated selectively, or the probe body or the probe card can be replaced selectively.

The embodiment of the invention discloses a probe card OS test device and a test method. The device comprises: a base; the probe card mounting assembly is mounted on the base; the movable carrying table is mounted on the base, and a conductive block and an insulating block are arranged on the movable carrying table; the movable carrying table is configured to drive the conductive block and the insulating block to move, so that the conductive block or the insulating block is in contact with each probe of a probe card on the probe card mounting assembly to form a plurality of test paths in one-to-one correspondence with the probes or to enable the top ends of the probes to be mutually insulated; and the open / short circuit test module is respectively connected with the conductive block and each probe of the probe card, and the open / short circuit test module is configured to be conducted with the test path or each probe according to a preset mode so as to carry out open / short circuit test on each probe of the probe card. According to the embodiment of the invention, the open / short circuit test of each probe of the probe card is realized.

The invention relates to a calibration method of CIS probe card measuring equipment, which comprises the following steps: step 1, before testing, debugging a product bracket for fixing a product to be tested to a preset height; 2, obtaining a plurality of calibration blocks consistent with the sizes of the to-be-tested products respectively, obtaining a plurality of calibration seats matched with the to-be-tested products respectively, and installing one calibration block in the product support through the corresponding calibration seat; 3, a light source is arranged in front of the calibration block, a light sensor is arranged behind the calibration block, and the horizontal angle and the vertical angle of the light sensor are adjusted, so that the planes where the light source, the calibration block and the light sensor are located are parallel; 4, dismounting the calibration block, replacing the calibration block with a corresponding product to be tested, and starting to test; and 5, after the test is completed, compensating the output value of the optical sensor based on a compensation algorithm to obtain a calibration result. Deviation of parameters such as light intensity and illumination of the light source at different positions can be eliminated, and optical parameter detection of the lens module is achieved.

The invention relates to the technical field of wafer testing, and particularly provides a clamp for wafer aging test, which comprises a PCB (printed circuit board), the PCB is fixedly arranged below an upper cover plate, a fixer fixes a probe card below the PCB, the PCB covers a lower cover plate, and the fixer and the probe card are both positioned in a test cavity. The inner ring of the fixator protrudes inwards in the radial direction to form an annular bearing platform, the multiple positioning columns are installed on the surface of the bearing platform in an array mode in the circumferential direction, multiple positioning holes are formed in the edge of the probe card in the axial direction, each positioning column corresponds to one positioning hole in position, the positioning columns are embedded into the positioning holes, and the probe card is fixed to the bearing platform. A plurality of abutting columns with adjustable resilience force are elastically arranged on the side face of each positioning column in the circumferential direction, the tail ends of the abutting columns abut against the inner surfaces of the positioning holes, and the abutting columns can elastically move in the radial direction of the positioning columns. According to the invention, the problem of poor contact effect between the probe and the contact caused by deformation of the probe card due to a high-temperature atmosphere during an aging test can be avoided.

The embodiment of the invention provides a semiconductor device and a preparation method thereof, and a chip detection system, relates to the technical field of chip detection, and is used for improving the test efficiency and reliability of a chip. The semiconductor device comprises a circuit substrate, an adapter plate, a connecting piece and a detection contact piece. The adapter plate and the circuit substrate are arranged in a stacked mode, the connecting piece is located between the adapter plate and the circuit substrate and connected with the adapter plate and the circuit substrate, and the detection contact piece is located on the side, away from the circuit substrate, of the adapter plate. The circuit substrate comprises a detection circuit, the adapter plate comprises an adapter line, and the detection contact is electrically connected to the detection circuit through the adapter line. The semiconductor device can be used as a probe card structure and applied to a chip detection system.

The invention provides a wafer testing device and method, and the device comprises a probe card table which comprises a probe card and a functional circuit, and the probe card is provided with a first-class bonding point and a second-class bonding point; the first-class bonding points and the second-class bonding points are electrically connected with chip pins of the wafer to be tested through probes; the two types of bonding points respectively correspond to different functional circuits; and the test console is in communication connection with the probe card table, is used for selecting a matched second-class bonding point according to the type of the wafer to be tested to be electrically connected with a chip pin of the wafer to be tested, and is also used for testing the wafer to be tested through the probe card table to obtain a test result. The probe card is provided with the first type of bonding points and the second type of bonding points, and the second type of bonding points can be flexibly selected according to the model of the to-be-tested wafer, so that the to-be-tested wafer is connected to different functional circuits, different functional tests are realized, the probe card table can be compatible with the to-be-tested wafers of different models, and the test efficiency is improved. The problem that existing ATE test equipment is poor in compatibility is solved.