2371 results about "Probe card" patented technology

Described herein is a probe card assembly providing signal paths for conveying high frequency signals between bond pads of an integrated circuit (IC) and an IC tester. The frequency response of the probe card assembly is optimized by appropriately distributing, adjusting and impedance matching resistive, capacitive and inductive impedance values along the signal paths so that the interconnect system behaves as an appropriately tuned Butterworth or Chebyshev filter.

The present invention discloses a method and system compensating for thermally induced motion of probe cards used in testing die on a wafer. A probe card incorporating temperature control devices to maintain a uniform temperature throughout the thickness of the probe card is disclosed. A probe card incorporating bi-material stiffening elements which respond to changes in temperature in such a way as to counteract thermally induced motion of the probe card is disclosed including rolling elements, slots and lubrication. Various means for allowing radial expansion of a probe card to prevent thermally induced motion of the probe card are also disclosed. A method for detecting thermally induced movement of the probe card and moving the wafer to compensate is also disclosed.

In a probe card assembly, a series of probe elements can be arrayed on a silicon space transformer. The silicon space transformer can be fabricated with an array of primary contacts in a very tight pitch, comparable to the pitch of a semiconductor device. One preferred primary contact is a resilient spring contact. Conductive elements in the space transformer are routed to second contacts at a more relaxed pitch. In one preferred embodiment, the second contacts are suitable for directly attaching a ribbon cable, which in turn can be connected to provide selective connection to each primary contact. The silicon space transformer is mounted in a fixture that provides for resilient connection to a wafer or device to be tested. This fixture can be adjusted to planarize the primary contacts with the plane of a support probe card board.

Interconnection elements for electronic components, exhibiting desirable mechanical characteristic (such as resiliency, for making pressure contacts) are formed by using a shaping tool (512) to shape an elongate core element (502) of a soft material (such as gold or soft copper wire) to have a springable shape (including cantilever beam, S-shape, U-shape), and overcoating the shaped core element with a hard material (such as nickel and its alloys), to impart to desired spring (resilient) characteristic to the resulting composite interconnection element. A final overcoat of a material having superior electrical qualities (e.g., electrical conductivity and/or solderability) may be applied to the composite interconnection element. The resulting interconnection elements may be mounted to a variety of electronic components, including directly to semiconductor dies and wafers (in which case the overcoat material anchors the composite interconnection element to a terminal (or the like) on the electronic component), may be mounted to support substrates for use as interposers and may be mounted to substrates for use as probe cards or probe card inserts. The shaping tool may be an anvil (622) and a die (624), and may nick or sever successive shaped portions of the elongate elements, and the elongate element may be of an inherently hard (springy) material. Methods of fabricating interconnection elements on sacrificial substrates are described. Methods of fabricating tip structures (258) and contact tips at the end of interconnection elements are also described.

Noise reduction for application of structural test patterns to a Device Under Test (DUT) is accomplished with a capacitor “booster” bypass network on the probe card in which the capacitors are charged to a much higher voltage V_boost than the DUT power supply voltage VDD. Charging the capacitors to a voltage N×VDD allows the buster network to store N times the charge of a conventionally configured capacitance network, and effectively provides N times the capacitance of the original network in the same physical space.

A probe card cooling assembly for use in a test system includes a package with one or more dies cooled by direct cooling. The cooled package includes one or more dies with active electronic components and at least one coolant port that allows a coolant to enter the high-density package and directly cool the active electronic components of the dies during a testing operation.

A needle fixture of a probe card and a needle fixing method in semiconductor inspection equipment include a needle fixture of a probe card in semiconductor inspection equipment including a printed circuit board; a needle fixture installed in the printed circuit board; a resin unit affixing a probe needle to the needle fixture using an adhesive; and a separation preventer for preventing separation of the resin unit from the needle fixture, wherein the separation preventer includes: a plurality of notches formed along a bottom surface of the needle fixture; and the adhesive filling the plurality of notches.

Disclosed is a probing method comprising steps of moving a main chuck to align an object of inspection on the main chuck with probes of a probe card located over the main chuck, moving the main chuck toward the probe card, thereby bringing electrodes of the object of inspection into contact with the probes, overdriving the main chuck toward the probe card while measuring a load applied to the object of inspection by contact with the probes and controlling the movement of the main chuck in accordance with the measured load, and inspecting the electrical properties of the object of inspection by means of the probes.

An improved interconnection system is described, such as for electrical contactors and connectors, electronic device or module package assemblies, socket assemblies, and/or probe card assembly systems. An exemplary connector comprises a first connector structure comprising a contactor substrate having a contact surface and a bonding surface, and one or more electrically conductive micro-fabricated spring contacts extending from the probe surface, a second connector structure comprising at least one substrate and having a set of at least one electrically conductive contact pad located on a connector surface and corresponding to the set of spring contacts, and means for movably positioning and aligning the first connector structure and the second connector structure between at least a first position and a second position, such that in at least one position, at least one electrically conductive micro-fabricated spring contact is electrically connected to at least one electrically conductive contact pad.

In a probe card for testing a plurality of semiconductor integrated circuits formed on a semiconductor wafer in a lump, only a faulty probe can be repaired without removing all probes from a wiring board. The probe card comprises a plurality of probes to be connected to respective testing electrodes formed on the semiconductor wafer, and wiring means provided with pads to be jointed to the probes, wherein the pads is formed on the upper surface of the wiring board.

A semiconductor die has conductors encapsulated in a dielectric material disposed on the active surface extending across the active surface from bond pads to one or more peripheral edges where the conductor ends are disposed at a side surface of the dielectric material. Stacks of such semiconductor dice, wherein one of the dice is configured with discrete conductive elements projecting from the active surface, and the exposed ends of the dice in the stack are connected with vertical interconnects. A probe card is disclosed having bond wires extending from more central contacts between more peripheral contacts to the edge of the probe card. A probe card having an upper layer bearing contacts and at least one window therethrough, a lower layer bearing conductive traces with ends exposed through the at least one window, and conductors extending from at least some of the contacts to conductive trace ends is also provided. Methods of making the foregoing structures are disclosed.

A probe card of a wafer test system includes one or more programmable ICs, such as FPGAs, to provide routing from individual test signal channels to one of multiple probes. The programmable ICs can be placed on a base PCB of the probe card, or on a daughtercard attached to the probe card. With programmability, the PCB can be used to switch limited test system channels away from unused probes. Programmability further enables a single probe card to more effectively test devices having the same pad array, but having different pin-outs for different device options. Reprogrammability also allows test engineers to re-program as they are debugging a test program. Because the programmable IC typically includes buffers that introduce an unknown delay, in one embodiment measurement of the delay is accomplished by first programming the programmable IC to provide a loop back path to the test system so that buffer delay can be measured, and then reprogramming the programmable IC now with a known delay to connect to a device being tested.

A conventional probe card is very complex in a support structure of probe terminals and it has been difficult to change an array of the probe terminals correspondingly to various arrays of electrode pads of an object to be checked. A contactor (1) of the present invention simultaneously sets its probe terminals in contact with a plurality of electrode pads of an object to be checked and electrical checking of the object is made once or a plurality of times. It has a plurality of first electrodes (3) arranged on a first substrate (silicon substrate) (2) and probe terminals (4) respectively provided on these electrodes (3). The probe terminal (4) has a conductive support (7) provided on the first electrode, elastic support plate (8) whose one end is fixed to the upper end of the conductive support column (7), and probe terminal (bump) 9 fixed to the free end portion of the elastic support plate (8).

A back-side imaging infrared microscope is integrated with a novel integrated-circuit probe station. The microscope is located below the silicon substrate of the integrated circuit, on the side opposite to the probe card. The electronic circuitry located on the top side of the substrate is imaged through the back side of the substrate and through a window sized to provide a view of a single integrated circuit and of the corresponding probe tips overlying the contact pads. Since the silicon substrate of integrated circuits is transparent to infrared wavelengths, the alignment between probe tips and contact pads is carried out with a clear view of both from the bottom of the substrate. Furthermore, emission images from the integrated circuit are taken during testing with the same microscope after electrical contact has been established.

A floating interface assembly provides signal paths between an integrated circuit (IC) test head and contact pads on a load board or probe card accessing an IC to be tested. Pogo pins or other contactors for contacting the contact pads are mounted on the interface assembly and linked to the test head by flexible conductors. The interface assembly is attached to the test head by springs to allow it the freedom to rotate to some extent about any axis. As the test head approaches the contact pads, alignment pins engage and orient the interface assembly so that its contactors will mate with the contact pads. As the contactors come into contact with the contact pads, the interface assembly adjusts the plane of the contactors so as to evenly distribute contact pressure over all contactor pads.