1093 results about "Test program" patented technology

The invention discloses a method for automatically generating a dynamic language test case based on a large language model, which comprises the following steps of: firstly, in a preprocessing stage, arranging related information of a to-be-tested program into prompts, analyzing a parameter type of the to-be-tested program by the large language model according to the prompts, and generating code information required by a test through an abstract syntax tree; in the test case generation stage, a dynamic multi-objective optimization algorithm is adopted, test cases are continuously crossed and mutated through branch coverage feedback, in the partial evolution process, test data which cannot be generated by conventional variation are generated by utilizing a large language model, and finally, the screened excellent test cases are organized into a complete test suite. In a program repair phase, the test suite is run to detect potential errors, the errors are analyzed and iteratively repaired using a large language model, and an executable and error-free test suite is generated. According to the method, the test coverage rate of the dynamic language is remarkably improved, and the achievement of a coverage target is accelerated.

The invention provides a large-model-assisted program function automatic perception fuzzy test method and system, electronic equipment and a computer readable storage medium. The method comprises the following steps: acquiring a source code and a description document of a to-be-tested program; analyzing the source code and the description document based on the first large model to obtain all functional parameters supported by the to-be-tested program; identifying a dependency relationship and a constraint condition among the functional parameters based on the source code and the extracted functional parameters; executing a fuzzy test based on the dependency relationship between the function parameters and the constraint condition; and automatically analyzing the test result of the fuzzy test based on the second large model to generate a structured report. According to the method, the coverage rate and effectiveness of fuzzy testing can be optimized, and the quality and safety of a complex software system are comprehensively guaranteed.

The invention discloses a law and regulation simulation test method, device and equipment for an intelligent driving algorithm and a storage medium, and relates to the technical field of intelligent driving, and the method comprises the steps: carrying out the high-precision three-dimensional reconstruction of a law and regulation test site according to collected data, and obtaining a three-dimensional reconstruction scene, and the collected data comprises a laser radar point cloud and a multi-view camera image; obtaining simulation working condition test data based on the three-dimensional reconstruction scene; training a network model according to the simulation working condition test data and the real vehicle working condition test data to obtain a vehicle dynamics network model; and based on an automatic test program, constructing a closed-loop simulation link according to the three-dimensional reconstruction scene and the vehicle dynamics network model, and carrying out regulation simulation test on an intelligent driving algorithm. According to the invention, the efficiency and accuracy of intelligent driving regulation testing can be improved.

The invention relates to the technical field of chip test engineering control, in particular to an active temperature control method and system for a chip aging tester, and the method comprises the steps: analyzing a test process according to test task parameters, and evaluating the expected thermal load change rate of a test chip, so as to dynamically generate a chip target junction temperature control curve; based on the chip target junction temperature control curve, the actual chip junction temperature and the current actual furnace temperature, the theoretical furnace temperature is obtained through a junction temperature closed-loop control algorithm, the furnace temperature compensation amount is calculated through a feedforward compensation algorithm in combination with the test state parameters, and the ideal furnace temperature is obtained according to the theoretical furnace temperature and the furnace temperature compensation amount; the actual temperature control quantity is obtained according to the basic temperature adjusting quantity and the temperature control compensation quantity, a preset chip target junction temperature control curve can be tracked more accurately, transient and steady state errors caused by test program switching and environment fluctuation can be more effectively restrained, and control over the chip junction temperature with higher precision and faster response is achieved.

The invention provides a test program generation method and device, computer equipment and a readable storage medium, and belongs to the technical field of software development. The test program generation method comprises the steps of obtaining a test requirement document of a target chip; analyzing the test demand document to obtain keyword information corresponding to the test demand document; based on a preset test development model and the keyword information, obtaining test demand development model information; according to the test requirement, developing model information, calling at least one artificial intelligence interface in a preset large language model, and generating a plurality of test codes; and according to the plurality of test codes, generating a target test program corresponding to the target chip. According to the method, the effects of shortening the development period of the test program and improving the development efficiency of the test program can be achieved.

The invention relates to the technical field of storage, in particular to a test method, device, equipment, system, medium and product, and the method comprises the steps: obtaining a test management command of an input and output management command representing error injection in a real working environment of a disk array controller chip; the command is analyzed to obtain the error injection test type and the corresponding related parameters, and the error processing mode is changed according to the error injection test type, so that the exception is only reported and not processed when encountering the exception in the test, the interference of exception processing on the test process is avoided, and the test can be smoothly carried out according to the preset error injection scene; and according to the error injection test type and the related parameters, constructing analog input and output and injecting the analog input and output into the target hardware unit to perform an execution behavior test, thereby realizing accurate test of the specific hardware unit in a specific error scene in an environment of performing input and output test based on a read-write input and output test program, so that the test is more comprehensive, and the test efficiency is improved. And the test precision is higher.

The invention discloses a DCS controller application program access control automatic test method and system, and belongs to the technical field of DCS controller testing, and the method comprises the steps: receiving a test program and a configuration file; editing a configuration file, and formulating controller equipment connection information, a test file directory, connection retry times and module state change parameters based on the configuration file; an application program access control strategy is configured, an application program access control strategy function service is verified, and the state of an application program access control function module is set; and generating and outputting a test report based on an execution result of the test program. According to the method, the test speed and quality are improved, and the test cost is reduced.

The invention discloses a computer board card testing method and system, and relates to the technical field of computer board card testing, the system comprises a central server and at least one intelligent test fixture, the model of a to-be-tested board card is identified through the intelligent test fixture to obtain test information, and the test information is sent to the central server; and the central server determines a parallel test program corresponding to each to-be-tested board card according to the test information, and performs a synchronous test on each to-be-tested board card by running the parallel test program to obtain a test result corresponding to each to-be-tested board card. In the process, the model of the to-be-tested board card is automatically identified through the intelligent test fixture, the test program is automatically determined through the central server, automation of the test process is achieved, the problem of low efficiency caused by manual operation is avoided, and meanwhile, the test efficiency of the computer board card is improved by synchronously testing multiple to-be-tested board cards.

The invention discloses a multi-task parallel test method for a multi-station FCT test system, and relates to the technical field of parallel tests.The method comprises the steps that a plurality of target PCBA products are loaded to corresponding stations on a needle bed respectively, and starting signals are obtained; scanning the target PCBA product to obtain a plurality of pieces of production work order information and a plurality of test programs; executing a plurality of test programs to obtain a plurality of test signal sets; carrying out test qualification authentication; load working signals are collected; and judging whether the plurality of load working signal feature sets meet a preset requirement or not, and displaying a qualified station of the product test through a machine indicator lamp. The technical problems that PCBA product testing efficiency is low, accuracy is difficult to guarantee and product quality control is not comprehensive in the prior art are solved, and the technical effects that the efficient process of conducting product testing at multiple stations at the same time is achieved, the testing efficiency and accuracy are improved, and the product quality is effectively guaranteed are achieved.

The utility model discloses a DBC automatic test workstation, which comprises a test mechanism, a movable truss and a machine table, the test mechanism comprises a first test station, a second test station and a third test station, and the first test station, the second test station and the third test station are all installed on the machine table. The two ends of the movable truss are installed on the two sides of the machine table, the moving path of the movable truss is arranged above the first testing station, the second testing station and the third testing station, the movable truss is used for testing the bonded DBC module, the equipment can integrate various testing machines, and the testing efficiency is improved. Detection items such as safety testing, static testing and dynamic testing are automatically completed according to program setting, different testing processes can be achieved by calling testing programs, meanwhile, the equipment has the function of recording and storing testing data, the testing items are flexibly configured, and the testing efficiency is remarkably improved.

The invention relates to the technical field of computers, and discloses a method for generating a test program for testing a Solidiity smart contract compiler, which comprises the following steps of: defect directional triggering: inserting a Solidiity variable through an inline assembly block to expose an optimizer defect, and limiting a dynamic array / character string to be expanded to at most one element at a time; semantic consistency control: eliminating intermediate representation behavior differences by adopting a placeholder counter, and preventing border crossing through an array length check instruction; and resource conflict arbitration: managing EVM stack variables by using a block scope, and nesting hierarchies based on a depth threshold truncation function. Through triple innovative design of defect directional triggering, semantic consistency control and resource conflict arbitration, the fundamental contradiction among semantic ambiguity, low defect detection rate and resource constraint in the Solidity compiler test is systematically solved.

The invention belongs to the field of software testing, and relates to an ROS 2 software package defect detection method based on a large language model and coverage rate guidance. According to the method, function information is extracted from a to-be-tested program, and a regular expression is used for analyzing function definition, parameter characteristics and other information; the method comprises the following steps: presetting verification standards related to a to-be-tested program, and extracting physical constraints and document constraints from the verification standards; integrating the extracted function information, physical constraint and document constraint into accurate information, filling a cue word template with the accurate information, inputting the cue word template into a large language model, and generating an initial test seed; a mutation strategy is introduced, and diversified mutation operation is performed on the generated seeds, so that test cases with higher diversity are generated; optimizing the test case by adopting a coverage rate guiding mechanism, and guiding to generate a new test case by monitoring the coverage rate in real time; through a defect verification mechanism, dominant defects such as program crash and the like can be detected, and hidden defects such as violation of physical constraints or violation of document constraints and the like can be identified.

The invention provides a real-time stability test platform and method for data acquisition of a power distribution control chip. The real-time stability test platform comprises a test power grid, an acquisition system, a to-be-tested control chip, a high-low temperature alternating box, an upper computer and a clock module, the upper computer is used for storing a plurality of test programs, controlling the high and low temperature alternating box and the test power grid to obtain different working conditions, calling the corresponding test programs according to the different working conditions, sending out corresponding control instructions, and performing stability analysis on the control chip to be tested according to the first test data and the second test data; and obtaining a stability test result. The problem that in the prior art, a single parameter testing method is difficult to comprehensively evaluate the stability of a control chip in an actual complex environment in real time is solved; according to the invention, the stability of the control chip is efficiently tested in real time, and the problems of difficult simulation of complex working conditions and multi-parameter coupling influence can be solved.

The present application relates to the technical field of computers, and provides an interruption control method and apparatus, an electronic device, a computer program, and a computer-readable storage medium. The method comprises: acquiring a first execution result of a design under test for a benchmark test program and a second execution result of a software emulator for the benchmark test program; and when an interruption condition is satisfied, interrupting the operation of the design under test, wherein the interruption condition comprises at least one of the following: the first execution result does not match the second execution result; a hardware buffer zone corresponding to the design under test is full; the hardware buffer zone is used for recording operation data of the design under test; a software buffer zone corresponding to the software emulator is empty; and the software buffer zone is used for recording operation data of the software emulator. According to embodiments of the present application, in hardware verification, the execution results of the design under test and the software emulator can be automatically compared and checked, and interruption can be automatically triggered, thereby achieving a better debugging capability.

According to the automatic test error-proofing detection method and detection system disclosed by the invention, after a test instruction is received, verification requests generated by bar codes of a needle bed upper mold and a needle bed lower mold are received; sending to a selected product test program to judge whether the needle bed upper die and the needle bed lower die and whether the needle bed name is matched with the current product test program or not; if not, stopping the test, otherwise, after the to-be-tested product is placed in place, receiving a serial number of the to-be-tested product generated by the bar code of the to-be-tested product, and querying and obtaining internal card binding information of the corresponding to-be-tested product; controlling the test tool to start and electrify the to-be-tested product, acquiring identity information of an internal clamping piece actually mounted in the to-be-tested product, comparing the identity information with inquired binding information of the internal clamping piece, if the identity information is consistent with the binding information of the internal clamping piece, carrying out subsequent function test, otherwise, sending error information of the internal clamping piece, and controlling the test tool to pull open an upper die and a lower die of the needle bed; therefore, automatic error-proofing detection of each module test of the industrial control system is realized.

The utility model provides an aircraft control assembly rapid troubleshooting test device, comprising a test host computer and a test circuit board, the test host computer sends a test control instruction to the test circuit board, and the test circuit board outputs a discrete signal for the test of a to-be-tested device to the to-be-tested device after receiving the test control instruction. And after the to-be-tested device receives the test discrete signal, test feedback information is transmitted to the test circuit board, and the test circuit board sends the test feedback information to the test upper computer, so that the test upper computer processes the test feedback information to judge whether the function of the to-be-tested device is normal or not. Compared with a traditional test bench test method, the method has the advantages that functions which cannot be realized by a traditional test bench can be realized by using existing software and hardware, the time for completing the test of a single aircraft control assembly is shorter, the test efficiency is higher, a more efficient and effective test program is realized, and the overall quality and reliability of the aircraft control assembly are improved.

The invention discloses a JavaScript language security reinforcement method based on a virtual machine technology, and belongs to the field of JavaScript languages. The method comprises the following steps: firstly, building a test system comprising a compiler, an assembler, a virtual machine and a packer; then, a developer submits the JavaScript program or the function requirement to be tested to the test system; a test system constructs a to-be-tested program by using a Yarn environment, and a compiler compiles a JavaScript source code and analyzes and converts the JavaScript source code into an intermediate representation IR; the assembler converts the IR into byte codes, and converts the relative reference address into an absolute address by generating a character string table and a lookup table; and the generated byte code is optimized. The test system submits the optimized byte code to the virtual machine, the virtual machine runs a byte code program, and after execution is completed, the test system collects an execution result of the virtual machine and compares the execution result with an expected result; and finally generating a test report and delivering the test report to developers for confirmation. According to the method, the security of the JavaScript code is enhanced through a virtualization technology, and malicious access and analysis are prevented.

The invention provides a multi-core consistency test method and device, electronic equipment and a storage medium, and relates to the technical field of communication. Comprising the following steps: determining a plurality of test parameters and a value range of each test parameter according to a test requirement of tested equipment; generating a plurality of groups of test parameter combinations according to the value range of each test parameter; according to the multiple groups of test parameter combinations, creating a test program corresponding to each processing core in a plurality of processing cores participating in the test in the tested equipment, and deploying the test program corresponding to each processing core to each processing core; running the test program on each processing core, and controlling the corresponding processing core to perform consistency test verification by the test program according to each group of test parameter combination to obtain a test result corresponding to each group of test parameter combination; and according to the test result corresponding to each group of test parameter combination, analyzing to obtain a consistency test result between the processing cores. According to the method, the test parameter combination capable of comprehensively covering more test scenes can be generated, and the test comprehensiveness and accuracy are improved.

The invention discloses an aero-engine compiler fuzzy test method and system based on a large language model. In a variation prompt generation stage, a seed program library is constructed by using embedded programs of various structures and compiler test suite programs, variation operators are selected through diversified guide strategies, and variation prompts are constructed based on a prompt template. In the test generation stage, a large language model is used for generating a variant program with complex data flow and control flow so as to enhance the test coverage rate of a compiler; global and local variables are monitored by inserting test output for the program, so that the program can effectively find out silent miscompilation errors with the maximum harm; in addition, a front-end error feedback strategy is designed, so that the effectiveness of a large language model generation test program is improved. In the differential testing stage, random difference testing and testing under different optimization levels are combined, so that the defects of the middle and rear ends of the compiler are detected. According to the method, the coverage rate of compiler testing can be increased, and silent miscompilation errors can be detected.

The invention discloses a controller automatic test tool based on feature recognition and a test method thereof, and relates to the technical field of automatic test. The controller automation test tool comprises an image acquisition unit used for capturing display content of a controller screen; the electromechanical execution unit comprises a base positioning mechanism, a top pressing mechanism, a rear side butt joint mechanism, a key triggering mechanism set and a vibration mechanism. The control unit is respectively in communication connection with the image acquisition unit and the electromechanical execution unit, and is used for controlling the action of the electromechanical execution unit and receiving and analyzing the image information captured by the image acquisition unit; and the double-starting switch is connected with the control unit and needs to be synchronously triggered to start a test program. By integrating image acquisition and an electromechanical execution system, automatic identification of the display state of the controller screen and automatic execution of function operation are realized, and the consistency of the test efficiency and the test result is improved.

The invention discloses a system and a method for testing and analyzing the single event effect of a high-capacity nonvolatile memory. The system comprises an upper computer module, an FPGA (Field Programmable Gate Array) control module and a programmable power supply module. The system is used for testing and analyzing various single event effects of a high-capacity nonvolatile memory chip in a dynamic working mode. And according to the error data read from the memory in the dynamic working mode, presetting error bitmap rules of various single-particle function interruptions in an FPGA test program, carrying out real-time analysis and identification on the various single-particle function interruptions, and discriminating single-particle upset of the memory unit. According to the system, testing and real-time analysis of various complex single event effects of the high-capacity nonvolatile memory can be achieved, then radiation hardening and evaluation can be conducted on the sensitive position of a memory chip, and high pertinence is achieved.

A memory test method includes: obtaining a preset memory and a memory to be tested; setting the memory to be tested as a reserved memory; starting an operating system, wherein the operating system runs in the preset memory; and executing a memory test program to test the memory to be tested, wherein the memory test program runs in the preset memory.

The invention relates to a congestion game-based micro-service resource adaptive management method under a cloud native architecture, and belongs to the technical field of micro-service resource dynamic optimization configuration. According to the method, various fine-grained resources can be dynamically adjusted, and the method comprises the steps that firstly, a DeathStarBench benchmark test program is operated by means of a Docker platform to be used for simulating a real application scene; secondly, collecting'resource-performance 'data of all micro-service nodes on a critical path in the application program; then, on the basis of a semi-supervised meta-learning mechanism, self-generating tasks on a label-free data machine, quickly learning the correlation and difference between the tasks, generalizing the learned knowledge into the constructed classifier, and finely adjusting parameters through a label data set to accurately predict the performance of the micro-service node; and finally, optimizing a resource allocation strategy by using a Nash equilibrium theory in the game theory, thereby achieving the purpose of improving the resource utilization rate of the micro-service node while meeting the end-to-end service quality of the task.

The invention relates to the technical field of testing of structural components or equipment, in particular to a working condition durability testing method and device for a wheel hub motor angle module and electronic equipment. The method comprises the steps that a whole vehicle longitudinal dynamics model and a longitudinal dynamic mechanics joint simulation platform of a vehicle are constructed based on whole vehicle parameters of the vehicle carrying a hub motor angle module, then whole vehicle CLTC working condition simulation analysis is conducted on the vehicle, a preset steering test is conducted on the vehicle, a working condition durability vehicle test program is generated based on test data and an analysis result, and the working condition durability vehicle test program is obtained. And designing a tool clamp meeting a preset test condition based on the whole vehicle drum test bench, and constructing a test bench in combination with the whole vehicle drum test bench, so as to perform a working condition durability test of the wheel hub motor angle module by using the test bench. Therefore, the technical problems that the universality of the related technology is poor, the related technology is difficult to adapt to the wheel hub motor angle module with a special structure, and the durability test of the longitudinal force working condition and the lateral force working condition cannot be considered during the durability test are solved.

The invention provides a radar processing module test system, and belongs to the technical field of lightning protection, and the test system comprises a test tool which is used as a carrier plate for testing a processing module and is used for providing high-speed PCIE bus interface test resources; and the hardware core machine is used for integrating the test function module and the main control unit, test software is configured in the main control unit, the test software adopts a layered architecture design, and the test software with the layered architecture comprises an application layer, a network layer and a virtual driving layer. The radar processing module test system provided by the invention adopts test software with a layered architecture, and has the attributes of flexibility, high reusability and high expansibility, and a test program is independent of a test component. When the test assembly needs to be replaced, a new instrument driving program can be used under the condition that the test program is kept unchanged, so that the total cost of creating and maintaining the test program is reduced.

The invention provides a JAVA fuzzy testing method based on program analysis. The JAVA fuzzy testing method comprises the steps that a binary file package of a tested program is obtained; aST analysis is carried out on the binary file package; all layers of nodes of a syntax tree of the binary file package are analyzed, and all conditional branches under all classes and all methods are obtained; analyzing a calling link relationship of each branch judgment parameter of the binary file package through reverse derivation of calling of each layer of nodes; and judging whether the calling link relationship is single-interface calling or cross-interface calling. According to the JAVA fuzzy test method based on program analysis provided by the invention, the interface parameters and the test case data of the interface calling sequence can be obtained through program analysis, and the service logic which is difficult to explore by fuzzy test can be greatly increased, so that the coverage rate of the tested object is increased, and the test efficiency is improved based on the improvement of the coverage rate. The number of paths explored by the fuzzy test is increased, and more non-overdue defects can be prompted to be found.

The invention discloses a heterogeneous computing architecture testing method of an ISP module, and belongs to the technical field of heterogeneous computing. According to the technical scheme, a high-level synthesis tool is used for generating and verifying an IP to be tested; a target algorithm IP application system is constructed by using a microprocessor IP hardcore and an AXI bus connector of a heterogeneous computing platform, a target algorithm IP core is operated by using software to carry out an application test, and actually measured data is stored in a nonvolatile storage medium; transplanting an operation system and an OpenCV library to the heterogeneous computing platform for the development board, and storing a target algorithm software operation result to a data file after a test program is operated; and evaluating the function correctness and the performance index of the target algorithm IP by using the actually measured data and the software operation result. The method has the advantages that effective testing and optimization of the heterogeneous computing architecture of the ISP module are achieved through the software and hardware co-simulation and IP core verification technology, middle-level optimization, a comprehensive testing framework and other methods, and powerful support is provided for technology development, application and popularization in related fields.

The invention relates to a test case generation method and device, computer equipment and a storage medium. The method comprises the steps of generating an initial test case according to a program structure of a to-be-tested program, wherein the initial test case comprises an initial execution path; according to the initial execution path, the path set of the to-be-tested program and the fitness function of the to-be-tested program, optimizing the initial test case, and generating a target test case of the to-be-tested program; the fitness function comprises a static fitness function and a dynamic fitness function, and the dynamic fitness function changes along with the number of iterations for optimizing the initial test case. The initial test case is generated in combination with the program structure of the to-be-tested program, so that the initial test case is more matched with the to-be-tested program, the accuracy of the initial test case is improved, updating of the initial test case is more effective due to the dynamic fitness function, and the matching degree of the target test case and the to-be-tested program is further improved.

The invention relates to the technical field of energy storage systems, and discloses an energy storage system upgrading test method and device, computer equipment and a storage medium, and the method comprises the steps: constructing an upgrading task on an Internet of Things platform through a preset test program; an OTA upgrading command is issued to at least one target device through the upgrading task, and the OTA upgrading command is used for controlling the target device to execute upgrading operation of the energy storage system; receiving progress data reported by the target equipment, and updating the running state of the target equipment on the display component according to the progress data until the upgrading operation is executed; and obtaining a state image of the display component, and determining whether the energy storage system in the target equipment is successfully upgraded according to the state image to obtain a test result. The problems that manual operation is tedious and prone to errors, upgrading judgment is inaccurate and success rate statistics is low in the CAN communication upgrading test of the BMS of the household storage battery pack are solved.

The invention provides a test system for prototype verification of a PCIE Switch switch chip. The system comprises an FPGA assembly, RC simulation equipment, EP simulation equipment and monitoring analysis equipment. In the application, the FPGA component integrates the tested component PCIE Switch and the test auxiliary component, supports hardware-level reconfiguration, can simulate topology and abnormal scenes of any RC device or EP device on the same platform, and does not need to replace physical hardware. Compared with an existing test system which depends on serial port log output faults, the method has the advantages that the error state is captured through FPGA hard logic, nanosecond fault tracing is achieved, and the test efficiency can be effectively improved. Besides, RC simulation equipment defines a test program through software, dynamically generates flow (such as normal / abnormal messages), and can replace physical RC equipment; the EP simulation device can respond to the test flow in real time, and can support multi-protocol version compatibility verification. Automatic testing of prototype verification of the PCIE Switch chip can be achieved through the monitoring and analyzing device, manual intervention is not needed, and input of testing manpower can be reduced.