The application discloses a three-dimensional stacked
chip testing method based on multi-interface cooperation and parallel
broadcasting, and relates to the technical field of
integrated circuit testing.The method sets a
USB controller on a master control
chip layer to preload 116 bit testing instruction streams to a PRO_RAM on the
chip;the states of each layer are configured by issuing instructions through JTAG;then, a coordinator FSM runs in a three-stage pipeline mode of instruction fetching,
broadcasting and executing, instruction parameters are synchronously distributed to BIST controllers of target
layers by using a source fan-out
broadcasting bus;by introducing physically isolated shadow registers and active registers in the BIST controllers, the next group of instructions are prefetched and loaded in the background while the current task scanning and shifting are performed, and zero-bubble task switching is achieved;the application effectively reduces the transmission amount of repeated instructions, eliminates the
time domain coupling of configuration and execution in the traditional architecture, and significantly improves the testing efficiency of the heterogeneous stacked chip.