537 results about "Test sequence" patented technology

The invention discloses an LCD display screen display fault judgment method, and relates to the related technical field of LCD display screen detection. Comprising the steps of synchronous acquisition and preprocessing of multi-source signals, feature extraction, establishment of a fault judgment model, generation of a dynamic test mode, dynamic generation of a targeted test image according to a preliminary detection result to excite a potential fault, iterative optimization of a test sequence by a Q-learning algorithm, and fault diagnosis. The invention also discloses a system for judging the display fault of the LCD screen. The system comprises a multi-source data acquisition module, a central processing unit, a memory and a user interface. Various data including display data, driving voltage / current monitoring data, temperature distribution, environment parameters and the like are synchronously collected through the optical sensor, the electric signal probe, the thermal imaging module and the environment sensor, all-directional information of the LCD display screen in the operation process can be obtained, and limitation and misjudgment possibly caused by a single data source are avoided.

The invention discloses an insulation detection method for an electric automobile, belongs to the technical field of high-voltage safety monitoring of the electric automobile, and solves the problem that the insulation detection precision is reduced due to electromagnetic interference, impedance fluctuation and capacitive effect coupling in a dynamic load switching process. According to the scheme, a test sequence of discrete frequency points is applied to a high-voltage system; measuring a response current value through a current sensor and calculating a ground distributed capacitance value; connecting a test voltage source between positive and negative electrodes of the high-voltage system through a coupling circuit; applying a first pulse signal during no-load, dynamically setting the width according to the capacitance value, measuring a first response current value, and calculating an initial insulation resistance value; a second pulse signal with the same parameter is applied in the load state window, a second response current value is measured, and differential filtering is carried out in combination with the initial value to eliminate load noise; and comparing the filtered insulation resistance value with a threshold value, and outputting a fault signal when the insulation resistance value is lower than the threshold value. The method is used for monitoring the insulation state of the high-voltage system in real time and accurately early warning faults.

The invention relates to an efficient test optimization method, system and device for chip test equipment, and the method comprises the steps: obtaining the equipment state data and test management information of the chip test equipment, carrying out the test unit division of the equipment state data based on the test management information, and obtaining the regional test information; acquiring real-time operation data of the chip test equipment, and performing matching analysis on the real-time operation data and the regional test information to obtain a real-time test task group; acquiring chip performance data acquired by the chip test equipment, performing load prediction on the regional test information to obtain a test load trend, and performing resource planning analysis with a real-time test task group to obtain an initial test scheme; performing exception identification on the chip performance data to obtain chip exception information; and performing global optimization on the initial test scheme according to the priority test sequence to obtain a global test strategy. According to the invention, fine management of different test tasks can be realized.

A performance testing apparatus and testing method for a data cable, belonging to the technical field of data cable performance testing. An arranged testing unit (2) can carry out three separate testing contents, namely a tensile strength test, a torsion test, and a wear resistance test on the basis of testing sequence requirements, and can also separately carry out pairwise combination tests or simultaneous testing of three items, so that a testing result is ensured to be more accurate while the testing contents are flexible. A positioning unit (3) comprises a fixture which consists of a set of a rubber pad one (340) and a rubber pad two (3710) that are oppositely arranged and which is in contact with the data cable. A rubber material is unlikely to damage the outer skin of a data cable, and the end surfaces of the rubber pad one (340) and the rubber pad two (3710) in contact with the data cable are arranged in a concave-convex shape, so that the data cable is better fixed and clamped, thereby preventing the two ends of the data cable from being loosened during testing and affecting testing progress and testing results.

The invention relates to the technical field of chip testing, in particular to a testing method and system for a chip simulation model. The method comprises the following steps: collecting a target chip simulation model and performing time sequence compensation to generate jitter compensation data, then performing eye pattern reconstruction to obtain waveform eye pattern data, performing amplitude normalization and time sequence phase correction on the waveform data to obtain purified alignment data, and performing phase correction on the purified alignment data. The method comprises the following steps: generating main modal data through orthogonal mapping processing and modal projection analysis, constructing nuclear space data, carrying out manifold cognitive aggregation to generate test coverage features, carrying out boundary analysis and density distribution analysis on the features to obtain clustering boundary data, finally adjusting and optimizing boundary precision, executing an adaptive test sequence, and generating a test case result. According to the invention, a more efficient chip simulation model test method is realized.

The invention discloses an unmanned aerial vehicle automatic test method, which comprises the steps of building a high-fidelity semi-physical simulation platform which comprises an unmanned aerial vehicle motion simulator, a three-dimensional environment simulator, a flight control module and a ground control station, and loading a complete machine fault model and a dynamic environment model; designing an intelligent multi-fault injection scheme, and defining a single fault scene, a combined fault scene and a fault evolution scheme; configuring a dynamic environment simulation scene including static environment parameters, dynamic environment elements and environment, and a fault interaction scene; executing a self-adaptive test process, automatically generating a test case, intelligently scheduling a test sequence and dynamically adjusting test parameters; and performing multi-source data intelligent analysis and evaluation, collecting test data, performing fusion analysis on fault influence, and generating an evaluation report. By constructing a whole machine fault and dynamic environment model, the scene authenticity is improved by 40%, and for example, the motor fault yaw deviation under strong wind is closer to a real machine compared with a traditional method.

The invention relates to a test case generation method and system based on an industrial agent. The method comprises the steps that an industrial data set is acquired, and a system dependency model is constructed; generating a path coverage test sequence through the first agent; generating a boundary value test data set through the second agent; generating abnormal test scene information through a third agent; and generating a test case set based on the path coverage test sequence, the boundary value test data set and the abnormal test scene information. In conclusion, by constructing the system dependency model and utilizing the multi-agent collaborative analysis process logic path, boundary condition and dependency relationship, the multi-surface coverage of the industrial control system test scene is realized, the automation of the test case generation is realized, the effects of improving the generation efficiency and enhancing the comprehensiveness of the test coverage are achieved, and the method is suitable for industrial control system test. Especially for the coverage of boundary conditions, abnormal scenes and concurrent paths, the manual dependence is reduced, and the reliability and consistency of the test are improved.

Systems and methods for verifying content delivery in a content delivery network (CDN) are described. Content retrieval and routing in a CDN are tested using multiple test sequences that are each assigned to a different value of a parameter P and are generated using the assigned value of P. A client device can verify whether a test sequence received at the client device matches a test sequence requested by the client device (e.g., the correct content was) and verify that the received test sequence is assigned to the same value of P as the requested test sequence. The value of P assigned to the received test sequence can be extracted, by the client device, from the received test sequence to determine which test sequence was actually received, thereby providing information that can be used to help debug content delivery errors.

The invention relates to the technical field of chip testing, and discloses a clock reset system-level verification method and device based on general verification methodology, and the method comprises the steps: firstly analyzing a clock topological relation defined in a system control unit architecture document, and generating a clock reset information table; on the basis of the information table, an executable verification environment component and a virtual interface component are automatically generated through a script, the verification environment component comprises an excitation forwarding and processing component and can generate clock and reset signals matched with framework definition, and the virtual interface component can generate actual clock and reset waveforms; and finally, constructing a verification platform based on the components, calling the excitation sequence in the parameterized test sequence library, and carrying out system-level clock reset verification on the digital chip. And meanwhile, the parameterized test sequence library supports flexible adjustment of a verification scene and ensures that a test case fits a clock frequency defined by an architecture document, and a reset mechanism can improve the efficiency, accuracy and reliability of digital chip clock reset system-level verification.

The invention relates to the technical field of safety limit switch testing, in particular to a safety limit switch testing method, system and device and a medium. The method comprises the steps that firstly, model information of a to-be-tested switch is acquired, and test parameters are called from a preset evaluation model; by analyzing historical test data of elevator switches of the same batch, a test sequence of actual action point dispersion analysis and target interval dense sampling is established, and a reference action point and a sampling frequency are determined; the system drives the limit switch to move according to the called reference action point and the sampling frequency, the actual action point of the switch is measured, and the system carries out reciprocating motion test at the position of the actual action point to obtain action stability data; meanwhile, high-frequency continuous sampling is carried out in a switch on state to obtain time sequence changes of on-resistance values; and finally, according to the time sequence characteristics of the on-resistance and a preset calculation method, calculating a switch performance index, generating a test result and printing a unique SN label, thereby realizing whole-course tracing of the product.

The invention discloses a dynamic load simulation test method and device for a warping winch, and relates to the technical field of warping winch simulation tests.The method comprises the steps that historical working condition data associated with a target working scene of the warping winch is retrieved, and a typical load working condition set is analyzed and constructed; obtaining design working condition information, and constructing a design load intensity sequence based on a mapping rule; traversing the intensity sequence, and performing matching in the typical working condition set to generate an initial test sequence; random disturbance is applied to N typical load working condition sections, iterative optimization is carried out through an optimization algorithm, and an iterative test sequence is obtained; and smoothing the load switching points of the sequence, inputting the load switching points to a simulation test device, and executing a dynamic load test. Therefore, the technical effects of diversification of test scenes, simplification of parameter setting, improvement of the matching degree with actual working conditions and enhancement of test accuracy are achieved.

The invention relates to an efficiency test method and device for industrial control equipment based on an LLM large model. The method is applied to an efficiency test system of industrial control equipment. The system comprises an industrial control target range platform, a tool library, a pre-trained LLM large model and an analysis module. The method comprises the following steps: simulating a test environment of to-be-tested target industrial control equipment based on an industrial control target range platform, and collecting operation data of the target industrial control equipment; inputting the operation data, the test task requirements of the target industrial control equipment and a tool library into a pre-trained large model to obtain a test scheme; the test scheme comprises tools required for completing the test task and a test sequence and test parameters of each tool; according to the test scheme, the corresponding tools are used in sequence for performance test, and test data of the tools are sent to the analysis module; and analyzing the test data by using an analysis module, and generating an efficiency test report of the target industrial control equipment. According to the invention, the efficiency test of the industrial control equipment can be efficiently and accurately completed.

The invention provides a chip aging test system and method based on a field programmable gate array, and the system is characterized in that a drive control panel comprises a processor module, a communication interface module, and an external connector module; the external connector module comprises a first connector and a second connector; the processor module is used for receiving a test instruction sent by the upper computer through the communication interface module, generating a test signal and a control signal, and receiving a test result acquisition instruction sent by the upper computer after the communication interface module sends response information to the upper computer; the first end of the processor module is also used for sending the interrupt information to an upper computer through the communication interface module and displaying the interrupt information; and the third end of the processor module is connected with the second connector and is used for outputting the control signal to the test board. Test signals are output to multiple groups of tested chips of the test board in parallel through the first connector, the second connector controls the test sequence of the to-be-tested chips on the test board, and hundreds of chips are driven by a single drive board and used for aging test.

The invention discloses a function switching device for transformer testing and a testing system thereof, relates to the technical field of transformer testing, is used for solving the problem of low testing efficiency, and is used for setting a switching time reference by acquiring transformer capacity information and detecting the number of closed relays of testing nodes and loop resistance. Analyzing a resistance fluctuation index and loop harmonic characteristics by combining historical loop resistance data, correcting a switching time reference, detecting three-phase winding current, generating a current balance index, evaluating a fault risk level, screening and marking to-be-tested nodes according to the fault risk level, and after the current test node is tested, determining the current test node according to the fault risk level. And performing test processing on the marked to-be-tested nodes based on the corrected switching time reference, thereby realizing intelligent selection of a transformer test sequence, improving test efficiency and ensuring electrical state stability and test precision of each test node.

The invention belongs to the field of garment processing, and particularly relates to a garment color fastness gradient detection method based on visual processing, which comprises the following steps: carrying out standardized color fastness test on a garment sample, and collecting corresponding picture samples and color fastness parameters according to a test time sequence; preprocessing the collected picture samples according to a test time sequence, wherein the preprocessing comprises denoising, enhancement and color correction of the picture samples; extracting color features and texture features of the preprocessed picture samples, performing gradient classification on various picture samples according to a test time sequence, and establishing a color feature data set, a texture feature data set and a color fastness parameter data set which are associated; through standardized testing and automatic image acquisition, hundreds of samples can be processed at a time, predicted values are directly output based on a trained model, physical testing steps are reduced, key areas such as necklines and cuffs are positioned through area segmentation, local area testing is rapidly carried out, and compared with global testing, the method has the advantages of being high in pertinence and accuracy, and missing detection can be avoided.

The invention relates to the technical field of data processing, and provides a test case generation method and device, equipment, a storage medium and a program product, and the method comprises the steps: obtaining a Petri net model of a to-be-detected software system; based on a Petri network model, constructing an initialization environment for deep reinforcement learning; performing deep reinforcement learning training in the initialization environment to obtain a decision model for generating a test sequence; and generating a test sequence according to the decision model. By implementing the technical scheme disclosed by the invention, the generation efficiency of the test case can be improved.

The invention discloses a DO385 test case set-based ACAS X software standard conformity verification method, which comprises the following steps of: generating a test sequence table according to 7 groups of 422 test cases specified by DO385 through software programming, and supporting realization of various programming languages; aCAS X software is operated, and TRM, STM and COST result files are generated by taking the test sequence table cases as input; comparing a result file with a standard result file provided by DO385 through computer software programming, recording variables and errors which do not meet the tolerance requirement, and updating the test sequence table according to a comparison result; correcting the ACAS X software for the failed use case, and iteratively testing until all 422 test cases pass; the standard conformity can also be compared in batches and visually by using automatic folder comparison software. By setting and updating the test sequence table, a systematic and optimized test process is provided, iteration is achieved, the implementation mode has flexibility and universality, and an effective method is provided for standard conformity verification of ACAS X software.

The invention relates to the technical field of environment adaptability testing, and discloses an identification key performance comprehensive environment adaptability testing system. The system comprises a multi-environment factor acquisition and processing module for acquiring data and performing normalization preprocessing; the environment scene dynamic modeling module is used for constructing a multi-dimensional association graph and updating a topological structure; the performance index evaluation module evaluates a performance degradation index in a composite environment by means of a spatial-temporal feature fusion algorithm; the failure mode prediction module is used for generating a potential failure mode under multi-environment coupling according to the performance degradation trend and the stress accumulation effect; the environment tolerance analysis module is used for integrating data to establish a virtual model and outputting a tolerance residual error of a specific environment section; the test scheme optimization module is used for generating a self-adaptive test sequence according to the residual error and the map; and the environment scene simulation control module is used for regulating and controlling parameters of the test cabin in combination with multiple information. The system can comprehensively and accurately evaluate the performance and endurance capability of equipment in a composite environment, and has a dynamic adjustment characteristic.

The invention discloses an instrument calibration method and device, equipment and a storage medium, and relates to the technical field of instrument calibration. The method comprises the following steps: acquiring a test sequence corresponding to equipment to be calibrated and a fitting value sequence corresponding to the test sequence; the test sequence comprises an expected value sequence and an actual value sequence; calculating a difference value between an expected value and a fitting value which have a corresponding relationship in the expected value sequence and the fitting value sequence, and screening out a first maximum difference value; judging whether the first maximum difference value is greater than a maximum allowable error or not; if yes, element exclusion is carried out on the test sequence according to the sequence order to obtain a first target segment sequence, and a corresponding correction coefficient is determined through fitting; a second maximum difference value obtained after fitting based on the first target segmented sequence is not greater than the maximum allowable error; and obtaining at least two fitting functions corresponding to the test sequence according to the at least two target segment sequences corresponding to the test sequence and the corresponding at least two groups of correction coefficients. According to the invention, the calibration precision of instruments and meters can be improved at low cost.

The invention belongs to the technical field of hydraulic test and intelligent control, and particularly discloses a hydraulic component test system integrating data acquisition and automatic data analysis functions, which comprises a physical hardware test platform, a test control software platform and a digital twinborn model of a tested component, and realizes real-time interaction through an OPC UA protocol. Model parameters are corrected on line by means of measured data, and steady state, transient state and disturbance working condition tests are automatically executed based on a working condition library; and dynamically optimizing a test sequence in a test process, skipping a redundant working condition or encrypting a critical region, and synchronously generating a structured performance report. The accuracy and consistency of test results are improved, working condition simulation signals are automatically generated, performance data are collected in real time, a comprehensive performance report is generated, manual operation is reduced, the test process optimization unit can skip redundant working conditions and refine failure boundary positioning, and the test time and cost are effectively saved.

The invention discloses a PCB double-sided four-flying-probe test path optimization method, and belongs to the technical field of path optimization, and the method comprises the following steps: importing double-sided PCB data containing a test network and test points; obtaining an initial matching scheme of a network internal test point corresponding to each test network through the matching strategy, and optimizing each initial matching scheme to obtain a network internal test point path; constructing an initial test sequence between test networks through a recent insertion heuristic algorithm, and then introducing a local search algorithm into an adaptive large-scale neighborhood search algorithm to carry out iterative optimization on the initial test sequence to obtain a test sequence between the networks; and combining the test point paths in the networks and the test sequence between the networks, and outputting a double-sided four-flying-probe test path. According to the PCB double-sided four-flying-probe test path optimization method, the problem that the overall moving cost is difficult to further reduce in an existing method is solved.

The invention relates to the field of product testing, in particular to an efficient production testing method, device and system for TBOX testing. The method comprises the following steps: selecting a plurality of TBOXs for communication connection; sorting the test items to obtain an item sequence; testing each TBOX item by item according to the item sequence to obtain an individual result of each TBOX; simultaneously testing all TBOXs item by item according to the item sequence to obtain an overall result; performing communication quality comparison on each test item according to the overall result and the individual result of each TBOX to obtain an interference value of each test item; adjusting the sequence of the test items in the item sequence according to the interference value of each test item to obtain a plurality of test sequences; according to the test sequence, the test routes are set differently; and carrying out yield test on the TBOX by adopting a test route. According to the invention, the problem that the efficiency and the quality of the TBOX cannot be considered in the production and measurement process is solved.

The invention discloses a motor test bench system, which comprises a hardware system architecture and a software system architecture, wherein the hardware system architecture comprises a mechanical load and sensing unit, a centralized power supply and excitation unit, a data acquisition and control center and an upper computer system; the software system architecture comprises a unified data layer, an automatic control layer, a dynamic load regulation layer, a full-automatic test sequence layer, a man-machine interaction layer, a data analysis and report layer and a collaborative development interface; the problems that an existing test bench is single in signal collection, incomplete in information collection and poor in data synchronism; the load cannot be dynamically changed in real time; and high-order test data results are poor in visualization and cannot be directly converted into test reports.

The invention provides a machine tool machining shaft anomaly detection method and system based on double-order excitation, and relates to the technical field of numerical control machine tools. The method comprises the steps that a key machining shaft of a numerical control machine tool is determined; constructing a shaft transmission anomaly detection model; a double-order reverse test sequence is injected into the key machining shaft through the controller, and a double-order pulse response sequence corresponding to the double-order reverse test sequence is recorded through the encoder; a pulse arrival time sequence is analyzed, and reverse response delay, static lag section length and speed transient characteristics are calculated; and inputting into a shaft transmission anomaly detection model for analysis, and outputting a reverse gap detection value of the key processing shaft. The technical problem that in the prior art, due to the fact that tiny anomalies of the numerical control machine tool are difficult to accurately detect, the machining anomaly detection precision is insufficient is solved, and the machining anomaly detection accuracy of the numerical control machine tool is improved through the double-order reverse test sequence and the shaft transmission anomaly detection model.

The invention relates to the related technical field of equipment life cycle management, in particular to an aviation equipment full life cycle management method and system based on a digital thread. Determining main data of a first digital thread and a first-layer associated test sequence and main data of a second digital thread and a second-layer associated test sequence, mapping the deviation between a physical equipment state and a virtual simulation state, and identifying a performance difference point under a cross-stage data association link; and setting a management strategy for collaborative optimization. The technical problem that the reliability of aeronautical equipment is limited due to the fact that a cross-stage performance difference point equipment performance fluctuation root positioning fuzzy cannot be recognized in real time is solved, first and second digital thread main data and an associated test sequence are constructed, the deviation between physical equipment and a virtual simulation state is accurately mapped, and the reliability of the aeronautical equipment is improved. And a management strategy is set in combination with dual-thread data and performance difference points, and full-life-cycle collaborative optimization is performed, so that the technical effect of equipment reliability is effectively improved.

The invention discloses a large language model-based RESTful APIs test method, which comprises the steps of large model natural language processing, RESTful APIs automatic black box test, OpenAPI document analysis, test sequence generation, sequential execution of operations in the test sequence, and finally execution of test cases. According to the technical scheme, the OpenAPI document and the natural language information fed back by the RESTful APIs in the testing process are analyzed through the large language model, key information such as parameter constraint and operation dependence is continuously and dynamically adjusted to optimize generation of the test case, the natural language information in the RESTful APIs test can be fully utilized through the large language model, and the test efficiency is improved. The method has the advantages of being capable of accurately judging the dependency relation and the constraint relation of the parameters, providing high-quality parameter values, obtaining higher operation coverage rate in the same test predication, and being stable in system fault triggering.

The invention relates to a storage test vector generation method and device, equipment and a storage medium, and is applied to the field of semiconductor testing, and the method comprises the steps: obtaining a chip manual and a chip test plan of a to-be-tested chip, and generating a chip description file according to the chip manual and the chip test plan; carrying out abstract processing according to the chip description file, and generating a chip abstract model; converting test logic in a test algorithm into a test sequence according to the chip abstract model; and obtaining a target file format requirement of a target ATE equipment platform, and converting the test sequence according to the target file format requirement to generate a storage test vector. The method has the technical effects that the reusability of cross-platform use of the test vector is improved, the test development efficiency is improved, and the time is saved.

The invention discloses a secret key integrity verification method and system, a medium and a program product, and belongs to the technical field of secret key verification. The method is used for an SoC security system and comprises the following steps: an initialization stage: electrifying a load board of test equipment, and then releasing external global reset of a chip; in the verification stage, a secret key SM3 verification value programming test sequence is operated, and secret key integrity verification is carried out by using an SM3 algorithm; in the testing stage, a secret key SM3 verification value test is carried out, whether the secret key SM3 verification value test is passed or not is judged, if the secret key SM3 verification value test is passed, it is judged that the chip is a good product, other chip tests continue to be carried out, and if the secret key SM3 verification value test is not passed, it is judged that the chip is a defective product. According to the invention, the secret key stored in the OTP / eFuse component is verified through the SM3 security algorithm, and the verification value is stored in the OTP / eFuse component, so that the algorithm verification of the integrity of the secret key is realized, and the security and the reliability are greatly improved.

The invention provides a function test method and device, electronic equipment and a storage medium, and is applied to the technical field of computers, the method comprises the steps that after a test instruction for indicating a to-be-tested function of a target module is obtained, a target test case corresponding to the to-be-tested function is further obtained, and the target test case can call at least one preset test sequence; the preset test sequences comprise at least one test condition required for testing the to-be-tested function, finally calling each preset test sequence through the test case, constructing a verification scene for testing the to-be-tested function based on each test condition, and completing the test of the to-be-tested function. In addition, the test conditions included in any preset test sequence have no association relationship with other test conditions except the preset test sequence, and the preset test sequences of the to-be-tested function are mutually independent and can be called according to the test requirements in the test process, so that the function test efficiency can be effectively improved.

Disclosed in the present invention are a fuel cell system operating condition detection method, an automatic test method, and a test system. The fuel cell system operating condition detection method comprises: firstly, on the basis of main operating conditions of a fuel cell system, selecting a current, a hydrogen inlet pressure, an air inlet pressure, a coolant inlet temperature and a coolant outlet temperature as determination references for operating condition detection; then, performing interpolation on the basis of the current value of the current, so as to acquire control target values of the remaining parameters; and finally, determining a system state on the basis of signal features of the current combined with whether the remaining parameters are within threshold ranges of the control target values, so as to complete operating condition identification. The method is applicable to a fuel cell test system, and has the advantages of facilitating calculation, requiring no training, allowing online operation, involving an automatic test sequence, etc. An automatic test procedure can also avoid the problem of the next group of new test conditions being automatically triggered due to latency-induced erroneous determination during operating condition detection, thereby improving the stability and reliability of the system.