19138 results about "Motherboard" patented technology

The present invention provides a wireless communication module system for use with a portable personal computer (PC) having a motherboard and an integral display screen. In one embodiment, the system includes a single wired interface having first and second ends, where the first end is coupled to the motherboard and the second end is coupled to the display screen and provides a connection port. The system further includes a wireless communication module having an antenna and an interface port removably coupled to the connection port. In this embodiment, the module also includes a transceiver configured to employ the antenna to transmit and receive radio communication signals, where the transceiver is further configured to employ the interface port to communicate with the motherboard. A method for performing a wireless communication and a wireless communication system incorporating the wireless communication module system or the method are also disclosed.

A method and system for securely opening an e-mail attachment in a computer processing environment having a trusted node daughterboard connected to at least one operational node motherboard with an e-mail processing system operatively coupled to the trusted node daughterboard. The method includes the steps of when an e-mail attachment is to be opened, sending a power on signal from the trusted node daughterboard to the operational node motherboard when it is desired to utilize the operational node motherboard for opening an e-mail attachment. Pre-boot data is then requested from the operational node motherboard and is sent from the trusted node daughterboard to the operational node motherboard to enable operation of the operational node motherboard for securely opening an e-mail attachment.

The present invention provides a motherboard that uses a high-speed, scalable system bus such as PCI Express® to support two or more high bandwidth graphics slots, each capable of supporting an off-the-shelf video controller. The lanes from the motherboard chipset may be directly routed to two or more graphics slots. For instance, the chipset may route (1) thirty-two lanes into two ×16 graphics slots; (2) twenty-four lanes into one ×16 graphics slot and one ×8 graphics slot (the ×8 slot using the same physical connector as a ×16 graphics slot but with only eight active lanes); or (3) sixteen lanes into two ×8 graphics slots (again, physically similar to a ×16 graphics slot but with only eight active lanes). Alternatively, a switch can convert sixteen lanes coming from the chipset root complex into two ×16 links that connect to two ×16 graphics slots. Each and every embodiment of the present invention is agnostic to a specific chipset.

The present invention relates to an unmanned flying vehicle using a PCB including a main board controlling power supply and flying operation, a motor rotating a propeller by changing electric energy into mechanical energy, a PCB frame changing a signal from a remote controller and connecting the main board with the motor, a propeller generating an impellent force by from rotation by the motor, a receiver receiving a control signal of the remote controller, and a remote controller controlling a motor rotation speed of a quadrotor and direction change, and accordingly, the structure of the unmanned flying vehicle can be simplified so that the flying vehicle can be down-sized and light-weighted, and assemblability can be improved.

A motherboard with reduced power consumption is disclosed. The motherboard has a memory module slot, a DDR termination array, and a control chip. The DDR termination array couples to the memory module slot and provides a termination resistor that has one terminal coupled to a voltage source. The control chip provides a control signal. When the motherboard enters a power saving mode or before the memory module being inserted in the memory module slot, the control signal gives an indication to the DDR termination array for cutting off the connection between the termination resistor and the memory module slot. A switch and several termination resistors may substitute the DDR termination array as requirements. The control chip provides the control signal to open the switch and therefore cuts off the connections between termination resistors and the voltage source to achieve the power-conserving purpose.

Improved electromagnetic compatibility for integrated motherboard or device board designs is provided by magnetic shielding, electric shielding, or both integrated into the chip packaging materials. Motherboard emissions may be reduced by use of the shielding. A nonconductive primary and tertiary layer sandwich a high-conductivity metal secondary layer forming a Faraday cage for electric field shielding. A nonconductive primary layer is covered by a tertiary layer formed of a composite having permeable material for magnetic shielding. The tertiary layer formed of a composite could include a high permeability particulate ferrous material. Both the secondary layer and the tertiary layer formed of a composite could be used for both electric and magnetic shielding of chips.

A radio-frequency integrated circuit chip package has at least one integrated antenna. The package includes at least one generally planar ground plane formed with at least one slot therein. A first substrate structure has an outer surface and an inner surface. The at least one generally planar ground plane is formed on the outer surface of the first substrate structure. At least one feed line is spaced inwardly from the ground plane and parallel thereto. The at least one feed line has an inner surface and an outer surface and is a transmission line formed on the inner surface of the first substrate structure with the outer surface of the at least one feed line adjacent the inner surface of the first substrate structure. At least one radio frequency chip is coupled to the feed line and the ground plane. A second substrate structure, spaced inwardly from the feed line, defines a chip-receiving cavity. The chip is located in the chip-receiving cavity. The inner surface of the at least one feed line borders the chip-receiving cavity. An antenna patch may be provided. Planar phased array embodiments, assemblies with motherboards and heat sinks, and fabrication techniques are also disclosed.

A peripheral electronic system for an electronic device including a motherboard having multiple individual electrically connected vertically stacked modules, at least one of which is a circuit board assembly including active and/or passive electronic components embedded therein with the components being electrically connected by conductive traces to provide desired operating function. The peripheral electronic system further includes an electrical connector array on an exposed surface of the composite structure to provide electrical connections between the peripheral electronic system and the motherboard.

A COC DRAM including a plurality of stacked DRAM chips is mounted on a motherboard by using an interposer. The interposer includes a Si unit and a PCB. The Si unit includes a Si substrate and an insulating-layer unit in which wiring is installed. The PCB includes a reference plane for the wiring in the Si unit. The wiring topology between a chip set and the COC DRAM is the same for every signal. Accordingly, a memory system enabling a high-speed operation, low power consumption, and large capacity is provided.

A structure of signal cable connector, which is connected to the signal cable between the hard disk and the computer's main board, comprises at least an enclosure, a circuit board and a wire strand. Wherein a wire block is utilized to affix the signal wires and a ground block to conduct the soldered ground wires so as to minimize the solder points incurred by direct solder of conducting wires on circuit board, resulting in easier assembly and optimized yield.

A biometric access control and time and attendance system comprises an integrated network including one or more remote access devices in electronic communication with a computer database. Each remote access device comprises a silicon chip based system and preferably includes a biometric input device, a liquid crystal display (LCD), computer processing capabilities based on embedded system architecture with configurable system-on-chip (CSOC) technology, and an electrical output for controlling a door lock or the like. The use of CSOC architecture in lieu of conventional personal computer technology (e.g. mother boards, hard drives, video controllers and the like) allows for a more compact and cost efficient design. A plurality of remote access devices is configured for communication with a primary computer database wherein data corresponding to biometric samples for all authorized users is stored. In an embodiment wherein the biometric input devices comprise fingerprint scanners, the devices are configured to facilitate fingerprint identification by incorporating an auto-targeting capability that enables the user to simply place his or her finger on the fingerprint scanner whereafter the system adjusts the scanned image by automatically shifting the scanned image data to a properly targeted position thereby enabling the system compare the scanned print to the biometric samples in the system's data storage memory. Auto-targeting capability eliminates the requirement for manual targeting present in systems of the background art thereby improving system performance and minimizing reliance on human interaction. The present invention contemplates the use of auto-targeting with other biometric systems, such as facial recognition and/or retinal scanning systems, or any other biometric identification technology.

A computer system having a fan assembly is provided. In one example, the computer system includes a computer chassis for mounting with a computer rack, the computer chassis comprising a front portion and a rear portion and including a main board. The computer system further includes a fan assembly positioned adjacent to a rear portion of the computer chassis, the fan assembly configured to draw air through the computer toward the rear portion of the computer chassis along a first direction and to expel the air in a second airflow direction non-parallel with the first direction.

A computing system based on Transparence Computing consists of clients and a server. There is no disk and no preinstalled OS on the client; a remote booting chip is set on the client's mainboard for downloading and loading the OS. Boot-supporting services, OS kernel mirrors, and applications are preset on the server; After being powered, the client broadcasts the boot request to the network and the server allocates network parameters for it. The client downloads an OS-selecting script from the server. After the user selects the needed OS, the client downloads and loads the selected OS from the server. Hence, the client fulfills the user's computing requirements just as a normal PC. The computing work is implemented on the client-side, during which the client can acquire corresponding resources such as applications, data, and documents from the server on demand. The client can be provided with private storage across the network by presetting a service in the mirror for creating virtual disks on the server, and thus data generated during or after the computing can be persistently stored on the server's storage.

A personal computer motherboard has a main memory of phase-change-memory (PCM) chips in PCM memory modules. An operating system (OS) image is stored in the PCM memory modules and is retained during suspend since the PCM chips are non-volatile. The microprocessor can directly read the OS image retained in the PCM memory modules without copying an OS image from a hard disk to the main memory upon resume. Therefore a boot loader program in the boot ROM does not have to be fetched to the microprocessor for suspend/resume. The video memory can also be PCM, allowing the frame buffer to be retained during suspend/resume, yet be directly addressable by the microprocessor. The display is quickly activated since the frame buffer does not have to be re-constructed after suspend/resume. PCM cells use amorphous and crystalline states of a variable resistor to store data.

The present invention aims to provide a substrate for mounting an IC chip, on which an optical signal passing region is formed and which can suppress a transmission loss in an optical signal and transmit an optical signal more positively with high reliability. The substrate for mounting an IC chip according to the present invention is a substrate for mounting an IC chip, in which a conductor circuit and an insulating layer are laminated in alternate fashion and in repetition on both faces of a substrate and an optical element is mounted on the substrate. Herein, the substrate for mounting an IC chip includes an optical signal passing region, and a microlens arranged on an end portion of the optical signal passing region on the opposite side from the optical element.

The present invention discloses a PCI-Express multimode expansion card comprising a PCI-Express interface port for insertion into a PCI-Express slot of a motherboard, a PCI-Express expansion port, a USB expansion port, and a jumper circuit connecting the PCI-Express interface port and the two expansion ports. The PCI-Express expansion port provides expandability by allowing the attachment of a PCI-Express interfaced peripheral device, and the USB expansion port provides expandability by allowing the attachment of a USB-interfaced peripheral device. As such, a single PCI-Express multimode expansion card inserted into a PCI-Express slot configured on the motherboard can be used to attach two peripheral devices with different interface, thereby achieving the function of multimode expansion.

The invention discloses an antenna device for a full metal shell. The antenna device comprises a metal shell arranged at the back of communication equipment, antenna branches and feeding points, wherein a metal frame extending from the back of the communication equipment to the side face is arranged around the periphery of the metal shell; the metal shell is segmented and separated into a first metal shell, a second metal shell and a third metal shell; the feeding points are respectively positioned between the first metal shell and the second metal shell and between the second metal shell and the third metal shell; an antenna branch I arranged at the first metal shell and an antenna II arranged at the third metal shell are respectively connected with a radio-frequency signal source of a PCB (Printed Circuit Board) mainboard arranged on the second metal shell, and signals are correspondingly fed in the first metal shell and the third metal shell through the feeding points. With a three-section type full metal shell structure, the metal frame becomes a part of the antenna, the first metal shell and the third metal shell can be used as antennas at the same time, and the antenna device has the advantages of ultra-wide low-frequency band width and high-frequency band width.

A host system integrity monitor for monitoring memory, operating systems, applications, domain manager, and other host system's structures of interest is isolated and independent of the CPU and operating system of commodity systems. The system requires no modifications to the protected (monitored) host's software, and operates correctly even when the host system is compromised. Either arranged as a stand-alone computer on the add-in card which communicates with the monitored host system through the PCI bus, or as the co-processor based monitor located on the motherboard of the host system, or residing on one of the virtual CPU while the monitored system resides on another virtual CPU, or residing within the domain manager of the host system, the monitor of the present invention monitors the integrity of the examined structure by calculating hash values of the structure, comparing them with expected hash values, and sending error reports once the discrepancy between these values is detected.

An ultrasound imaging system with pixel oriented processing is provided in which an acoustic signal is generated, echoes from the acoustic signal are received at a plurality of receiving elements to obtain echo signals that are then stored, a given pixel is mapped into a region of the stored signals, the mapped region of the stored echo signals is organized into array for the given pixel after which the array is processed to generate a signal response for the given pixel to obtain acoustic information for the given pixel. The system can be implemented entirely on plug-in cards for a commercial PC motherboard. The system and method can be implemented for pixel-oriented or voxel-oriented image processing and display, eliminating intermediate data computations and enabling extensive use of software processing methods. Advantages include improved acquisition of signal dynamic range, flexible acquisition modes for high frame rate 2D, 3D, and Doppler blood flow imaging.