9293 results about "Motherboard" patented technology

The present invention provides a wireless communication module system for use with a portable personal computer (PC) having a motherboard and an integral display screen. In one embodiment, the system includes a single wired interface having first and second ends, where the first end is coupled to the motherboard and the second end is coupled to the display screen and provides a connection port. The system further includes a wireless communication module having an antenna and an interface port removably coupled to the connection port. In this embodiment, the module also includes a transceiver configured to employ the antenna to transmit and receive radio communication signals, where the transceiver is further configured to employ the interface port to communicate with the motherboard. A method for performing a wireless communication and a wireless communication system incorporating the wireless communication module system or the method are also disclosed.

A method and system for securely opening an e-mail attachment in a computer processing environment having a trusted node daughterboard connected to at least one operational node motherboard with an e-mail processing system operatively coupled to the trusted node daughterboard. The method includes the steps of when an e-mail attachment is to be opened, sending a power on signal from the trusted node daughterboard to the operational node motherboard when it is desired to utilize the operational node motherboard for opening an e-mail attachment. Pre-boot data is then requested from the operational node motherboard and is sent from the trusted node daughterboard to the operational node motherboard to enable operation of the operational node motherboard for securely opening an e-mail attachment.

The present invention provides a motherboard that uses a high-speed, scalable system bus such as PCI Express® to support two or more high bandwidth graphics slots, each capable of supporting an off-the-shelf video controller. The lanes from the motherboard chipset may be directly routed to two or more graphics slots. For instance, the chipset may route (1) thirty-two lanes into two ×16 graphics slots; (2) twenty-four lanes into one ×16 graphics slot and one ×8 graphics slot (the ×8 slot using the same physical connector as a ×16 graphics slot but with only eight active lanes); or (3) sixteen lanes into two ×8 graphics slots (again, physically similar to a ×16 graphics slot but with only eight active lanes). Alternatively, a switch can convert sixteen lanes coming from the chipset root complex into two ×16 links that connect to two ×16 graphics slots. Each and every embodiment of the present invention is agnostic to a specific chipset.

The present invention relates to an unmanned flying vehicle using a PCB including a main board controlling power supply and flying operation, a motor rotating a propeller by changing electric energy into mechanical energy, a PCB frame changing a signal from a remote controller and connecting the main board with the motor, a propeller generating an impellent force by from rotation by the motor, a receiver receiving a control signal of the remote controller, and a remote controller controlling a motor rotation speed of a quadrotor and direction change, and accordingly, the structure of the unmanned flying vehicle can be simplified so that the flying vehicle can be down-sized and light-weighted, and assemblability can be improved.

A motherboard with reduced power consumption is disclosed. The motherboard has a memory module slot, a DDR termination array, and a control chip. The DDR termination array couples to the memory module slot and provides a termination resistor that has one terminal coupled to a voltage source. The control chip provides a control signal. When the motherboard enters a power saving mode or before the memory module being inserted in the memory module slot, the control signal gives an indication to the DDR termination array for cutting off the connection between the termination resistor and the memory module slot. A switch and several termination resistors may substitute the DDR termination array as requirements. The control chip provides the control signal to open the switch and therefore cuts off the connections between termination resistors and the voltage source to achieve the power-conserving purpose.

Improved electromagnetic compatibility for integrated motherboard or device board designs is provided by magnetic shielding, electric shielding, or both integrated into the chip packaging materials. Motherboard emissions may be reduced by use of the shielding. A nonconductive primary and tertiary layer sandwich a high-conductivity metal secondary layer forming a Faraday cage for electric field shielding. A nonconductive primary layer is covered by a tertiary layer formed of a composite having permeable material for magnetic shielding. The tertiary layer formed of a composite could include a high permeability particulate ferrous material. Both the secondary layer and the tertiary layer formed of a composite could be used for both electric and magnetic shielding of chips.

A peripheral electronic system for an electronic device including a motherboard having multiple individual electrically connected vertically stacked modules, at least one of which is a circuit board assembly including active and/or passive electronic components embedded therein with the components being electrically connected by conductive traces to provide desired operating function. The peripheral electronic system further includes an electrical connector array on an exposed surface of the composite structure to provide electrical connections between the peripheral electronic system and the motherboard.

A COC DRAM including a plurality of stacked DRAM chips is mounted on a motherboard by using an interposer. The interposer includes a Si unit and a PCB. The Si unit includes a Si substrate and an insulating-layer unit in which wiring is installed. The PCB includes a reference plane for the wiring in the Si unit. The wiring topology between a chip set and the COC DRAM is the same for every signal. Accordingly, a memory system enabling a high-speed operation, low power consumption, and large capacity is provided.

A structure of signal cable connector, which is connected to the signal cable between the hard disk and the computer's main board, comprises at least an enclosure, a circuit board and a wire strand. Wherein a wire block is utilized to affix the signal wires and a ground block to conduct the soldered ground wires so as to minimize the solder points incurred by direct solder of conducting wires on circuit board, resulting in easier assembly and optimized yield.

A biometric access control and time and attendance system comprises an integrated network including one or more remote access devices in electronic communication with a computer database. Each remote access device comprises a silicon chip based system and preferably includes a biometric input device, a liquid crystal display (LCD), computer processing capabilities based on embedded system architecture with configurable system-on-chip (CSOC) technology, and an electrical output for controlling a door lock or the like. The use of CSOC architecture in lieu of conventional personal computer technology (e.g. mother boards, hard drives, video controllers and the like) allows for a more compact and cost efficient design. A plurality of remote access devices is configured for communication with a primary computer database wherein data corresponding to biometric samples for all authorized users is stored. In an embodiment wherein the biometric input devices comprise fingerprint scanners, the devices are configured to facilitate fingerprint identification by incorporating an auto-targeting capability that enables the user to simply place his or her finger on the fingerprint scanner whereafter the system adjusts the scanned image by automatically shifting the scanned image data to a properly targeted position thereby enabling the system compare the scanned print to the biometric samples in the system's data storage memory. Auto-targeting capability eliminates the requirement for manual targeting present in systems of the background art thereby improving system performance and minimizing reliance on human interaction. The present invention contemplates the use of auto-targeting with other biometric systems, such as facial recognition and/or retinal scanning systems, or any other biometric identification technology.

A computer system having a fan assembly is provided. In one example, the computer system includes a computer chassis for mounting with a computer rack, the computer chassis comprising a front portion and a rear portion and including a main board. The computer system further includes a fan assembly positioned adjacent to a rear portion of the computer chassis, the fan assembly configured to draw air through the computer toward the rear portion of the computer chassis along a first direction and to expel the air in a second airflow direction non-parallel with the first direction.

A computing system based on Transparence Computing consists of clients and a server. There is no disk and no preinstalled OS on the client; a remote booting chip is set on the client's mainboard for downloading and loading the OS. Boot-supporting services, OS kernel mirrors, and applications are preset on the server; After being powered, the client broadcasts the boot request to the network and the server allocates network parameters for it. The client downloads an OS-selecting script from the server. After the user selects the needed OS, the client downloads and loads the selected OS from the server. Hence, the client fulfills the user's computing requirements just as a normal PC. The computing work is implemented on the client-side, during which the client can acquire corresponding resources such as applications, data, and documents from the server on demand. The client can be provided with private storage across the network by presetting a service in the mirror for creating virtual disks on the server, and thus data generated during or after the computing can be persistently stored on the server's storage.

A personal computer motherboard has a main memory of phase-change-memory (PCM) chips in PCM memory modules. An operating system (OS) image is stored in the PCM memory modules and is retained during suspend since the PCM chips are non-volatile. The microprocessor can directly read the OS image retained in the PCM memory modules without copying an OS image from a hard disk to the main memory upon resume. Therefore a boot loader program in the boot ROM does not have to be fetched to the microprocessor for suspend/resume. The video memory can also be PCM, allowing the frame buffer to be retained during suspend/resume, yet be directly addressable by the microprocessor. The display is quickly activated since the frame buffer does not have to be re-constructed after suspend/resume. PCM cells use amorphous and crystalline states of a variable resistor to store data.

The present invention aims to provide a substrate for mounting an IC chip, on which an optical signal passing region is formed and which can suppress a transmission loss in an optical signal and transmit an optical signal more positively with high reliability. The substrate for mounting an IC chip according to the present invention is a substrate for mounting an IC chip, in which a conductor circuit and an insulating layer are laminated in alternate fashion and in repetition on both faces of a substrate and an optical element is mounted on the substrate. Herein, the substrate for mounting an IC chip includes an optical signal passing region, and a microlens arranged on an end portion of the optical signal passing region on the opposite side from the optical element.

The present invention discloses a PCI-Express multimode expansion card comprising a PCI-Express interface port for insertion into a PCI-Express slot of a motherboard, a PCI-Express expansion port, a USB expansion port, and a jumper circuit connecting the PCI-Express interface port and the two expansion ports. The PCI-Express expansion port provides expandability by allowing the attachment of a PCI-Express interfaced peripheral device, and the USB expansion port provides expandability by allowing the attachment of a USB-interfaced peripheral device. As such, a single PCI-Express multimode expansion card inserted into a PCI-Express slot configured on the motherboard can be used to attach two peripheral devices with different interface, thereby achieving the function of multimode expansion.

The invention discloses an antenna device for a full metal shell. The antenna device comprises a metal shell arranged at the back of communication equipment, antenna branches and feeding points, wherein a metal frame extending from the back of the communication equipment to the side face is arranged around the periphery of the metal shell; the metal shell is segmented and separated into a first metal shell, a second metal shell and a third metal shell; the feeding points are respectively positioned between the first metal shell and the second metal shell and between the second metal shell and the third metal shell; an antenna branch I arranged at the first metal shell and an antenna II arranged at the third metal shell are respectively connected with a radio-frequency signal source of a PCB (Printed Circuit Board) mainboard arranged on the second metal shell, and signals are correspondingly fed in the first metal shell and the third metal shell through the feeding points. With a three-section type full metal shell structure, the metal frame becomes a part of the antenna, the first metal shell and the third metal shell can be used as antennas at the same time, and the antenna device has the advantages of ultra-wide low-frequency band width and high-frequency band width.

A host system integrity monitor for monitoring memory, operating systems, applications, domain manager, and other host system's structures of interest is isolated and independent of the CPU and operating system of commodity systems. The system requires no modifications to the protected (monitored) host's software, and operates correctly even when the host system is compromised. Either arranged as a stand-alone computer on the add-in card which communicates with the monitored host system through the PCI bus, or as the co-processor based monitor located on the motherboard of the host system, or residing on one of the virtual CPU while the monitored system resides on another virtual CPU, or residing within the domain manager of the host system, the monitor of the present invention monitors the integrity of the examined structure by calculating hash values of the structure, comparing them with expected hash values, and sending error reports once the discrepancy between these values is detected.

An ultrasound imaging system with pixel oriented processing is provided in which an acoustic signal is generated, echoes from the acoustic signal are received at a plurality of receiving elements to obtain echo signals that are then stored, a given pixel is mapped into a region of the stored signals, the mapped region of the stored echo signals is organized into array for the given pixel after which the array is processed to generate a signal response for the given pixel to obtain acoustic information for the given pixel. The system can be implemented entirely on plug-in cards for a commercial PC motherboard. The system and method can be implemented for pixel-oriented or voxel-oriented image processing and display, eliminating intermediate data computations and enabling extensive use of software processing methods. Advantages include improved acquisition of signal dynamic range, flexible acquisition modes for high frame rate 2D, 3D, and Doppler blood flow imaging.

A module includes an electronic component having at least two electrodes, a board having electrodes on its surface to be connected to the electrodes of the electronic component, respectively, solders for connecting the electrodes of the electronic component to the electrodes of the board, respectively, an insulating resin covering the electronic component, the surface of the board, the solder, and the electrodes, and solder resists provided on the surface of the board and around the electrodes of the board, respectively. One of the solder resists is separated from the other electrode at a portion between the electronic component and the board. When this module is mounted on a motherboard, the solder does not flow out of the electrodes even when the solder in the insulating resin melts.

A method and system for the provisioning of software that enable large scale installation and management of software in computer units in a highly secure manner. The BIOS of the target computer unit is adapted such that upon power up the system attempts to boot from an external media. The BIOS features functions within the code for the implementing a system watchdog for assuring the system remains in a known state, a function for digital signature verification, and loads drivers for a file system. The external media includes the operating system (OS) image and other bootstrap files, each having been digitally signed with an asymmetric private key that corresponds to the public key. A programmable read-only parameter memory on the motherboard is configured to store the public keys and the (failure) state of the system independently of the primary and secondary media enabling reboot from an alternative boot path.

A semiconductor die package capable of being mounted to a motherboard is disclosed. The semiconductor die package includes a substrate, and a first semiconductor die mounted on the substrate, where the first semiconductor die includes a first vertical device comprising a first input region and a first output region at opposite surfaces of the first semiconductor die. The semiconductor die package includes a second semiconductor die mounted on the substrate, where second semiconductor die comprises a second vertical device comprising a second input region and a second output region at opposite surfaces of the second semiconductor die. A substantially planar conductive node clip electrically communicates the first output region in the first semiconductor die and the second input region in the second semiconductor die. The first semiconductor die and the second semiconductor die are between the substrate and the conductive node clip.

A PCIe bus extension system, method, interface card and cable for connecting a PCIe-compliant peripheral device to a PCIe bus of a computer system. The interface card includes a printed circuit board, an edge connector adapted for insertion into a PCIe expansion slot on a motherboard of the computer system for transmitting PCIe signals between the motherboard and the interface card, an interface port configured to mate with a connector of the cable, and a logic integrated circuit on the printed circuit board, the logic integrated circuit functionally connecting the edge connector with the expansion slot and amplifying and propagating clock and data PCIe signals therebetween that are compliant with a PCIe standard. The interface card and cable lacks the capability of transmitting power therethrough to a PCIe-compliant peripheral device connected to the interface card through the interface port.

An interface is provided that allows testing and using in-line memory modules in computer systems not designed for the modules. In particular, an interface of the present invention comprises an interposer card that fits into a motherboard memory module connection of a computer system. The interposer card also has a motherboard memory module connection system into which a memory module fits. Additionally, the interposer card contains a detection device that describes the configuration of the memory module. This allows the computer system to properly access the memory module.When used as part of a computer system, the interface allows memory modules to be tested by a memory diagnostics program. Moreover, the interface may be placed in any slot in the computer, even though the memory module itself only supports being placed in one particular slot.

The invention discloses an extensible multichannel parallel real-time data acquisition device and method. The device comprises a PXIe (PCI (Peripheral Component Interconnect) Extensions for Instrumentation Express) backboard, a CPU (Central Processing Unit) board card and a plurality of FPGA (Field-Programmable Gate Array) acquisition cards; the PXIe backboard comprises a CPU motherboard slot, a clock board slot, a plurality of FPGA board card slots and a PCIe (Peripheral Component Interface Express)/PCI switching bridge; the data transmission between the CPU board card and the FPGA acquisition cards is achieved by PCIe switches, and the P2P (Peer-to-Peer) data transmission is carried out among the FPGA acquisition cards; a clock module provides a system differential clock, differential synchronization signals and differential star-shaped triggers through a clock bus and is downwardly compatible with a PXI clock; and the FPGA board card slots realize the compatibility between a PXI and a Compact PCIe board card through a PCI bus and the PCIe/PCI switching bridge. The invention further provides the method based on the device. The device and the method have the advantages of high sampling rate, fast data transmission and easiness for the large-scale extension of a plurality of board cards.

A computer is provided having a main board with I/O connectors mounted thereon, and a chassis including a front panel providing access to the I/O connectors and to all components requiring intermittent access provided for the computer.

A method is described for forming an integrated structure, including a semiconductor device and connectors for connecting to a motherboard. A first layer is formed on a plate transparent to ablating radiation, and a second layer on the semiconductor device. The first layer has a first set of conductors connecting to bonding pads, which are spaced with a first spacing distance in accordance with a required spacing of connections to the motherboard. The second layer has a second set of conductors connecting to the semiconductor device. The first layer and second layer are connected using a stud/via connectors having spacing less than that of the bonding pads. The semiconductor device is thus attached to the first layer, and the first set and second set of conductors are connected through the studs. The interface between the first layer and the plate is ablated by ablating radiation transmitted through the plate, thereby detaching the plate. The connector structures are then attached to the bonding pads. This method permits fabrication of a high-density packaged device with reduced cost.

Systems and methods for monitoring and controlling water consumption in a water-based system are disclosed using one or more sensors for generating signals indicative of the operation thereof. One or more interface modules are provided as breaker circuits for receiving the generated signals, and a fluid control device is operable for limiting the water consumption. A motherboard receives the interface modules and provides communication therebetween for information processing. Signals from the various sensors are supplied to a controller, which provides signals to status indicators, and also operates to provide alarm signals via network interfaces to remote locations. In an alternate embodiment, a water monitoring system is designed to shut off the water supply to the water device and to shut off either the electrical supply or the gas supply to the heating unit of the water device in response to sensing a malfunction through one or more sensed parameters.

A disposing structure of industrial computer chassis includes a chassis shell, two motherboard trays and a back plate. The interior of the chassis shell is divided into a storage unit section and a motherboard section. The interior of the storage unit section is arranged at least one storage unit, while two motherboard trays are disposed in the motherboard section. The interior of each motherboard tray is arranged a motherboard. In the motherboard trays, at least one motherboard tray is extended a wedge frame toward the storage unit section. A transfer card having a hot swapping function is arranged on the wedge frame and is arranged by inserting into the corresponding motherboard. In addition, a back plate is arranged between the storage unit section and the motherboard section. Corresponding to the wedge frame, a slot capable of a hot swapping function is arranged on the back plate. In so doing, the transfer card may be inserted into the slot, thereby, providing a hot swapping function.

A Power-over-Ethernet (PoE) communication system dynamically provides power and data communications over a communications link. In an enterprise environment made up of one or more personal computing devices (e.g., personal or laptop computers), a switch determines an allocated amount of power to be supplied to each device. The system includes a switch, a power supply, and one or more personal computing devices having a PoE control module. The PoE control module can be part of, for example, a Power Source Equipment/Powered Device (PSE/PD) system or a LAN-On-Motherboard/Powered Device (LOM/PD) system. A method of dynamically providing power to personal computing devices includes determining the power requirements of each device based on one or more factors, which can include, for example, battery charge status, power load, power mode, etc., of each device. Various algorithms can be used to decide priority in providing power to the devices.

A seat back frame for a vehicle seat includes first and second side members spaced apart from each other, each of the first and second side members being made of ultra-high tensile strength steel, the first side member having a first longitudinal body of a substantially U-shape in cross-section, the first longitudinal body comprising a pair of first spaced apart flange sections and a first main plate section interconnecting the first spaced apart flange sections, the first side member having a first upper region and a first lower region, the second side member having a second longitudinal body of a substantially U-shape in cross-section, the second longitudinal body comprising a pair of second spaced apart flange sections and a second main plate section interconnecting the second spaced apart flange sections, the second side member having a second upper region and a second lower region, an upper member arranged between the first and second upper regions of the first and second side members, the upper member being made of ultra-high tensile strength steel, the upper member having first and second end portions, the upper member being mounted, by spot-welding, to the first and second upper regions of the first and second side members with the first and second end portions thereof being fitted in the first and second side members, and a lower member arranged between the first and second lower regions of the first and second side members, the lower member being made of ultra-high tensile strength steel, the lower member having third and fourth end portions, and the lower member being mounted, by spot-welding, to the first and second lower regions of the first and second side members with the third and fourth end portions thereof being fitted in the first and second side members.