97 results about "Pin array" patented technology

The invention relates to the technical field of MIP devices, solves the problems that in the prior art, a single-pixel MIP device is large in pin number, low in screen body contrast ratio and high in manufacturing cost, and provides an all-in-one MIP device and a manufacturing method thereof.The manufacturing method comprises the steps that a substrate to be processed is obtained, and bonding pads and copolar lines are formed on the second surface of the substrate through deposition; depositing and forming an insulating layer in a non-pad area in the second surface; forming a through TGV conductive through hole in the substrate along the thickness direction, and forming a conductive metal layer in the TGV conductive through hole; forming back pin metals in one-to-one correspondence with the TGV conductive through holes on the first surface to form a pin array; welding the LED chips on the bonding pad in a flip-chip manner, and arranging the LED chips at intervals to form pixel units; and a packaging layer is deposited and formed on the LED chip and the gap area of the LED chip, and the all-in-one MIP device is obtained. The number of the pins is reduced, the contrast ratio of the screen body is improved, and the manufacturing cost is reduced.

The invention relates to the technical field of transformer coils, and discloses a transformer coil adopting a rotary positioning pin array structure, which comprises an interlayer insulating cylinder, a left coil winding body and a right coil winding body wound on the outer wall of the interlayer insulating cylinder, and a plurality of partition bent plates mounted in the middle of the outer wall of the interlayer insulating cylinder, adjusting plates slidably sleeve the outer wall of the interlayer insulating cylinder in a bilateral symmetry manner. The transformer coil adopting the rotary positioning pin array structure can effectively solve the problems that in the prior art, a sectional type transformer coil mostly depends on a single or few limiting parts, so that movement of coil sections in the axis direction or uneven interlayer gaps due to alignment deviation during assembly or thermal expansion and cold contraction during operation is difficult to deal with; the radial direction is difficult to resist the rigidity difference of materials or radial deviation caused by long-term operation vibration, so that dislocation between coil layers and local extrusion damage of an insulating layer are caused, and the insulating property and the short-circuit resistance of the transformer are further influenced.

The invention provides a multilayer heterogeneous material ultrafast laser integrated connection method and device, and the method specifically comprises the steps: stacking and fixing a chip bonding pad, a spring pin and quartz glass on a three-dimensional motion platform, and adjusting the platform to enable a laser focal plane to be located at the center of the pin; aiming at the connection of a bonding pad and a pin, high-repetition-frequency ultrafast laser with a high Rayleigh length is obtained through spatial shaping, a two-dimensional galvanometer is used for carrying out spiral line or concentric circular ring scanning to act on the periphery of the pin, metal plasma is excited, molten metal is formed and deposited in a contact hole of the pin and the bonding pad, and the molten metal is continuously accumulated along with reverse heating, so that the metal is formed. Dissimilar metal welding is achieved; aiming at the connection of the pin and the glass, laser penetrates through the quartz glass, plasma is excited on a metal interface, molten metal with increased volume is formed, a material interface gap is filled, and welding from non-optical contact to optical contact is regulated and controlled; and two heterogeneous materials are successfully welded through single scanning until welding of the whole pin array is completed, and efficient integrated packaging is achieved.

The invention provides a differential pair ordered escape wiring method based on improved Monte Carlo tree search, and aims to solve the problem of path optimization of differential pair signal wiring in the design of a high-density printed circuit board. According to the method, MCTS and Q-learning reinforcement learning technologies are combined, a wiring intermediate point does not need to be preset, and a wiring path can be dynamically generated under a grid pin array and a staggered pin array. Through multiple times of simulation and backtracking, the method can effectively process complex pin arrangement and blocking areas, ensures wiring length matching and reduces electromagnetic interference. Meanwhile, according to the method, a Q table obtained through one-time Q learning can serve as the basis for simulation of all the nodes of the Monte Carlo tree, all the expansion nodes are simulated in the simulation stage, and the defect that the time of the MCTS simulation part is long is overcome. According to the method, the MCTS search capability and the convergence speed are improved by adopting a gradual widening strategy. The method is suitable for PCB design of high-performance electronic equipment, such as the fields of communication, computers and avionics.

The utility model discloses an anti-EMI side vertical type TYPE-C female seat connector, which comprises a shielding outer shell, a metal inner shell wrapped on the inner side of the shielding outer shell, a rubber core arranged in the metal inner shell and a plurality of conductive terminals clamped on the rubber core, the plurality of conductive terminals extend out from one side of the plurality of pins to form a pin array, the two sides of the shielding shell close to the wide wall are provided with shielding shell contact plates which are opened towards the outer side, and the shielding shell contact plates are provided with a plurality of contact pins which are arranged at intervals. And the overall aesthetics and layout flexibility of the equipment can be effectively improved. Especially, due to the reinforced anti-EMI (electromagnetic interference) design, the traditional plain end edge design is improved into a serrated linear array structure, and even if some connection positions are in poor contact, the stable work in a complex electromagnetic environment can be ensured as long as a small piece can keep connection.

The invention discloses a synchronous escape wiring method and device based on multiple commodity flows and a medium, and the method comprises the steps: building a GPA wiring diagram graph based on a chip grid pin array, and building an irregular pin array wiring diagram graph according to an array of missing pins; according to the created GPA wiring diagram graph, creating an escape boundary node in the synchronous escape wiring; according to the creation of the escape boundary node, creating a synchronous escape overall wiring diagram graph; according to the created synchronous escape overall wiring diagram graph, creating a synchronous escape wiring model based on multiple commodity flows; solving the synchronous escape wiring model to obtain a wiring result, and designing the constraint of grouping on the same layer in the synchronous escape wiring; and optimizing a wiring path of the synchronous escape wiring model, and accelerating synchronous escape wiring according to an optimization result. According to the method, through modeling of the wiring constraint and path optimization method, multiple acceleration methods are supported to act at the same time, and the efficiency of the system is improved.

The invention relates to the technical field of image processing, in particular to a connector pin position deviation sub-pixel level calibration method, which comprises the following steps of: firstly, extracting response abnormal characteristics from an image so as to construct an abnormal response characteristic field of a pin array; identifying a target image region with significant asymmetric features or behavior mutation from the target image region; and finally, calculating a second derivative zero cross point responding to abnormal characteristics in a target area, and reversely deducing a pin cap sub-pixel position deviation in combination with a stability difference value of left and right diffusivity changes, so that the analysis precision and stability of image positioning are effectively enhanced.

The invention discloses a lead frame, an SSD module and an SSD device. The scheme comprises a first base island which is used for installing a storage control chip; the second base island is used for installing a Flash; and the pin array is distributed at the periphery of the first base island. Due to the arrangement of the first base island and the second base island, the lead frame can be integrated with the storage control chip and the Flash at the same time, the SSD module can be manufactured by packaging the lead frame, the storage control chip and the Flash do not need to be independently packaged and then assembled into the SSD module, the manufacturing difficulty of the SSD module is reduced, and the packaging cost of the SSD device can be effectively reduced. The pin array in the lead frame is distributed around the first base island, so that the SSD module can be manufactured by adopting QFN packaging, and compared with BGA packaging, the packaging cost of the SSD device can be further reduced, and the profit margin of an SSD manufacturer is improved.

The application relates to the technical field of electrical connection equipment, and discloses a high-current small bus plug-in box rotary plug, which is used to solve the problems that the structure of key conductive components is single, the setting space is cramped, the conductive temperature rises fast, and the components are prone to aging in the prior art. The application is characterized in that the space of the regular octagonal flame-retardant PC shell and the insulating partition plate is optimized, the T2 oxygen-free copper Z-shaped large-section pin array is symmetrically arranged, the uniform contact pressure guaranteed by the spring assembly is matched, the conductive cross-sectional area is 2-3 times higher than that of the traditional reed structure, the galvanic corrosion of dissimilar metals is effectively avoided, the current-carrying capacity and the current transmission stability are greatly improved, the multidirectional heat exchange channels formed by the regular octagonal included angle, the pin array bending gap and the internal cavity are combined, the separation and heat dissipation of the insulating partition plate are combined, the cold and hot air efficient convection is realized, and the temperature rise of the key components is significantly reduced.

A packaging structure, a semiconductor structure, and an electronic device. The packaging structure comprises: a substrate; a first pin array, which is arranged on the substrate and comprises a plurality of first data pins; and a second pin array, which is arranged on the substrate and comprises a plurality of second data pins. A blank area is provided between the first pin array and the second pin array, the blank area extends from the center of the substrate to the edge of the substrate, the end of the blank area is located on the outer side of the first pin array, at least one first data pin and / or at least one second data pin is adjacent to the blank area, and the minimum size of the blank area is larger than the diameter of the first data pin. The size of the packaging structure is small.

The invention relates to a method for creating a bus-type-independent electronics platform for a control electronics (1) of an electric drive, in particular a fluid pump, wherein the control electronics (1) for a plurality of variants of the fluid pump has a control electronics board (2) with a uniform board layout (3) and the board layout (3) has a connection pin pattern (4) with a plurality of connection pins (5), the fluid pump has a connector module (6) as an interface from the connection pin pattern (4) of the control electronics (1) to a pin pattern of a customer's vehicle electrical system, comprising the steps: - Providing all necessary connection pins (5) for all bus types to be covered in the connection pin pattern (4) of the PCB layout (3); - Arranging input pins (8) of the connector module (6) in an input pin pattern (9) corresponding to a connection pin pattern (5) of the control electronics board (2), in particular corresponding to a bus type to be contacted; - Arranging output pins (10) in an output pin pattern (11) of the connector module (6) corresponding to the pin pattern of a mating connector module of the customer's vehicle electrical system; - Transferring the input pin pattern (9) of the connector module (6) into the output pin pattern (11) of the connector module (6) within a connector module housing (13), wherein several conductor sections (14), each forming an input pin (8) of the connector module (6) at one end and an output pin (10) of the connector module (6) at the other end, are formed as stamped and bent parts, and the conductor sections (14) are overmolded or overmolded at least in an area between the input pins (8) and the output pins (10) to form a conductor section bundle (14).

The application provides a kind of multilayer heterogeneous material ultrafast laser integrated connection method and equipment, specifically includes: chip pad, spring pin and quartz glass are stacked and fixed on three-dimensional motion platform, adjust platform to make laser focal plane be located in the central of pin;For pad and pin connection, space shaping obtains high repetition rate ultrafast laser with high Rayleigh length, is acted on the periphery of pin by spiral line or concentric circular scanning of two-dimensional galvanometer, excites metal plasma, forms molten metal, is deposited in the aperture of pin and pad contact, with reverse heating, molten metal continuously accumulates, realizes heterogeneous metal welding;For pin and glass connection, laser transmits through quartz glass, excites plasma at metal interface, forms molten metal with increased volume, fills material interface gap, regulates non-optical contact to optical contact welding;Two kinds of heterogeneous materials are successfully welded by single scanning, until the welding of entire pin array is completed, realizes efficient integrated packaging.

The present application provides a bonding structure, a display module, and a display device. The bonding structure includes: a first pin array; the first pin array includes a plurality of first pins arranged at intervals along a first direction, and the first pins are used for bonding with a flexible circuit board; for two first pins with the maximum distance along the first direction, the dimension along the first direction of one side of one first pin away from the other and the side of the other first pin away from this first pin is greater than a first preset dimension, and the offset distance along the first direction between two adjacent first pins is greater than a second preset dimension. By limiting the total dimension of the first pin array, the bonding requirements of a large-size display module and the corresponding flexible circuit board are met; at the same time, by limiting the offset distance between adjacent first pins, the tolerance during the bonding of the flexible circuit board and the first pins is controlled within a reasonable range, preventing the problem of poor connection caused by the displacement of the flexible circuit board during the bonding with the first pins.

The invention belongs to the technical field of electrical interconnection structures, and particularly relates to a ceramic ball column grid array packaging structure and a process implementation method thereof. According to the technical scheme, the ceramic ball column grid array packaging structure comprises a ceramic substrate, a printed circuit board and a ball column pin array composed of a plurality of ball column pin structures, each ball column pin structure comprises a necking section and spherical contact sections arranged at the two ends of the necking section, the ceramic substrate and the printed circuit board are each provided with a plurality of bonding pads, and the bonding pads are arranged on the ceramic substrate and the printed circuit board. One spherical contact section of the ball column pin structure is connected with a bonding pad of the ceramic substrate, and the other spherical contact section of the ball column pin structure is connected with a bonding pad of the printed circuit board. According to the ceramic ball column grid array packaging structure and the process implementation method thereof, the large-scale and high-density array packaging requirement is met, and the ceramic ball column grid array packaging structure has excellent thermal fatigue resistance, mechanical vibration resistance and heat dissipation performance and good welding spot mechanical performance.

1. Name of the product in this design: Hook and Loop (Concealed). 2. Purpose of this design: It is mainly used as a concealed hook for hanging clothes, towels, bath items, etc. 3. The key design feature of this product is its shape. 4. The image or photograph that best illustrates the design's key points: a 3D model.

The utility model discloses a positioning fixture for Hall sensor production, which comprises a box-shaped base, a bottom plate is slidably mounted in the base, a reset part is arranged between the bottom of the bottom plate and the base, the output end of the reset part is abutted against the bottom plate, a bearing plate and an upper panel are fixedly mounted on the base, the bearing plate is positioned above the bottom plate, and the upper panel is positioned above the bearing plate. A plurality of through holes are formed in a rectangular array of the bearing plate, the upper panel is located above the bearing plate, the upper panel and the bearing plate are correspondingly provided with a plurality of through holes, positioning pins are slidably installed in the through holes, sealing rings are arranged between the through holes and the positioning pins, the space between the bearing plate and the upper panel is filled with magnetorheological fluid, and an electromagnet is fixedly installed on the side face of the base. And the electromagnet is connected with a control switch. The placement positions are formed through the positioning pin array, so that the positioning pins can form corresponding placement points according to the shape of the side where the Hall current sensors are placed, and the placement requirements of the Hall current sensors in different shapes can be met conveniently.

A heat sink includes a base extending from a first end to a second end and a plurality of pin fins extending from the base and arranged in a number of columns including a first column and a second column. Each pin fin includes a lower portion at or near the base and an opposing top portion spaced apart from the base. A plurality of bridged ribs includes a first plurality of bridged ribs, wherein the first plurality of bridged ribs each connect the top portion of one of the pin fins in the first column with the top portion of one of the pin fins in the second column.

This invention discloses an automated relay conveying device, relating to the field of relay conveying technology. It includes a transmission mechanism for conveying relays of different shapes. The upper side of the transmission mechanism is equipped with a detection mechanism for photographing the relays. One side of the detection mechanism is equipped with a classification mechanism for sorting relays of different models into different areas for conveying. Another side of the classification mechanism is equipped with a cleaning mechanism for applying different dust removal methods to the relay pins with different distribution shapes. During relay conveying, the shape of the relay is photographed by a camera to determine the type of relay, and then automatically classified, achieving high classification efficiency. Furthermore, while classifying, the device can also determine the corresponding pin arrangement based on the relay type, facilitating subsequent cleaning of each pin by a brush following the pin arrangement trajectory.

An improved method and structure for forming an electrical interconnects mechanism in a Power Distribution Network (PDN) by placing capacitors on the top of the pin array on the printed circuit board (PCB) of the structure to decouple the PDN and results in lower impedance benefitting the frequency range of the PDN effecting a significant performance improvement in the spring-pin inductance from the transmission line. This reduction in impedance reduces the power supply ripple.

This utility model relates to the field of automated pin inspection technology, and more particularly to a mechanism for automatically inspecting the shape of pins, including a CCD component for optical inspection of the pin shape of a product; a product fixture platform with fixture acupoints on its surface, the fixture acupoints being through holes, and the upper diameter of the fixture acupoints being smaller than the outer diameter of the product to be inspected; the fixture acupoints are used to align the placement direction of the product to be inspected with the detection direction of the CCD component; a bottom pin fixture located below the product fixture platform and capable of being ejected from the fixture acupoints; the surface of the bottom pin fixture having an array of pin holes for verifying the compliance of the pin array on the product; a product clamping component for clamping and positioning the product on the fixture acupoints; and a lifting component for driving the bottom pin fixture to move vertically. This application improves the problem of inaccurate detection results caused by pins obstructing each other.

This invention relates to the field of superconducting material processing technology, specifically to a method for preparing Nb3Sn superconducting wires. The invention mainly involves inserting an Nb-Zr alloy into the exterior and / or center of a Sn-Cu single-core rod, filling the space between the Nb-Zr alloy and the Sn-Cu single-core rod with oxide powder, and then inserting it into a copper substrate. After multiple passes of stretching, forming, and length-cutting, Nb3Sn sub-components are obtained. These Nb3Sn sub-components are then uniformly arranged circumferentially within a copper tube to form a bundle, followed by multiple passes of stretching, heat treatment, and cutting to obtain the Nb3Sn superconducting wire. This invention enhances the critical current density of the Nb3Sn superconducting wire under high magnetic fields of 8T–16T by introducing an artificially pinned array with a density gradient distribution. This solves the problem of the matching effect produced by existing uniform artificially pinned center schemes, which limits the practical application of superconducting wires, and alleviates the decrease in critical current density of Nb3Sn superconducting wires under high fields.

This utility model relates to the field of camera module testing technology, specifically disclosing an automatic testing system for camera modules, including a pin test fixture, at least one test control board, a switch, and a host computer. The pin test fixture is signal-connected to the camera module under test, and includes a fixture body and a pin array disposed on the fixture body. The test control board is electrically connected to the pin test fixture, and includes a microcontroller, a multi-channel ADC acquisition module, and a signal output interface. The microcontroller is electrically connected to both the multi-channel ADC acquisition module and the signal output interface, and the signal output interface is electrically connected to the pin test fixture via wires. The switch is electrically connected to both the microcontroller and the host computer. The host computer is used to send test commands, receive test data, and display test results. This system solves the problems of low testing efficiency, easily damaged connectors, and unstable signal transmission.

This invention discloses a multi-level adaptive machining auxiliary clamping device, belonging to the field of robotic automated drilling and riveting. The base module of this invention is used to stably connect the pressure foot to the robot's end effector and provides mounting positions for the conformal module, locking module, and alignment module. The conformal module uses a cylindrical pin array to automatically adapt to the surface shape of workpieces with different curvatures and conforms accordingly. The locking module is used to lock the conformed cylindrical pin array, ensuring the stability of the conformation. The alignment module is used to align the perpendicularity of the tool axis to the workpiece surface before drilling. This invention has a simple structure, low cost, and convenient installation. By applying clamping force to the workpiece surface, it can reduce the influence of drilling axial force on the workpiece, reduce chatter during machining, and improve machining stability. Simultaneously, this device can achieve automatic conformal clamping of workpieces with different curvatures, ensuring stable clamping while reducing workpiece deformation and further improving drilling accuracy.

The invention discloses a packaging structure, a semiconductor structure and electronic equipment. The packaging structure comprises a substrate; the first pin array is arranged on the substrate, and the first pin array comprises a plurality of first data pins; and the second pin array is arranged on the substrate, and the second pin array comprises a plurality of second data pins. A blank area is arranged between the first pin array and the second pin array and extends from the center of the substrate to the edge of the substrate, and the end of the blank area is located on the outer side of the first pin array. At least one first data pin and / or at least one second data pin are / is adjacent to the blank area, and the minimum size of the blank area is larger than the diameter of the first data pin. The size of the packaging structure is small.

The invention discloses a tool and process for welding a sensor chip pin header and a circuit board, relates to the technical field of sensor processing, and is used for facilitating the installation and positioning of a sensor chip and the circuit board and improving the assembly efficiency and the yield. The tool for welding the sensor chip pin header and the circuit board is used for welding, positioning and fixing the sensor chip, the pin header and the circuit board, the sensor chip comprises a chip body and a plurality of contact pins, and the contact pins extend outwards along the side wall of the chip body and are distributed in parallel. The circuit board is provided with pin holes for the pins to pass through and pin header holes for the pin header to pass through at intervals, and the pin holes and the pin header holes penetrate through the circuit board along the thickness direction of the circuit board. The sensor chip pin header and circuit board welding tool comprises a chip mounting plate, a welding cover plate, a sliding limiting plate and a locking piece. A plurality of working grooves used for installing circuit boards are formed in the plate face of one side of the chip installation plate in parallel at intervals, and the circuit boards can be placed in the working grooves.

The invention relates to the technical field of IC manufacturing semiconductor packaging, in particular to a packaging body, a lead frame structure unit and an SOP packaging piece, according to the SOP packaging piece, a plurality of lead frames are arranged on a lead frame body in an array mode, one-to-one correspondence of the packaging body and the lead frames is achieved, the packaging body is in a pin arrangement mode different from an existing SOP8L, and the packaging body and the lead frame structure unit are arranged in an array mode. Wherein five common pins are arranged on one side of the colloid, one common pin and two wide pins are arranged on the other side of the colloid, the common pins and the wide pins are arranged on the lead frame structure unit, and the wide pins can conduct out heat transmitted from the surface of a chip to the inside of a plastic package body to play a role in heat dissipation. Through the one-to-one correspondence between the inner pins and the outer pins, the connection process of the packaging piece and the external equipment is simplified, and the reliability of a system is improved.

A multi-commodity flow-based synchronous escape routing method and apparatus, and a medium. The method comprises: creating a grid pin array (GPA) routing graph on the basis of a chip GPA, and creating an irregular pin array routing graph on the basis of an array having a miss pin; creating escape boundary nodes in synchronous escape routing on the basis of the created GPA routing graph; creating an overall synchronous escape routing graph on the basis of the created escape boundary nodes; on the basis of the created overall synchronous escape routing graph, creating a multi-commodity flow-based synchronous escape routing model; solving the synchronous escape routing model to obtain a routing result, and designing a constraint for grouping and same-layer arrangement in the synchronous escape routing; and optimizing routing paths of the synchronous escape routing model, and accelerating the synchronous escape routing on the basis of an optimization result. By modeling routing constraints and path optimization methods, the present invention supports the simultaneous action of multiple acceleration methods, thereby improving system efficiency.

The application discloses a pattern and current-voltage linkage test method, a test machine and a storage medium, and belongs to the technical field of semiconductor testing, wherein the pattern and current-voltage linkage test method comprises the following steps: a trigger processing module acquires a trigger command sent by an upper computer, and according to the trigger command, corresponding pre-stored patterns are called from a memory; the pre-stored patterns comprise pattern waveforms and current-voltage microinstructions; when the trigger processing module identifies the pattern waveforms, the trigger processing module sends the pattern waveforms to a pattern module, and the pattern module controls an electronic pin array to output the pattern waveforms according to the pattern waveforms; if the trigger processing module identifies the current-voltage microinstructions, the trigger processing module sends the current-voltage microinstructions to a current-voltage test module, and the current-voltage test module controls the electronic pin array to perform current-voltage testing according to the current-voltage microinstructions. The method does not pass through the upper computer, realizes the pattern and current-voltage linkage test in a business FPGA, saves communication time, and improves test efficiency.

The invention relates to the field of molecular diagnosis equipment, and discloses an NGS library preparation instrument based on a digital microfluidic technology. Comprising a rack and a top plate fixedly arranged on the rack. And the substrate is provided with an opening penetrating through the thickness direction. And the chip bearing platform is arranged in the opening and is used for bearing the digital micro-fluidic chip. And the driving plate is fixed below the substrate, is positioned below the opening area, is provided with a pin array and is in contact with a bottom electrode of the chip. The pressing and releasing mechanism comprises a first pressing and releasing part and a second pressing and releasing part, elastic abutting force is applied through an elastic assembly, so that the digital micro-fluidic chip is electrically connected with the pin array, and the abutting force can be released to release the chip. A temperature control module; and a magnetic bead control module. The preparation instrument executes multiple steps of sample treatment, temperature control, magnetic bead separation and the like in the NGS library preparation process.