641 results about "Monocrystalline silicon" patented technology

The invention discloses a high-efficiency low-loss preparation method of a single crystal silicon carbide wafer. The method comprises the following steps: A, grinding the surface of a single crystal silicon carbide ingot; b, the ultrafast pulse laser is modulated into N light spots, the N light spots are focused in the crystal ingot and distributed in the axial direction of the crystal ingot according to preset depth positions, and all the light spots are parallel to the horizontal direction; all the light spots are scanned at the same time, the scanning surface formed by the same light spot covers the cross section of the single crystal silicon carbide crystal ingot in the horizontal direction, and N laser modified layers are formed after scanning; c, carrying out stress-induced separation on the single crystal silicon carbide crystal ingot in the step B; and D, grinding the cutting surface of the single crystal silicon carbide wafer. According to the high-efficiency and low-loss preparation method of the single-crystal silicon carbide wafer, the preparation efficiency of the silicon carbide wafer is improved, meanwhile, the material loss of the single-crystal silicon carbide ingot is reduced, and the yield of the single-crystal silicon carbide ingot is improved.

The invention provides a crystal pulling method for improving the BMD defect density in monocrystalline silicon and a monocrystalline silicon rod, and belongs to the technical field of monocrystalline silicon crystal pulling, and particularly relates to the following steps: stabilizing the oxygen content in a crystal in a relatively high interval by cooperatively regulating and controlling the argon flow, the furnace pressure, the crucible rotating speed, the crystal rod rotating speed and the pulling speed, providing a sufficient oxygen source for generation of BMD defects, and improving the BMD defect density in the monocrystalline silicon on the basis of stabilizing the oxygen content in the crystal in a relatively high interval. In the equal-diameter process, temperature compensation is carried out on a crystal bar through a preset temperature compensation device, diffusion and precipitation of oxygen atoms are effectively promoted to form BMD crystal nucleuses, the BMD body defect density and the axial distribution uniformity are remarkably improved, the specification lower limit of the BMD density is promoted to be improved to 1.0 E + 11 ea / cm < 3 > or above, the internal gettering capacity of a silicon wafer is finally enhanced, and the service life of the silicon wafer is prolonged. And a reliable guarantee is provided for improving the performance and yield of the device.

The invention provides a photovoltaic monocrystalline silicon wafer and a solar cell comprising the same, and belongs to the technical field of solar cells, in particular to the technical field of photovoltaic silicon wafers. The resistivity of the silicon wafer is 50 to 500 omega.cm; the oxygen content of the silicon wafer is less than or equal to 8 * 10 < 17 > atom / cm < 3 >, preferably 1.5 * 10 < 17 > to 6 * 10 < 17 > atom / cm < 3 >. A battery prepared from the silicon wafer provided by the invention is high in photoelectric conversion efficiency concentration ratio.

The invention provides a single crystal silicon rod drawing method and system based on dynamic parameter linkage, and the method comprises the steps: implementing a temperature gradient dynamic control strategy according to different stages of single crystal silicon rod drawing; a linkage strategy of a rotation rate and a pulling speed is adopted, and the rotation rate of the seed crystal is kept at a high rotation speed in the initial stage of pulling to stabilize a melt interface; meanwhile, a stepped dynamic adjustment strategy is adopted for the lifting speed, low-speed lifting is kept in the initial stage so as to ensure the melt stability, and then the lifting speed is linearly increased according to the increase of the diameter of the silicon rod; and the crucible lifting speed is adjusted in real time based on a self-adaptive adjustment strategy, so that the crucible lifting speed and the increase of the diameter of the silicon rod are kept synchronous, the stability of the melt liquid level height is maintained, and the fluctuation of the dopant concentration is prevented. By dynamically adjusting the temperature gradient, the rotation rate, the pulling speed and the crucible lifting speed, thermal stress is reduced, melt convection is stabilized, the radial uniformity of the silicon wafer is improved, and the requirements of a BC battery for low-defect and high-uniformity doping are met.

The utility model discloses a monocrystalline silicon leftover material multi-face scrubbing device which comprises a scrubbing box, a conveying roller, a pressing roller, a conveying driving piece, a spraying pipe, a spraying head and a scrubbing component, the conveying roller is horizontally and rotatably arranged in the scrubbing box, and the pressing roller is rotatably arranged in the scrubbing box and matched with the conveying roller. The transmission driving part is fixedly arranged in the scrubbing box and used for driving the transmission roller to rotate, the spraying pipe is fixedly arranged in the scrubbing box, a plurality of spraying heads are arranged on the spraying pipe, and the scrubbing part is arranged in the scrubbing box and matched with the edge leather on the transmission roller. And parts such as the conveying rollers and the pressing rollers are matched for use, so that the edge skins can be conveyed in batches for cleaning, and the cleaning efficiency can be effectively improved.

The invention provides a preparation method for improving resistivity uniformity of a whole rod of heavily-doped monocrystalline silicon, and relates to the technical field of heavily-doped monocrystalline silicon drawing, in the crystal drawing process, crystal bar drawing is carried out through first furnace pressure from seeding to growing to a first equal-diameter preset length; drawing a second equal-diameter predetermined length from the first equal-diameter predetermined length, and reducing the furnace pressure according to a predetermined rate to reduce the first furnace pressure to a second furnace pressure; after the diameter is equal to a second preset length, crystal bar drawing is carried out through second furnace pressure; in the crystal growth process, along with crystal growth and furnace pressure stage reduction, segregated doped gas is continuously volatilized, so that the resistivity of the tail of a crystal bar is improved, the axial resistivity fluctuation range is controlled within + / -5%, and the harsh requirement of a high-end semiconductor device for a substrate material is met.

A photovoltaic monocrystalline silicon wafer and a solar cell comprising same, belonging to the technical field of solar cells, and in particular to the technical field of photovoltaic silicon wafers. The resistivity of the silicon wafer is 50-500 Ω•cm; and the oxygen content of the silicon wafer is less than or equal to 8x1017 atom / cm3, preferably 1.5×1017-6×1017 atom / cm3. Solar cells manufactured from the silicon wafer have high consistency in photoelectric conversion efficiency.

The invention discloses a far-infrared silicon-based high-transmittance metasurface and a designing and processing method, and relates to the field of micro-nano optical devices. The metasurface is of a layered stacking structure with a hole-type metasurface atom array layer as a center layer, and an upper antireflection film layer, an upper substrate layer, the hole-type metasurface atom array layer, a lower substrate layer and a lower antireflection film layer are sequentially arranged on the metasurface from the incident side to the emergent side. Each of the upper antireflection film layer and the lower antireflection film layer comprises a first antireflection layer and a second antireflection layer which are sequentially arranged from inside to outside; the hole-type super-structure atom array layer, the upper substrate layer and the lower substrate layer are all made of monocrystalline silicon. According to the invention, the equivalent refractive index of the matching interface is designed through the sub-wavelength structure, the reflectivity of the far infrared band of 8-12 [mu] m is improved to 95% or more under the condition of no loss, the process route is simple, and the microstructure units of the surface of the super-structure are packaged and protected by using the silicon-silicon bonding process, so that the stability of the surface of the super-structure in processing and application is improved.

The invention discloses a suede structure, a perovskite solar cell and a preparation method. The preparation method of the textured structure comprises the following steps: providing a substrate containing monocrystalline silicon, wherein the monocrystalline silicon is positioned on the surface of the substrate; a tower footing is formed on the surface of the substrate by etching a specific crystal face of monocrystalline silicon, the tower footing comprises a tower bottom and side walls surrounding the tower bottom, and the side walls of the tower footing form a net-shaped frame; forming a protective layer on the surface of the base, wherein the thickness of a first part, corresponding to the side wall of the tower footing, in the protective layer is greater than that of a second part, corresponding to the tower bottom of the tower footing, in the protective layer; cleaning the protective layer, completely removing the second part, and partially removing the first part; preparing a suede structure at the tower bottom of the tower footing; and cleaning to remove the remaining first part. The textured structure prepared by the preparation method can improve the photoelectric conversion efficiency of the perovskite solar cell.

The utility model relates to monocrystalline silicon processing technical field, and disclose a cutting silicon core blanking device for monocrystalline silicon processing, including guide table, guide chute, protective layer, transport device, conveyer belt, fixed clamp holder, adjustable clamp holder, limit hole, screw shaft, clamping layer, nut, in the utility model, when the monocrystalline silicon rod is cut by diamond wire and forms the silicon wafer blanking, the silicon wafer can be buffered and received by the protective layer and downwardly rolls and guides, and the fixed clamp holder and adjustable clamp holder on the conveyer belt correspond to the position of guide chute, at this time, the silicon wafer can roll down and fall into the fixed clamp holder and adjustable clamp holder between the guide chute and be collected, and the clamping layer between the fixed clamp holder and adjustable clamp holder can clamp and protect the falling silicon wafer, and the adjustable clamp holder can be located outside the screw shaft and slide and adjust to adapt to the silicon wafer thickness, when the transport device drives the conveyer belt and starts conveying, the silicon wafer between the fixed clamp holder and adjustable clamp holder can be automatically collected and conveyed.

The invention discloses a polyimide-aluminum oxide composite film material and a preparation method thereof, the composite film material is composed of a polyimide layer and an aluminum oxide layer deposited and combined on the upper surface of the polyimide layer, and the thickness of the polyimide layer and the thickness of the aluminum oxide layer are both nanoscale; the composite film material is prepared by using atomic layer deposition equipment, and the preparation method comprises the following steps: firstly, depositing a nanoscale polyimide layer on a monocrystalline silicon piece carrier according to a set program by taking pyromellitic dianhydride and hexamethylenediamine as precursor raw materials; and depositing and combining a nanoscale aluminum oxide layer on the upper surface of the polyimide layer according to a set program by taking trimethylaluminum and distilled water as precursor raw materials. The prepared composite film material is different from a current composite film material prepared by blending polyimide and aluminum oxide and then carrying out film casting, the composite film material has a nano-scale polyimide layer with uniform thickness and a nano-scale aluminum oxide layer deposited and combined on the upper surface of the polyimide layer, and the composite film material has a good radiation refrigeration effect.

The invention discloses a preparation method of a metal surface micro-pattern texture, and belongs to the technical field of metal materials and machining thereof. The method comprises the following steps: S1, depositing a metal shading layer on a monocrystalline silicon wafer and patterning, spin-coating a polysiloxane precursor, curing and stripping to prepare a flexible transparent photoetching template; s2, conformally attaching a template to the cleaned bent metal surface, and performing ultraviolet exposure and development to form a cured photoresist mask; and S3, the metal workpiece with the mask serves as an anode, the metal workpiece with the mask is placed in HF-HCl mixed electrolyte for electrochemical etching, the voltage is controlled to be 2.0-5.0 V, the time is 2-8 min, and the micron-sized surface texture of 0.5-2.5 microns is obtained. And the thickness of the template is 0.3-3.0 mm, so that the template can adapt to metal surfaces with different curvature radiuses. According to the method, the photoetching-electrochemical etching process is successfully extended to the curved metal surface for the first time, the pattern fidelity is high, the texture depth is controllable, and the method can be widely applied to key parts, needing mechanical sealing and lubricating, of a carrier vehicle body.

The invention provides a czochralski method monocrystalline silicon preparation method and a matched growth system. According to the Czochralski method monocrystalline silicon preparation method, a stabilization treatment step is executed after material melting is finished, the stabilization treatment step comprises a magnetic field closing stage and a magnetic field opening stage, and the lifting movement tracks of a quartz crucible in the two stages are the same and the rotation directions are opposite. According to the technical scheme, two-stage stabilization treatment of closing and opening of the magnetic field is set after material melting, and preferably, the lifting track, the total displacement and the rotation rate of the quartz crucible in the two stages are consistent in rate and movement and are opposite in direction, so that impact and scouring on the quartz crucible are reduced, high-temperature softening deformation is relieved, and chemical reaction of molten silicon and the crucible is inhibited; and the crucible loss is delayed.

The invention discloses a czochralski silicon thermal field and a single crystal furnace structure. The thermal field comprises a heater assembly, a middle-upper heat preservation and supporting assembly, a lower heat preservation and crucible supporting assembly and a water-cooling heat insulation assembly, and the heater assembly is fixed on a furnace cover. According to the thermal field structure, the structural form that all assemblies of an existing thermal field are arranged on the furnace bottom plate is changed, a thermal insulation and thermal field supporting structure of the thermal field is fixedly installed in the main furnace chamber, and a heater of the heater assembly is connected to the furnace cover. The heater assembly of the thermal field adopts a hoisting type design, corrosion of oxides to heater feet and copper electrodes is greatly weakened, the service life of the device is prolonged, an upper lifting mechanism is reduced and the time for cleaning the thermal field and replacing a crucible is shortened in cooperation with an open type structure of the furnace bottom of the single crystal furnace, so that the production efficiency is greatly improved, and the production cost is reduced. The safety is better, and the functionality is stronger.

The invention discloses a TBC crystalline silicon cell doped on the back step by step and region and a preparation method of the TBC crystalline silicon cell. The preparation method comprises the steps that an N-type monocrystalline silicon substrate is provided, the substrate comprises a front face and a back face, annealing treatment is carried out on the back face in a partitioned and step-by-step mode, and doping activation of independent areas is carried out; preparing a textured structure with pyramid morphology on the front surface of the N-type monocrystalline silicon substrate to enhance the light trapping effect; and performing a metal slurry screen printing process on the first region and the second region, performing high-temperature sintering, forming a metal electrode in contact with the first doping layer in the first region, forming a metal electrode in contact with the second doping layer in the second region, and preparing the TBC crystalline silicon battery. According to the invention, the technical problems of incompatibility of boron and phosphorus doped region doping processes, increase of the complexity of a process route, influence on the cell performance and the like in the prior art can be solved, the open-circuit voltage and the fill factor of the cell can be effectively improved, and the photoelectric conversion efficiency of the TBC crystalline silicon cell is improved.

The invention discloses a monocrystalline silicon wafer alkali polishing additive and a preparation method and application thereof, and the alkali polishing additive comprises the following components by mass content: 0.5-4% of a reaction accelerator, 2-5% of a corrosion and scale inhibitor, 1.5-3% of a chelating agent, 1-3% of a pH regulator, 1-5% of a surfactant, 3-10% of a cosolvent and the balance of water according to the total mass of 100%. The alkali polishing additive is obvious in performance gain, good in etching selectivity and small in silicon wafer weight loss; the back polishing effect can be improved, the reflectivity of the silicon wafer is high, and the photoelectric conversion efficiency of a photovoltaic cell is improved; the anti-crystallization performance is excellent, and the environment is protected.

The invention belongs to the technical field of semiconductor material processing, and particularly relates to a monocrystalline silicon preparation method for improving forward voltage drop of a power device, the power device and monocrystalline silicon, and the method comprises the following steps: when a monocrystalline silicon rod is drawn by a czochralski method, the growth crystal orientation is 1t by controlling crystal pulling parameters and cooling parameters in an equal-diameter process; 111gt, 111gt; the silicon single crystal rod, the crystal pulling parameters and the cooling parameters are configured as follows: interstitial oxygen precipitation can be inhibited to form silicon dioxide precipitation, so that the volume microdefect density in the grown silicon single crystal is lower than a preset threshold value, and the method provided by the invention inhibits the interstitial oxygen precipitation process by reasonably configuring the crystal pulling parameters and the cooling parameters, so that the yield of the silicon single crystal is improved. According to the present invention, the silicon dioxide deposition formation is reduced, such that the volume micro-defect density in the grown monocrystalline silicon is lower than the preset threshold value, and when the monocrystalline silicon is applied to the ultra-fast recovery diode product, the forward voltage drop value VF can be reduced so as to be within the range of 1.3-1.7 V so as to meet the customer requirements.

This invention discloses an integrated high-purity silica sol preparation device for polishing monocrystalline silicon substrates, relating to the field of high-purity silica sol production technology for monocrystalline silicon substrate polishing. The device includes a reactor and a filter box integrated below it. The top of the reactor is equipped with a silicon source quantitative feeding mechanism and a solvent synchronous feeding mechanism, which achieve proportional closed-loop quantitative addition through synchronous transmission. The reactor employs an anti-settling stirring structure combining a lower inclined impeller and an upper straight impeller, and is equipped with a bottom annular guide ring. The stirring mechanism and the filtering mechanism are powered by bevel gears and a synchronous belt. A scraper elastically contacts the filter screen and automatically scrapes slag in the downstream direction. A PLC integrated closed-loop control system completes the entire process of feeding, stirring, and filtering with coordinated control. This invention effectively solves the problems of inaccurate feeding, easy settling, easy screen clogging, and cumbersome segmented reaction and filtration in traditional devices, achieving continuous and stable production of high-purity silica sol, meeting the requirements for polishing 12-inch monocrystalline silicon substrates.

The invention provides a super junction semiconductor power device which comprises a heavily doped first conductive type substrate, and a first conductive type epitaxial layer is arranged on the heavily doped first conductive type substrate; a groove is formed in the first conductive type epitaxial layer; second conductive type doped monocrystalline silicon is filled in the groove to form a second conductive type columnar epitaxy; first conductive type columnar epitaxy and second conductive type columnar epitaxy which are alternately distributed are formed in the first conductive type epitaxial layer; the doping concentration of the second conductive type columnar epitaxy is greater than that of the first conductive type columnar epitaxy; a plurality of heavily doped first conductive type impurity injection regions extending into the first conductive type columnar epitaxy are distributed on the side walls of the two sides of the second conductive type columnar epitaxy; according to the invention, the soft reverse recovery characteristic can be obtained, the electromagnetic radiation in the reverse recovery process of the device is reduced, and meanwhile, the voltage-resistant stability of the device is improved.

A method for manufacturing monocrystalline silicon for growing monocrystalline silicon while a horizontal magnetic field is applied to a silicon melt, using a monocrystalline silicon manufacturing apparatus comprising a crucible and a heating device having a hollow cylindrical shape surrounding the crucible. The heating device comprises a first and a second heat-generating section, both having a hollow semi-cylindrical shape and the same heat-generating characteristics. The heating device is arranged such that when the heat-generating sections produce heat with different heat-generating quantities, the heating quantities of the first and second sections of the crucible are different. The first and second sections are arranged on either side across a vertical virtual plane that includes a central axis of the crucible and a central magnetic field line of the horizontal magnetic field.The process involves performing a first heating and generation cycle while the heat generation sections produce heat with the same heat generation quantity, and a second heating and generation cycle while the heat generation sections produce heat with different heat generation quantities.

The utility model relates to a spiral phosphorus-antimony co-doping device which is provided with a machine shell, one end of the machine shell is fixedly connected with a feeding pipe, the other end of the machine shell is fixedly connected with a discharging pipe, a spiral shaft is installed in the machine shell in a rotating mode, a continuous spiral blade is arranged on the spiral shaft, an outer magnetic sleeve is arranged on the outer circumferential face of the machine shell located on the outer side of the feeding pipe in a rotating mode, and the outer magnetic sleeve is connected with the discharging pipe. An inner magnetic sleeve is arranged on the spiral shaft corresponding to the position of the outer magnetic sleeve, the outer magnetic sleeve and the inner magnetic sleeve are magnetically attracted, and the inner magnetic sleeve rotating synchronously with the outer magnetic sleeve drives the spiral shaft to rotate so as to convey materials entering from the feeding pipe to the discharging pipe. According to the utility model, a dopant is conveyed into the monocrystalline silicon furnace in a spiral conveying manner, the doping operation efficiency is improved, and structurally, the outer magnetic sleeve which is magnetically attracted drives the inner magnetic sleeve to synchronously rotate so as to realize the rotation of the spiral shaft; therefore, gas in the single crystal furnace is not easy to leak from the transmission end of the spiral shaft in the doping process, so that the doping effect is ensured.

The utility model relates to a wireless temperature measurement system using a solar panel as an antenna, belongs to the technical field of wireless temperature measurement, and realizes miniaturization and cost effectiveness of a temperature measurement module by integrating a monocrystalline silicon solar panel as a radiating antenna. The system is composed of a plurality of key modules including a power supply and signal emission module, a control module, a temperature acquisition module, an energy storage module and a temperature conversion and forwarding module. The modules work cooperatively, accurate acquisition, conversion and wireless transmission of temperature data are ensured, and power supply of the system is managed at the same time. Therefore, the antenna is not shielded by the structure of the temperature measuring device, the radiation performance of the temperature measuring device is remarkably improved, and the wireless transmitting distance of the module is greatly increased.

A method for producing single-crystal silicon wafers for use in insulated gate bipolar transistors is disclosed. The method involves determining, for a relatively low-oxygen ingot, a radial profile of the ratio of (i) growth rate v and (ii) axial temperature gradient G. Based on the radial v / G profile, a nitrogen concentration can be selected that widens the v / G window to produce perfect silicon free of COPs and gate oxide defects.

This invention discloses a wet cleaning process for Topcon solar cells adapted to poly annealing, relating to the field of solar cells. The process includes alkaline polishing to control the oxide layer thickness, with intra-wafer thickness uniformity ≤ ±0.2nm and inter-wafer consistency ≤ ±0.15nm. The RCA cleaning process sequentially includes poly-coating removal cleaning, water washing, pre-cleaning, water washing, pre-acid washing, water washing, post-acid washing, water washing, pre-dehydration, and drying. The pre-cleaning involves immersing the monocrystalline silicon wafer in a 3.5%~4% (w / w) H2O2 mixed aqueous solution at 60℃~72℃ for 100s~120s. The post-acid washing involves immersing the monocrystalline silicon wafer in a 6%~8% (w / w) HF and 1%~2% (w / w) HCl mixed aqueous solution at room temperature for 100s~120s. By optimizing and adjusting the RCA cleaning process and the concentration ratio of the cleaning solution in the cleaning tank, the reaction is prevented from reaching the weak points of the oxide layer and further reacting with the doped crystalline silicon. At the same time, the cleaning process is optimized to ensure that the back surface of the silicon wafer retains a high doping concentration, reduce the surface transport resistance, and improve the fairing (FF).

This semiconductor thin film structure comprises an Si layer (102) formed on an insulating layer (101), and a semiconductor layer (103). The Si layer (102) is composed of monocrystalline Si, and the planar orientation of the main surface is (110). The semiconductor layer (103) is composed of a group III-V compound semiconductor. The semiconductor layer (103) is grown through crystallization in a direction parallel to the surface of the insulating layer (101) from a side surface (104) of the Si layer (102). The side surface (104) can be a (-111) plane extending in the [1-12] direction of the Si layer (102). The side surface (104) can also be a (1-11) plane extending in the [1-1-2] direction of the Si layer (102).

The present application relates to a kind of methods for detecting heavy boron defect, the technical field of silicon wafer processing, comprising the following operating steps: first step: heavy boron monocrystalline silicon rod line cut silicon wafer according to every 50 in the middle extraction 1 is formed first piece.Pilot step two: to first piece double side grinding once chamfer and single side grinding is carried out second chamfer.Third step: second chamfer is carried out alkali etching.Fourth step: first piece is placed in the cleaning tank with HCL and H2O2 mixture and is cleaned.Fifth step: after drying, the surface defect of silicon wafer is checked using fluorescent lamp.Sixth step: the first piece of detection qualified is carried out double side polishing.Seventh step: after polishing, it is cleaned using tank washer.Eighth step: it is carried out single side polishing.Ninth step: the silicon wafer after single side polishing is again returned to alkali etching.Tenth step: after drying, the surface defect of silicon wafer is checked using fluorescent lamp.Exclude the scratch influence brought by mechanical processing, improve the accuracy of detection, avoid the problem of existing heavy boron defect detection method detection misjudgment.

The utility model provides a kind of control system and superconducting magnet of superconducting magnet, and the intermediate node of the current drop resistor in its current drop circuit is connected to one end of the current drop resistor by second switch, and the resistance in current drop circuit can be adjusted by controlling the state of second switch, when quench protection, open second switch, maximize current drop power;When the current of coil is current drop adjusted, control second switch is closed, reduce current drop power, adapt current drop adjustment demand, and response is fast.The superconducting magnet of the utility model can provide a variety of different current drop power, increase the regulation and control precision when superconducting magnet coil is abnormal or quench, can effectively improve work stability and monocrystalline silicon crystal pulling quality.

The invention discloses an ultrathin silicon-based flexible sensor and a preparation method, and relates to the technical field of bioelectronics and flexible sensing. The device specifically comprises a flexible substrate; the monocrystalline silicon thin film layer is combined on the surface of the flexible substrate; the monocrystalline silicon thin film layer is of a patterned structure and comprises at least one gas sensing area; wherein the gas sensing area utilizes the doped monocrystalline silicon surface to adsorb gas molecules to be detected, and is configured to detect gas based on carrier concentration change caused by surface adsorption. The invention aims to develop a flexible sensor which has intrinsic flexibility, high sensing performance and biocompatibility and can synchronously realize gas and mechanical signal detection.

The invention relates to the technical field of variable capacitors, and discloses a grid-controlled semiconductor depletion layer modulation vacuum variable capacitor and a preparation method thereof, and the capacitor comprises an upper electrode which is made of high-purity oxygen-free copper and has a rounding edge structure; the lower electrode is made of oxygen-free copper and also serves as a mechanical support and a heat sink; the vacuum insulating layer is arranged between the upper electrode and the lower electrode; the semiconductor layer is N-type monocrystalline silicon, the thickness of the semiconductor layer is 200 micrometers, the resistivity of the semiconductor layer is 4-6, and impurity concentration of the semiconductor layer is 4-6. According to the invention, the high-voltage-withstanding vacuum gap capacitor and the semiconductor depletion layer capacitor based on MOS gate voltage regulation and control are connected in series and integrated, so that the single device has high-voltage insulation and rapid electric regulation capabilities at the same time creatively; the capacitance value can be continuously and accurately adjusted in the order of tens of nanoseconds to microseconds only by applying a small-amplitude low-voltage signal.

The utility model relates to the technical field of MEMS, and discloses a micro hot plate based on MEMS technology, which comprises a monocrystalline silicon substrate, a silicon dioxide insulating layer, a heating electrode, a testing electrode and a mounting socket, the monocrystalline silicon substrate provides a good supporting effect for the whole micro hot plate, the silicon dioxide insulating layer is arranged on the monocrystalline silicon substrate, and the testing electrode is arranged on the silicon dioxide insulating layer. The running speed of an internal circuit of the device can be increased, electric leakage can be reduced, and power consumption is reduced; a heating electrode and a testing electrode are arranged on the silicon dioxide insulating layer, rapid and uniform heating of the micro hot plate and real-time monitoring of temperature and gas are achieved, the installation mode is simplified through the overall design, and the testing efficiency is improved; in addition, the micro hot plate composed of the monocrystalline silicon substrate, the silicon dioxide insulating layer, the heating electrode and the testing electrode is inserted into the mounting socket, so that the micro hot plate array can be replaced at any time, and the cost is reduced.