8225 results about "Single crystal" patented technology

A bulk-doped semiconductor that is at least one of the following: a single crystal, an elongated and bulk-doped semiconductor that, at any point along its longitudinal axis, has a largest cross-sectional dimension less than 500 nanometers, and a free-standing and bulk-doped semiconductor with at least one portion having a smallest width of less than 500 nanometers. Such a semiconductor may comprise an interior core comprising a first semiconductor; and an exterior shell comprising a different material than the first semiconductor. Such a semiconductor may be elongated and my have, at any point along a longitudinal section of such a semiconductor, a ratio of the length of the section to a longest width is greater than 4:1, or greater than 10:1, or greater than 100:1, or even greater than 1000:1. At least one portion of such a semiconductor may a smallest width of less than 200 nanometers, or less than 150 nanometers, or less than 100 nanometers, or less than 80 nanometers, or less than 70 nanometers, or less than 60 nanometers, or less than 40 nanometers, or less than 20 nanometers, or less than 10 nanometers, or even less than 5 nanometers. Such a semiconductor may be a single crystal and may be free-standing. Such a semiconductor may be either lightly n-doped, heavily n-doped, lightly p-doped or heavily p-doped. Such a semiconductor may be doped during growth. Such a semiconductor may be part of a device, which may include any of a variety of devices and combinations thereof, and, and a variety of assembling techniques may be used to fabricate devices from such a semiconductor. Two or more of such a semiconductors, including an array of such semiconductors, may be combined to form devices, for example, to form a crossed p-n junction of a device. Such devices at certain sizes may exhibit quantum confinement and other quantum phenomena, and the wavelength of light emitted from one or more of such semiconductors may be controlled by selecting a width of such semiconductors. Such semiconductors and device made therefrom may be used for a variety of applications.

A method for forming and the structure of a vertical channel of a field effect transistor, a field effect transistor and CMOS circuitry are described incorporating a drain, body and source region on a sidewall of a vertical single crystal semiconductor structure wherein a hetero-junction is formed between the source and body of the transistor, wherein the source region and channel are independently lattice strained with respect the body region and wherein the drain region contains a carbon doped region to prevent the diffusion of dopants (i.e., B and P) into the body. The invention reduces the problem of short channel effects such as drain induced barrier lowering and the leakage current from the source to drain regions via the hetero-junction and while independently permitting lattice strain in the channel region for increased mobility via choice of the semiconductor materials. The problem of scalability of the gate length below 100 nm is overcome by the heterojunction between the source and body regions.

It is an object to provide a semiconductor device which has a large size and operates at high speed. A top gate transistor which includes a semiconductor layer of single-crystal and a bottom gate transistor which includes a semiconductor layer of amorphous silicon (microcrystalline silicon) are formed over the same substrate. Then, gate electrodes of each transistor are formed with the same layer, and source and drain electrodes are also formed with the same layer. Thus, manufacturing steps are reduced. In other words, two types of transistors can be manufactured by adding only a few steps to the manufacturing process of a bottom gate transistor.

Scanning Laser Epitaxy (SLE) is a layer-by-layer additive manufacturing process that allows for the fabrication of three-dimensional objects with specified microstructure through the controlled melting and re-solidification of a metal powders placed atop a base substrate. SLE can be used to repair single crystal (SX) turbine airfoils, for example, as well as the manufacture functionally graded turbine components. The SLE process is capable of creating equiaxed, directionally solidified, and SX structures. Real-time feedback control schemes based upon an offline model can be used both to create specified defect free microstructures and to improve the repeatability of the process. Control schemes can be used based upon temperature data feedback provided at high frame rate by a thermal imaging camera as well as a melt-pool viewing video microscope. A real-time control scheme can deliver the capability of creating engine ready net shape turbine components from raw powder material.

A dual plasma source (80) is provided for a plasma processing system (10), comprising a first plasma source (82) and a second plasma source (84). The first plasma source (82) has a first plasma passageway (86) for transporting a first plasma therethrough toward a processing chamber (16), the first plasma passageway providing a first inlet (90) for accepting a first gas mixture to be energized by the first plasma source. The second plasma source (84) is connected to the first plasma source (82) and has a second plasma passageway (88) for transporting a second plasma therethrough toward the processing chamber (16), the second plasma passageway providing a second inlet (92) for accepting a second gas mixture to be energized by the second plasma source. The first plasma passageway (86) is constructed from a material that resists atomic oxygen recombination with the first plasma, and the second plasma passageway (88) is constructed from a material that resists etching by the second plasma. In a more limited embodiment, the first plasma passageway (86) is constructed from quartz (SiO.sub.2) and the second plasma passageway is (88) constructed from alumina (Al.sub.2 O.sub.3) or single crystal alumina (sapphire).

A method of making a bonded intermediate substrate includes forming a weak interface in a GaN source substrate by implanting ions into an N-terminated surface of the GaN source substrate, bonding the N-terminated surface of the GaN source substrate to a handle substrate, and exfoliating a thin GaN single crystal layer from the source substrate such that the thin GaN exfoliated single crystal layer remains bonded to the handle substrate and a Ga-terminated surface of the thin GaN single crystal layer is exposed. The method further includes depositing a capping layer directly onto the exposed surface of the thin GaN single crystal layer, and annealing the thin GaN single crystal layer in a nitrogen containing atmosphere after depositing the capping layer. The in-plane strain present in the thin GaN single crystal layer after the annealing is reduced relative to an in-plane strain present in said layer prior to the annealing.

Adhesion defects between a single crystal semiconductor layer and a support substrate are reduced to manufacture an SOI substrate achiving high bonding strength between the single crystal semiconductor layer and the support substrate. Plasma is produced by exciting a source gas, ion species contained in the plasma are added from one surface of a single crystal semiconductor substrate, and thereby forming a damage region in the single crystal semiconductor substrate; forming an insulating layer over one surface of the single crystal semiconductor substrate; a support substrate is bonded so as to face the single crystal semiconductor substrate with the insulating layer therebetween; the single crystal semiconductor substrate is heated to separate the single crystal semiconductor substrate into a single crystal semiconductor layer bonded to the support substrate and a single crystal semiconductor substrate, in the damage region; and the single crystal semiconductor layer bonded to the support substrate is pressed.

Process for the preparation of thin monocrystalline or polycrystalline semiconductor material films, characterized in that it comprises subjecting a semiconductor material wafer having a planar face to the three following stages: a first stage of implantation by bombardment (2) of the face (4) of the said wafer (1) by means of ions creating in the volume of said wafer a layer (3) of gaseous microbubbles defining in the volume of said wafer a lower region (6) constituting the mass of the substrate and an upper region (5) constituting the thin film, a second stage of intimately contacting the planar face (4) of said wafer with a stiffener (7) constituted by at least one rigid material layer, a third stage of heat treating the assembly of said wafer (1) and said stiffener (7) at a temperature above that at which the ion bombardment (2) was carried out and sufficient to create by a crystalline rearrangement effect in said wafer (1) and a pressure effect in the said microbubbles, a separation between the thin film (5) and the mass of the substrate (6).

A method for producing a nitride semiconductor, comprising controlling temperature and pressure in a autoclave containing a seed having a hexagonal crystal structure, a nitrogen element-containing solvent, a raw material substance containing a metal element of Group 13 of the Periodic Table, and a mineralizer so as to put said solvent into a supercritical state and/or a subcritical state and thereby ammonothermally grow a nitride semiconductor crystal on the surface of said seed, wherein the crystal growth rate in the m-axis direction on said seed is 1.5 times or more the crystal growth rate in the c-axis direction on said seed. By the method, a nitride semiconductor having a large-diameter C plane or a nitride semiconductor thick in the m-axis direction can be efficiently and simply produced.

A freestanding GaN single crystal substrate is made by the steps of preparing a (111) GaAs single crystal substrate, forming a mask having periodically arranged windows on the (111) GaAs substrate, making thin GaN buffer layers on the GaAs substrate in the windows of the mask, growing a GaN epitaxial layer on the buffer layers and the mask by an HVPE or an MOC, eliminating the GaAs substrate and the mask away and obtaining a freestanding GaN single crystal substrate. The GaN single crystal has a diameter larger than 20 mm and a thickness more than 0.07 mm, being freestanding and substantially distortion-free.

A method for large-scale manufacturing of gallium nitride boules. Large-area single crystal seed plates are suspended in a rack, placed in a large diameter autoclave or internally-heated high pressure apparatus along with ammonia and a mineralizer, and grown ammonothermally. The seed orientation and mounting geometry are chosen to provide efficient utilization of the seed plates and of the volume inside the autoclave or high pressure apparatus. The method is scalable up to very large volumes and is cost effective.

There is disclosed a silicon focus ring consisting of silicon single crystal used as a silicon focus ring in a plasma apparatus, wherein concentration of interstitial oxygen contained in the silicon focus ring is not less than 5x10<17 >atoms/cm<3 >and not more than 1.5x10<18 >atoms/cm<3>, and a producing method for a silicon focus ring used for a plasma apparatus, wherein a single crystal silicon wherein concentration of interstitial oxygen contained in the silicon focus ring is not less than 5x10<17 >atoms/cm<3 >and not more than 1.5x10<18 >atoms/cm<3 >is grown by a Czochralski method, the single crystal silicon is processed in a circle, and a silicon focus ring is produced. There can be provided a silicon focus ring, which can prevent disadvantage due to impurities such as heavy metal.

A white color or neutral color LED having an n-type ZnSe single crystal substrate doped with I, Cl, Br, Al, Ga or In as SA-emission centers and an epitaxial film structure including a ZnSe, ZnCdSe or ZnSeTe active layer and a pn-junction. The active layer emits blue or bluegreen light. The SA-emission centers in the ZnSe substrate convert blue or bluegreen light to yellow or orange SA-emission. The blue or bluegreen light from the epitaxial film structure and the yellow or orange light from the ZnSe substrate synthesize white color light or neutral color light between red and blue.

Disclosed is a natural-superlattice homologous single-crystal thin film, which comprises a complex oxide which is epitaxially grown on either one of a ZnO epitaxial thin film formed on a single-crystal substrate, the single-crystal substrate after disappearance of the ZnO epitaxial thin film and a ZnO single crystal. The complex oxide is expressed by the a formula: M¹M²O₃ (ZnO)_m, wherein M¹ is at least one selected from the group consisting of Ga, Fe, Sc, In, Lu, Yb, Tm, Er, Ho and Y, M² is at least one selected from the group consisting of Mn, Fe, Ga, In and Al, and m is a natural number of 1 or more. A natural-superlattice homologous single-crystal thin film formed by depositing the complex oxide and subjecting the obtained layered film to a thermal anneal treatment can be used in optimal devices, electronic devices and X-ray optical devices.

Systems and methods related to an image sensor of one or more embodiments include subjecting a donor semiconductor wafer to an ion implantation process to create an exfoliation layer of semiconductor film on the donor semiconductor wafer, forming an anodic bond between the exfoliation layer and an insulator substrate by means of electrolysis; separating the exfoliation layer from the donor semiconductor wafer to transfer the exfoliation layer to the insulator substrate; and creating a plurality of image sensor features proximate to the exfoliation layer. Forming the anodic bonding by electrolysis may include the application of heat, pressure and voltage to the insulator structure and the exfoliation layer attached to the donor semiconductor wafer. Image sensor devices include an insulator structure, a semiconductor film, an anodic bond between them, and a plurality of image sensor features. The semiconductor film preferably comprises an exfoliation layer of a substantially single-crystal donor semiconductor wafer.

A nonvolatile memory cell is provided, the cell comprising a transistor in series with resistance-switching material, which can be switched between at least two stable resistance states, for example a high-resistance state and a low-resistance state. In preferred embodiments the transistor is a TFT, having a channel region not formed in a monocrystalline wafer substrate. In preferred embodiments the transistor may have either a vertically oriented channel or a laterally oriented channel. Either embodiment can be formed in a monolithic three dimensional memory array in which multiple memory levels can be formed above a single substrate, forming a highly dense nonvolatile memory array.

A semiconductor device and a method for manufacturing thereof are provided. The method includes a step of forming a first insulating film containing silicon and oxygen as its composition over a single-crystal semiconductor substrate, a step of forming a second insulating film containing silicon and nitrogen as its composition over the first insulating film, a step of irradiating the second insulating film with first ions to form a separation layer in the single-crystal semiconductor substrate, a step of irradiating the second insulating film with second ions so that halogen is contained in the first insulating film, and a step of performing heat treatment to separate the single-crystal semiconductor substrate with a single-crystal semiconductor film left over the supporting substrate.

In a method for producing a resonant cavity light emitting device, a seed gallium nitride crystal (14) and a source material (30) are arranged in a nitrogen-containing superheated fluid (44) disposed in a sealed container (10) disposed in a multiple-zone furnace (50). Gallium nitride material is grown on the seed gallium nitride crystal (14) to produce a single-crystal gallium nitride substrate (106, 106′). Said growing includes applying a temporally varying thermal gradient (100, 100′, 102, 102′) between the seed gallium nitride crystal (14) and the source material (30) to produce an increasing growth rate during at least a portion of the growing. A stack of group III-nitride layers (112) is deposited on the single-crystal gallium nitride substrate (106, 106′), including a first mirror sub-stack (116) and an active region (120) adapted for fabrication into one or more resonant cavity light emitting devices (108, 150, 160, 170, 180).

A pulse laser beam having a rectangular irradiation region is irradiated on the same point in a non-single crystal semiconductor film multiple times. The pulse laser beam has an energy profile in a longitudinal direction in the beam irradiation region as follows: (a) there are the first region having an energy density of Ea or higher and the second regions on both sides of the first region having an energy density of less than Ea, and (b) an energy density slope has an absolute value of 20 to 300 J/cm3 in a boundary region extending to 1 mum from the boundary line between the first and the second regions.

The present invention provides a method for selectively transferring elements such as monocrystalline Si thin films or elements made of monocrystalline Si from a base substrate (100) onto an insulating substrate without the use of an intermediate substrate. The base substrate (first substrate) (100) in which the elements are formed is selectively irradiated with a laser having a multiphoton absorption wavelength. Thus, elements to be transferred out of the elements and corresponding thin films on the base substrate (100) are transferred onto a transfer destination substrate (second substrate) (200).

A semiconductor structure includes an interconnect region and a semiconductor stack bonded to the interconnect region through a bonding region. The stack includes two semiconductor layers having different electrical properties. The stack also includes single crystalline semiconductor material. The stack can be processed to form a mesa structure and the mesa structure can be processed to from a vertically oriented semiconductor device.

Technology is described herein for manufacturing a three-dimensional 3D stacked memory structure having multiple layers of single crystal silicon or other semiconductor. The multiple layers of single crystal semiconductor are suitable for implementing multiple levels of high performance memory cells.

Provided is a method of fabricating a semiconductor wafer. The method includes preparing a substrate wafer having a non-single-crystalline thin layer; disposing at least one single crystalline pattern adjacent to the non-single-crystalline thin layer on the substrate wafer; and forming a material layer contacting the single crystalline pattern on the non-single-crystalline thin layer.

A method of making a virtual substrate includes providing a donor substrate comprising a single crystal donor layer of a first material over a support substrate, wherein the first material comprises a ternary, quaternary or penternary semiconductor material or a material which is not available in bulk form, bonding the donor substrate to a handle substrate, and separating the donor substrate from the handle substrate such that a single crystal film of the first material remains bonded to the handle substrate.

<heading lvl="0">Abstract of Disclosure</heading> Chemical vapor deposition methods are used to deposit silicon-containing films over mixed substrates. Such methods are useful in semiconductor manufacturing to provide a variety of advantages, including uniform deposition over heterogeneous surfaces, high deposition rates, and higher manufacturing productivity. An example is in forming the base region of a heterojunction bipolar transistor, including simultaneous deposition over both single crystal semiconductor surfaces and amorphous insulating regions.

Large gas turbine blades made from separate cast segments of superalloys are disclosed. The turbine blade is designed such that bond lines between adjacent segments are placed in low stress regions of the blade. The cast superalloy segments of the blades are aligned and fitted together with specified tolerances. The turbine blade segments are then joined by transient liquid phase bonding, followed by a controlled heat treatment which produces the desired microstructure in the bond region. The method allows for the production of large, high quality turbine blades by joining small, high quality cast superalloy sections, in comparison with prior attempts to cast large turbine blades as single pieces which have produced very low yields and high individual component costs.

A robust multiple-walled, multi-pass, high cooling effectiveness cooled turbine vane or blade designed for ease of manufacturability, minimizes cooling flows on highly loaded turbine rotors. The vane or blade design allows the turbine inlet temperature to increase over current technology levels while simultaneously reducing turbine cooling to low levels. A multi-wall cooling system is described, which meets the inherent conflict to maximize the flow area of the cooling passages while retaining the required section thickness to meet the structural requirements. Independent cooling circuits for the vane or blade's pressure and suction surfaces allow the cooling of the airfoil surfaces to be tailored to specific heat load distributions (that is, the pressure surface circuit is an independent forward flowing serpentine while the suction surface is an independent rearward flowing serpentine). The cooling air for the independent circuits is supplied through separate passages at the base of the vane or blade. The cooling air follows intricate passages to feed the serpentine thin outer wall passages, which incorporate pin fins, turbulators, etc. These passages, while satisfying the aero/thermal/stress requirements, are of a manufacturing configuration that may be cast with single crystal materials using conventional casting techniques.

A method of fabricating a three-dimensional semiconductor device is provided along with a three-dimensional semiconductor device fabricated thereby. The method includes forming a heat conductive plug to channel heat away from devices on a substrate, while high temperature processes are performed on a stacked semiconductor layer. The ability to use high temperature processes on the stacked semiconductor layer without adversely effecting devices on the substrate allows the formation of a high quality single-crystalline stacked semiconductor layer. The high quality single-crystalline semiconductor layer can then be used to fabricate improved thin film transistors.

A method and apparatus for non-invasive measurement of living body information comprises a light source configured to generate light containing a specific wavelength component, an irradiation unit configured to irradiate a subject with the light, and at least one acoustic signal detection unit including piezoelectric devices formed of a piezoelectric single crystal containing lead titanate and configured to detect an acoustic signal which is generated due to the energy of the irradiation light absorbed by a specific substance present in or on a subject.

A single crystal having the general composition, Ce2x(Lu1-yYy)2(1-x)SiO5 where x=approximately 0.00001 to approximately 0.05 and y=approximately 0.0001 to approximately 0.9999; preferably where x ranges from approximately 0.0001 to approximately 0.001 and y ranges from approximately 0.3 to approximately 0.8. The crystal is useful as a scintillation detector responsive to gamma ray or similar high energy radiation. The crystal as scintillation detector has wide application for the use in the fields of physics, chemistry, medicine, geology and cosmology because of its enhanced scintillation response to gamma rays, x-rays, cosmic rays and similar high energy particle radiation.