21635 results about "Diode" patented technology

An optical physiological sensor can be integrated into a wearable device and can comprise a substrate having an optical center, a first emitter group of light emitting diodes (LEDs) positioned adjacent to the optical center of the substrate and spaced at an offset from the optical center, a second emitter group of LEDs positioned adjacent to the optical center of the substrate at an offset to the optical center and spaced at an offset from the optical center opposite the first emitter group of LEDs relative to the optical center, and a plurality of detectors arranged in a spatial configuration that surrounds the first and the second emitter group. Each of the plurality of detectors can be positioned on the substrate a same distance away from the optical center of the substrate.

The invention relates to a backside illuminated image sensor, a preparation method thereof and electronic equipment. The backside illuminated image sensor comprises a substrate, a grating, photodiodes and target isolation structures, wherein the photodiodes and the target isolation structures are located on the first surface of the substrate, are alternately arranged in the first direction parallel to the first surface and extend towards the substrate; the substrate internally comprises a plurality of trench isolation structures which extend into the substrate through the first surface and are arranged at intervals in the first direction; the trench isolation structures and the target isolation structures over the trench isolation structures are arranged in a one-to-one manner; the photodiode comprises a SiAs laminated layer and a SiAs cover layer which are arranged along a direction away from the substrate, and a SiP layer which penetrates through the SiAs laminated layer along a first direction and a direction towards the substrate; the target isolation structure comprises a protruding part higher than the top surface of the photodiode; the grating and the protruding parts are prepared in the same process step at the same period. Signal crosstalk of the BSI image sensor and unnecessary damage caused by IMP can be avoided, and photoelectric conversion efficiency can be improved.

Embodiments provided herein generally include apparatus, plasma processing systems and methods for tuning in a radio frequency (RF) plasma processing system for improving substrate processing metrics. Some embodiments are directed to an apparatus for processing a substrate in a plasma processing system. The apparatus generally includes: an impedance for a match circuit configured to perform impedance matching for a plasma load; a diode-based switch coupled to the impedance for the match circuit; at least one signal generator coupled to the diode-based switch and configured to bias the diode-based switch to a first position based on a first impedance generated in the plasma load; and a second position based on a second impedance generated in the plasma load and an RF signal generator configured to provide an RF signal to the plasma load.

The invention relates to the technical field of mine safety, and discloses a coal mine underground gas monitoring method and system. The method comprises the following steps: acquiring methane absorption intensity data by adopting a tunable diode laser absorption spectrum, converting the methane absorption intensity data into gas concentration based on a Lambert-Beer law, performing temperature and humidity compensation, calculating a transmission priority according to concentration deviation to form a data packet, and establishing a spatial interpolation model by utilizing multipoint data to predict gas concentration distribution. Calculating a risk assessment index based on the predicted distribution, automatically adjusting the rotating speed of the ventilator, and controlling the electrical equipment to be powered off. According to the method, the technical problems of low detection precision, incomplete monitoring coverage, low data transmission efficiency and lack of prediction and early warning capabilities in the existing underground coal mine gas monitoring method are solved. And the accuracy of gas concentration detection and the intelligent level of gas monitoring are improved.

The invention discloses a self-isolation type image sensing structure, a sensor and a preparation method, and belongs to the field of semiconductors, the self-isolation type image sensing structure is characterized in that a shallow trench isolation structure is exposed after the back surface of a substrate is thinned, then a first semiconductor layer is extended on the back surface of the substrate, and a first isolation structure is prepared in the first semiconductor layer; sequentially depositing a second semiconductor material layer and a metal grating material layer on the first semiconductor layer; sequentially etching the metal grating material layer and the second semiconductor material layer to form a plurality of metal grating structures distributed at intervals and corresponding self-isolation structures; extending a plurality of photosensitive layers in the photosensitive region groove between the adjacent self-isolation structures to form a photosensitive region; and then activating, preparing a filter layer and the like are carried out to obtain a complete back-illuminated image sensor. The self-isolation photodiode is obtained by changing the structural distribution of the photodiode, unexpectedly, the problem that the substrate is damaged by doping is solved, meanwhile, the crosstalk effect is greatly reduced, and the performance of the image sensor is improved.

The invention discloses an output conversion system and method for a UPS (Uninterrupted Power Supply), and the system comprises a main power input end which is connected with a bridge rectifier through a first electromagnetic relay; the energy storage module comprises a super capacitor group and a parallel lithium battery group, and is coupled with the bus capacitor through a bidirectional DC / DC converter; the input end of the multi-path regulation and control module is connected with the bus voltage sensor, and the output end is connected with the switching execution unit through a second electromagnetic relay group; the dynamic switching unit comprises an I-GBT matrix and a reverse blocking diode array which are respectively connected with the inverter and the bypass circuit in parallel; and the real-time monitoring module is provided with a current harmonic analysis unit and a load break variable detection unit, and the output end of the real-time monitoring module is connected with the ADC port of the central processor. According to the invention, systematic improvement is realized in three dimensions of electric energy quality guarantee, equipment reliability and dynamic response capability through an original multi-path regulation and control architecture and a deep cooperative intelligent control strategy.

A multi-layer display including an upper substrate including light emitting diodes (LEDs) fabricated on a topside of the upper substrate, and LED bonding pads fabricated on a bottomside of the upper substrate. The LED bonding pads being electrically connected to the LEDs through vias extending through the upper substrate. The display also including a lower substrate including LED driver circuits and driver bonding pads fabricated on a topside of the lower substrate. The driver bonding pads being electrically connected to the LED driver circuits, where the LED bonding pads and driver bonding pads are aligned and electrically connected to each other, thereby electrically connecting the LED driver circuits to the LEDs.

A transient voltage surge protection circuit includes a discharge transistor having a drain coupled to a first point of a voltage input bus, and a source coupled to ground; an RC string having a first capacitor and a first resistor coupled in series; a first charge transistor having a drain coupled to the drain of the discharge transistor, a source coupled to the gate of the discharge transistor, and a gate coupled to a mid-point between the first capacitor and the first resistor; a second charge transistor having a drain coupled to the drain of the discharge transistor and a gate coupled to the gate of the first charge transistor; a Zener diode string coupled to a second point of the voltage input bus and coupled to a third and fourth resistors in series. A midpoint between the third and fourth resistors is coupled to the second resistor.

The invention discloses a photovoltaic inverter topology circuit and a control method thereof. The photovoltaic inverter topology circuit comprises a plurality of operational amplifiers, a plurality of MOS tubes, a plurality of resistors, a plurality of connectors, a plurality of capacitors and a plurality of diodes, the in-phase end of an operational amplifier U1 in the operational amplifiers is connected with one end of a resistor R2, the source electrode of an MOS tube Q2, the anti-phase end of the operational amplifier U1 in the operational amplifiers is connected with one end of a resistor R3, the source electrode of an MOS tube Q1, and the output end of the operational amplifier U1 in the operational amplifiers is connected with the other end of the resistor R3; the in-phase end of the operational amplifier U5 is connected with the cathode of the diode D4, the anti-phase end is connected with the in-phase end of the operational amplifier U6, the cathode of the diode D2 and one end of the capacitor C1, and the output end is connected with the anode of the diode D2; the inverting end of the operational amplifier U6 is connected with the output end and one end of the resistor R1; the grid electrode of the MOS tube Q1 is connected with the grid electrode of the MOS tube Q2, and the drain electrode is connected with one end of the resistor R4 The drain electrode of the MOS tube Q2 is connected with the other end of the resistor R1; the anode of the diode D4 is connected with the P1 end of the connector; the other end of the resistor R4 is connected with the P2 end of the connector; the other end of the capacitor C1 and the other end of the resistor R2 are grounded.

An apparatus may include: (a) a processing chamber including chamber walls and a chamber heater; and (b) a pedestal positioned within the chamber interior and including: (i) a substrate heater having a plurality of light emitting diodes (LEDs), (ii) a window positioned above the substrate heater comprising a material transparent to light from the LEDs, (iii) three or more substrate support pads configured to support a substrate such that the window and the substrate are offset by a nonzero distance; and (iv) a temperature sensor comprising a first detector configured to measure thermal radiation emitted by the substrate, and a second detector configured to measure light transmitted through the substrate.

The invention discloses a photovoltaic module, and relates to the technical field of photovoltaic power generation. The photovoltaic module comprises a first end bus bar, a first middle bus bar, a second end bus bar, a first battery string group and a second battery string group, one end of the first jumper bus bar is connected with the first end bus bar, the other end of the first jumper bus bar is connected with the second end bus bar, and the middle of the first jumper bus bar is connected with the first middle bus bar; the first diode is connected with the first jumper bus bar and is positioned between the first end bus bar and the first middle bus bar; the second diode is connected with the first jumper bus bar and is positioned between the second end bus bar and the first middle bus bar; the battery strings of the first battery string group are connected in parallel, the battery strings of the second battery string group are connected in parallel, and the first battery string group and the second battery string group are connected in series. According to the embodiment of the invention, holes are prevented from being formed in the middle area of the backplane in the length direction with relatively large stress based on circuit optimization, so that the backplane is prevented from being broken, and the strength of the photovoltaic module is improved.

Some implementations described herein provide techniques and apparatuses provide a semiconductor device including a photonics device having a backside transmissive region and methods of manufacturing. The semiconductor device includes a first semiconductor device stacked over a second semiconductor device, where the first semiconductor device includes a photodiode structure and the second semiconductor device includes the backside transmissive region. The backside transmissive region, which is below the photodiode structure of the first semiconductor device, includes a trench structure having highly reflective structures and / or properties to maintain an optical power of light waves propagating through the backside transmissive region. An absence of structures within the trench structure lessens a likelihood of interferences which may cause a transmission loss (e.g., a reflection loss, an absorption loss, a scattering loss, and / or a mode mismatch loss) relative to another transmissive region that is adjacent to the photodiode structure.

The invention relates to the technical field of diodes, and particularly discloses a high-temperature superconducting diode structure model which is used for solving the problems that an integrated circuit is high in power consumption and low in speed, and a traditional semiconductor technology is difficult to meet requirements. The semiconductor diode has the problems of power consumption and time delay, the research of the existing superconducting diode mostly focuses on low-temperature superconducting, low working temperature hinders the application and contradicts with the original intention of low power consumption, and the high-temperature superconducting diode which can work in a liquid nitrogen environment is urgently needed, including geometric, material and physical models. The geometric model is provided with a substrate with a superconductive microbridge strip with an asymmetric structure and metal films at two ends, the physical model contains an external magnetic field and current, and electromagnetic transport characteristics are analyzed through simulation modeling; through geometric structure and material selection and physical model setting, electromagnetic transport characteristics are analyzed by using the corrected RCSJ model, the geometric structure of the superconducting micro-bridge strip is optimized, and the problems of power consumption and speed of an integrated circuit are solved.

A device includes a first light-emitting subassembly to emit light at a first correlated color temperature (CCT) comprising a first phosphor and a first light-emitting device positioned to excite the first phosphor. The device also includes a second light-emitting subassembly to emit light at a second CCT comprising a second phosphor and a second light-emitting device positioned to excite the second phosphor. The device also includes a third light-emitting device to emit light at a third CCT. The device may also include a control circuit configured to provide first controlled power to the first light-emitting device, second controlled power to the second light-emitting device, and third controlled power to the third light-emitting device. The device includes one or more inputs to the control circuit to provide power, brightness information, and target color temperature information to the control circuit.

The invention discloses a laser channel atmospheric turbulence fading real-time compensation device and method based on a galvanometer system, and the method comprises the steps: enabling an incident light beam to irradiate a transparent PCB integrated with a photodiode array after the incident light beam is focused through a convex lens, obtaining the light intensity distribution of a current light spot through the photodiode array, and transmitting the light intensity distribution to a signal processing unit; the signal processing unit coarsely adjusts the deviation direction of the light spots according to the received light intensity distribution data, and aligns the part with the strongest light intensity in the light spots to the end face of the optical fiber; and based on the roughly adjusted light spot deviation direction, the signal processing unit dynamically adjusts the deflection angle of the galvanometer by using a gradient descent method according to the power measurement value of the receiving coupling module, so that the fine adjustment of the light spot deviation direction is realized, and the receiving coupling power is maximized. The objective of receiving optical power maximization is achieved, optical design, electronic control and algorithm optimization are combined, and atmospheric turbulence compensation with high cost performance is achieved.

A display device includes a substrate including a display area and a peripheral area adjacent to the display area, a plurality of light-emitting diodes arranged in the display area, a first inorganic encapsulation layer disposed on the plurality of light-emitting diodes, an organic encapsulation layer disposed on the first inorganic encapsulation layer, a plurality of inorganic patterns disposed on the organic encapsulation layer and spaced apart from each other, and a touch electrode disposed on the organic encapsulation layer and defining a plurality of electrode holes respectively overlapping the plurality of light-emitting diodes in a plan view.

The invention discloses a nitride full-color integrated miniature light-emitting diode display chip and a preparation method thereof, a columnar or halfpace-shaped table surface is formed on the surface of a silicon substrate, and then an AlN buffer layer, an AlGaN stress modulation layer, an n-type GaN layer, an InGaN / GaN composite quantum well layer and a p-type conductive layer sequentially extend on the table surface of the silicon substrate to form a miniature light-emitting diode table surface; through stress release of the side wall of the mesa and stress modulation of the AlGaN layer, tensile stress distribution which is gradually reduced from the center of the mesa to the outer ring is formed in the n-type GaN layer, so that indium component distribution in the InGaN / GaN composite quantum well layer is regulated and controlled, and the micro light-emitting diode mesa covering three primary color wavebands of red, green and blue is formed. According to the chip structure disclosed by the invention, the red, green and blue three-primary-color sub-pixels are integrated, and the difficulty of a mass transfer process of the full-color micro light-emitting diode display chip is reduced. According to the invention, the preparation of the red, green and blue three-primary-color sub-pixels can be completed only by implementing an epitaxial process once, and the process flow is simplified.

The invention provides a light emitting diode with improved color purity and a preparation method thereof, and belongs to the technical field of photoelectron manufacturing. The light-emitting diode comprises a first semiconductor layer, a first light-emitting layer, a second light-emitting layer and a second semiconductor layer which are sequentially stacked, the first light-emitting layer is a green light-emitting layer, the second light-emitting layer is a blue light-emitting layer, and the ratio of the light-emitting intensity of the first light-emitting layer to the light-emitting intensity of the second light-emitting layer ranges from 2: 10 to 4.8: 10. According to the embodiment of the invention, the color gamut value of the light-emitting diode can be improved, the color purity of the light-emitting diode can be improved, and the light-emitting effect is improved.

The invention provides a display module, a preparation method thereof and electronic equipment, relates to the technical field of display, and aims to solve the problems of low imaging quality and the like of the display module. The display module comprises a driving substrate, a conductive grid, a transparent conductive layer and a plurality of miniature light-emitting diodes, the driving substrate comprises a plurality of first electrode contacts and a plurality of second electrode contacts, the miniature light-emitting diodes comprise first electrodes and second electrodes, and the miniature light-emitting diodes correspond to the first electrode contacts one to one. The first electrodes of the micro light-emitting diodes are electrically connected with the corresponding first electrode contacts; the conductive grid is electrically connected with the second electrode contact; the transparent conductive layer covers the plurality of micro light emitting diodes and the conductive grid, the second electrodes of the micro light emitting diodes are electrically connected with the conductive grid through the transparent conductive layer, and the resistivity of the material of the conductive grid is smaller than that of the material of the transparent conductive layer.

The invention relates to the technical field of chip packaging, and discloses a diode packaging structure facilitating chip packaging and a photovoltaic junction box.The structure comprises a copper-clad plate, the top of the copper-clad plate is fixedly connected with one or more chip bodies, the right side of the top of the copper-clad plate is fixedly connected with soldering tin, and the left side of the top of the copper-clad plate is provided with a connecting port; four positioning holes are formed in the surface of the copper-clad plate, two rectangular grooves are formed in the surface of the copper-clad plate, and a cable is fixedly connected to the left side of the copper-clad plate. The chip body is packaged through resin pouring, the mold manufacturing cost required by traditional packaging is omitted, the overall production cost is greatly reduced, the resin pouring can be accurately allocated according to the characteristics of the chip and is highly matched with the thermal expansion coefficient of the chip, the packaging stress is greatly reduced, and the packaging efficiency is improved. The conditions of welding spot cracking and internal structure damage caused by stress problems in the packaging process and subsequent use of the chip are effectively avoided, and the damage risk of the chip is reduced.

A light emitting diode (LED) pixel array and method of fabrication thereof. A semiconductor wafer template includes a successively stacked first n-GaN layer, first MQW layer, p-GaN layer, and dielectric layer. A plurality of apertures is formed through the dielectric layer, extending to the p-GaN layer. A plurality of mesas is formed by forming, within each aperture, a second MQW layer and a second n-GaN layer above each second MQW layer. The second n-GaN layer and second MQW layer of each mesa form a respective mesa LED with the p-GaN layer. The first n-GaN layer and first MQW layer form a lower LED with the p-GaN layer.

An image sensor includes a substrate including a pixel region, a through electrode region, and a power supply region between the pixel region and the through electrode region, through electrodes in the through electrode region, shared pixels separated from each other by a first trench isolation structure in the pixel region and each shared pixel including unit pixels, wherein the first trench isolation structure extends in the substrate in a vertical direction, contact barriers arranged between the shared pixels and vertically overlapping the first trench isolation structure, and a protection diode arranged in the power supply region, including a first impurity region where first power is supplied by any one of the through electrodes, and electrically connected to the contact barriers.

The invention relates to a backside illuminated image sensor preparation method and a backside illuminated image sensor, and relates to the technical field of integrated circuits, and the method comprises the steps: providing a substrate, forming a third semiconductor layer covering a first semiconductor layer and a second semiconductor layer, the third semiconductor layer comprising an embedded part penetrating through the second semiconductor layer; forming a plurality of isolation parts penetrating through the third semiconductor layer, wherein the plurality of isolation parts are located right above the plurality of first semiconductor layers; forming a plurality of target semiconductor columns arranged at intervals along the first direction in the third semiconductor layer; target doping ions are injected into the remaining third semiconductor layer, so that the target semiconductor columns, the second semiconductor layer and the third semiconductor layer jointly form a plurality of photodiodes. The electron concentration of the photosensitive area is at least increased, and the photosensitive performance of the BSI image sensor is improved.

A time-of-flight pixel circuit includes a photodiode configured to generate charge in response to modulated light reflected from an object. First and second transfer transistors are coupled to the photodiode. The first transfer transistor transfers a first portion of charge from the photodiode in response to a first modulation signal and the second transfer transistor transfers a second portion of charge from the photodiode in response to a second modulation signal. The second modulation signal is an inverted first modulation signal. A first floating diffusion is coupled to the first transfer transistor to receive the first portion of charge in response to a first modulation signal. Each one of a first plurality of sample and hold transistors is coupled between a respective one of a first plurality of memory nodes and the first transfer transistor.

Data are optically transmitted from a power tool device, such as a power tool, a power tool battery charger, power tool pack adapter, and / or a battery pack. The data are stored in a memory of the power tool device and are encoded as optical signal data to provide an encoded representation of the stored data. An optical transmitter (e.g., a light emitting diode or a flat panel display) transmits the optical signal data, which are detected or otherwise received by an optical receiver device, which may include a camera or other photodetector. The optical signal data may include light signals generated by an LED, where the data are encoded using an encoding scheme that modulates one or more characteristics (e.g., amplitude, wavelength, color) of the generated light signals. The optical signal data may also include images (e.g., barcodes, QR codes) or characters.

An example MR headset is provided. The example MR headset comprises (i) a set of imaging sensors and (ii) a set of floodlight-emitting diodes (flood LEDs), the sets of imaging sensors and flood LEDs disposed along a front-facing portion of the MR headset. The MR headset includes one or more processors configured to, while the MR headset is being caused to present MR content, and in accordance with a determination that imaging data obtained from the set of imaging sensors has an insufficient level of detail to identify hand gestures, cause illumination, using one or more flood LEDs of the set of flood LEDs, of a volume of physical space that includes the hand of the user.

This disclosure relates generally to a composite reconfigurable intelligent surface system for real time beam steering and method thereof. Conventional method for real time beam steering includes bulky systems with several antenna elements and amplifiers to shape and control the beam. The present disclosure provides a composite reconfigurable intelligent surface (CRIS) for real time beam steering. The CRIS is formed from a set of constituent reflecting surfaces which in turn are generated from unit cells. These unit cells are responsible for providing individual phase reflection performance utilizing the installed varactor diode in each unit cell. The CRIS can provide a) multi-beam reflection performance, b) polarization sensitive operation, c) 2D beam steering abilities, d) real-time beam control, e) null point reduction for beam shaping requirements and f) dependable pattern stability over a suitable range of frequencies.

Disclosed is a binarized neural network circuitry using a quasi-nonvolatile memory device. More particularly, the binarized neural network circuitry according to an embodiment of the present disclosure is characterized in that a diode structure is positioned in a channel region between a drain terminal and a source terminal, a gate terminal is positioned on the diode structure, an operation state is determined by occurrence of a latch-up or latch-down phenomenon due to a positive feedback loop in the channel region based on different voltages applied to the drain terminal and the gate terminal, respectively, and a plurality of quasi-nonvolatile memory devices that implement memory characteristics of remembering a memory state are included as holes or electrons in a potential well in the channel region due to the positive feedback loop are accumulated, and the plural quasi-nonvolatile memory devices are a pair of two quasi-nonvolatile memory devices that operate as a single synaptic cell and are connected in parallel to form an array circuit, memory states of the two quasi-nonvolatile memory devices are determined and stored based on an input line applied from an input line processor connected to the array circuit and a weight update signal applied from a synaptic line processor connected to the array circuit, and a MAC (multiply-accumulate) operation result is output using a combination of the memory states.

Provided is a display device including a CMOS wafer and a light emitting diode disposed on a first area of the CMOS wafer. The light emitting diode includes a first electrode member, an emission layer disposed on the first electrode member, and a second electrode member disposed on a semiconductor junction member. The first electrode member includes a metal layer, a reflective layer disposed on the metal layer, and a first transparent conductive layer disposed on the reflective layer.

The invention discloses a low-cost charging pile topology for a fast charging-slow discharging scene of an electric vehicle and a modulation strategy of the low-cost charging pile topology. According to the low-cost charging pile topology, a group of half-bridge type shunt diodes are connected in parallel to each phase of main bridge arm of a traditional T-shaped three-level converter. In the discharging mode, the charging pile is consistent with a traditional T-type three-level operation state, and works in a slow-release scene with rated power and below. In the charging mode, the charging pile continuously shunts the main bridge arm power device by using the additionally arranged shunting diode, so that the current stress and thermal stress of the main bridge arm power device are reduced; and through a self-adaptive modulation strategy of three-level / two-level modulation mode switching, the loss distribution of a power device is optimized, the active power output capability of the charging pile in a charging mode is improved, the fast charging operation of the charging pile with over-rated power is realized, the equipment capacity utilization rate of the charging pile is fully excavated, and the method has remarkable engineering application value.