83 results about "Step recovery diode" patented technology

The invention is a bridge-free power factor correction (PFC) converter able to reduce common code noises and increase power density, comprising: boost inductor coupled to input end; two-way switch connected in series with the boost inductor and having junction node coupled between the boost inductor and two-way switch; second series rectifier circuit, having junction node coupled to the two-way switch; and output capacitor connected in parallel with the second series rectifier circuit; where the second series rectifier circuit is composed of slow recovery diode and the first series rectifier circuit is composed of fast recovery diode. Thus, the invention can reduce common mode noises in the converter and increase the power density of the converter.

The invention relates to the technical field of electrical equipment and in particular relates to an ultrafast edge step pulse generating method and a generator thereof. In the invention, a high-precision clock reference source is used for generating a clock excitation signal exciting a high-speed comparator to generate a pulse signal of a faster edge, and a pulse amplitude adjustment circuit is used for amplifying and pre-shaping the amplitude of the pulse signal of the faster edge; then the pulse signal enters a pulse rising edge accelerating circuit, and the rising edge of the pulse signal after amplitude adjustment is further accelerated by utilizing the step recovery effect of a step recovery diode; meanwhile, the waveform of the output pulse signal is subjected to shaping and amplitude control so as to meet the requirements on the rising time, the amplitude and the overshoot pulse of a characteristic impedance tester; and finally, the pulse signal is output by using a pulse output interface. The output pulse rising time is 150ps, the amplitude is larger than 500mV, the overshoot pulse is smaller than 10 percent, and the prepulse can be ignored. The invention can discover or sense smaller impedance discontinuous distances.

An ultra wide band (UWB) communication system includes a channel filter bank to cover the 3.1 to 10.6 GHz band in channels having approximately equal bandwidth. A transmitter and a receiver may share the filter bank when the communication system is configured as a transceiver. The transmitter produces short duration, wide bandwidth RF pulses by triggering the impulse response of one or more of the filters of the filter bank. The impulse response is triggered by applying a very short duration time domain signal produced using a single pulse mixer and a step recovery diode circuit. The receiver uses a square-law detector to detect RF signals passed by the channel filter bank and the detected signals are further processed to extract a data signal and a confidence level in the data signal.

Circuitry is provided to drive a step recovery diode (SRD) (8) in a sampler based vector network analyzer (VNA) that allows harmonic samplers (10, 11) to operate over many octaves. The circuit includes a digital pulse generator (FIG. 5) for providing a LO signal. The LO signal is provided over an octave frequency range as in previous SRD driver circuits, but pulse forming circuitry is provided to decrease the pulse rate to a sub multiple of the LO generating oscillator signal. The pulse forming circuitry includes a programmable frequency divider (50) to vary the pulse rate. The pulse forming network further includes registers (50, 52) connected to the programmable frequency divider (50) to limit the pulse width resulting in reduced heating of the SRDs. With an effectively wider frequency operation range using the SRD (8), only one downconversion is required in the VNA, eliminating the need for additional mixers (30, 31) and a second LO signal generator (24) to provide a second downconversion.

The invention discloses a technology for manufacturing a fast recovery diode. By means of the technology, the reverse recovery time of a device can be further shortened, and the working speed of a related circuit can be increased; the deep control capacity of the ion injection and the deep control capacity of the laser annealing are integrally applied, the optimal minority-carrier service life shortening effect is achieved through diffusion introduction of minority-carrier recombination centers and the gettering effect of a defect area and a damage area on the minority-carrier recombination centers, technological routes are reasonable, the technological process is easy to control, and the manufactured fast recovery diode has the better performance that the reverse recovery time is further shortened.

The invention discloses a large-amplitude picosecond-level narrow pulse generating circuit, and the circuit comprises a triggering signal, an avalanche transistor Marx cascading pulse generation circuit and a step recovery diode pulse shaping circuit. The avalanche transistor Marx cascading pulse generation circuit receives the triggering signal, and the step recovery diode pulse shaping circuit is connected with the avalanche transistor Marx cascading pulse generation circuit. The avalanche transistor Marx cascading pulse generation circuit enables an energy storage capacitor in an avalanche unit to generate a large-amplitude pulse in a mode of parallel charging and series charging, and then generates a large-amplitude narrow pulse through the step recovery characteristics of a step recovery diode. The front and rear edges are steeper, and the pulse amplitude is within the range from 20V to 30V. The pulse width is lower than 200ps, thereby meeting the demands of pulse drive application of a semiconductor laser.

The invention discloses an ultra-wide band impulsator which comprises a nanosecond level driving positive impulse generating circuit, a speed-sensitive switch circuit, a subnanosecond impulse generating and shaping circuit, a voltage source circuit and a current source circuit. The nanosecond level driving positive impulse generating circuit converts impulse signals with random widths into nanosecond level narrow impulses with relatively fixed widths. The speed-sensitive switch circuit is switched into an on status from an off status under the driving of the narrow impulses, and the static power voltage of the input end of the subnanosecond impulse generating and shaping circuit is made to be reduced to be approach to zero rapidly. No signal is input in the input end of the subnanosecond impulse generating and shaping circuit in a static state, the shaping circuit is in a positive breakover status, and an output end has no signal output. When the speed-sensitive switch circuit is switched into the on status form the off status, the input end of the subnanosecond impulse generating and shaping circuit output currents, and the step recovery diode of the shaping circuit is changed into reversed breakover from positive breakover. After a period of time, the diode is changed into reversed cut-off from the reversed breakover, and the output end output currents. When the output end is connected with a load, the output end generates negative-polarity voltage impulses.

There is provided a pulse generating circuit, which generates two pulses having a sign of amplitude different from each other, including: a step recovery diode of which electric potential of an anode and a cathode is respectively output as the pulses; a bias unit operable to select either a forward bias or a backward bias according to a given control signal and apply the selected bias to the step recovery diode; a forward current source operable to prescribe a forward current to be supplied to the step recovery diode when the forward bias is applied to the step recovery diode; and a backward current source operable to prescribe a backward current to be supplied to the step recovery diode when the backward bias is applied to the step recovery diode.

The invention discloses a system for preventing reverse recovered charges in a DUT. The system is a current injection circuit connected to the two ends of the DUT in a forward bias mode. The injected current circuit comprises a pulse nS-level pulse signal generator formed by an SRD and a pulse edge acceleration circuit formed by a BG2 and a BG1, wherein the pulse edge acceleration circuit is tightly connected with the back of the pulse nS-level pulse signal generator and used for shortening the rising edge time and the falling edge time of pulses. The system has the advantages that the reverse recovered features of the DUT can be improved, the reverse recovered charges can be reduced, and the reverse recovered time can be shortened; meanwhile, switching losses and conduction losses of the DUT can be reduced, electromagnetic interference and surges can be restrained, and efficiency is improved.

The invention discloses a method for preparing a silicon epitaxial wafer for a step recovery diode. According to the preparation method, the problem in the conventional silicon epitaxial wafer process for the step recovery diode that the width of a transition area cannot be controlled is solved. A two-section growth manner is adopted in the epitaxial layer growth process, purging is performed for a period of time by using hydrogen with repeatedly changeable flow, impurities are continuously diluted and discharged out of a reaction chamber of an epitaxial furnace, and the first section of the epitaxial layer grows at a low temperature and a low speed, so that the gas phase self-doping influence is reduced, the structure of the transition area is improved, and then purging is performed for a period of time again by using the hydrogen with the repeatedly changeable flow, the second section of the epitaxial layer rapidly grows at a high temperature, and finally, the target thickness and electrical resistivity are achieved. Due to the optimized epitaxial process, control of substrate impurity self-diffusion factors under a normal pressure is realized, and the width of the transition area is narrowed, so that the width accounts for 13-15% of the thickness percentage of the epitaxial layer, and the use requirement of the step recovery diode is met.

An apparatus for generating a monocycle comprises an input signal source (76) for providing an input signal, and a step recovery diode (SRD) (80) for receiving the input signal and producing an impulse. A shunt inductor (102) is provided to act as a first differentiator and a capacitor (92) connected in series to the output of the step recovery diode acts as a second differentiator. The first and second differentiators are arranged to double differentiate the impulse to produce a monocycle.

A phase detector and method of phase detection. The detector includes a substrate; an impulse generator fabricated on the substrate; and a sampling circuit operationally coupled to the generator and disposed on the substrate. In the best mode, the impulse generator and the sampling circuit are fabricated on the substrate using grounded slotline technology and coplanar waveguide technology. In more specific embodiments, the generator is a slotline impulse generator with a step recovery diode. In this embodiment, the impulse generator further includes a coplanar waveguide to slotline transition at an input port thereof and a slotline to coplanar waveguide at an output port thereof. In addition, in the illustrative embodiment, the sampling circuit further includes a slotline hybrid T junction. In accordance with the present teachings, the junction is an ultra-wideband grounded slotline hybrid T junction. The sampling circuit further includes a phase bridge coupled to the hybrid T junction and a grounded slotline coupled delay. In the specific embodiment, the sampling circuit also includes a broadband transition from coplanar waveguide to coupled slotline.

Circuitry is provided to drive a step recovery diode (SRD) (8) in a sampler based vector network analyzer (VNA) that allows harmonic samplers (10, 11) to operate over many octaves. The circuit includes a digital pulse generator (FIG. 5) for providing a LO signal. The LO signal is provided over an octave frequency range as in previous SRD driver circuits, but pulse forming circuitry is provided to decrease the pulse rate to a sub multiple of the LO generating oscillator signal. The pulse forming circuitry includes a programmable frequency divider (50) to vary the pulse rate. The pulse forming network further includes registers (50, 52) connected to the programmable frequency divider (50) to limit the pulse width resulting in reduced heating of the SRDs. With an effectively wider frequency operation range using the SRD (8), only one downconversion is required in the VNA, eliminating the need for additional mixers (30, 31) and a second LO signal generator (24) to provide a second downconversion.

The invention discloses a second-order differential gaussian pulse generator based on an SRD (Step Recovery Diode), which comprises a clock source, a drive circuit, a differentiating circuit and an SRD gaussian narrow pulse generation circuit, wherein a clock excitation signal generated by the clock source passes through the drive circuit, the differentiating circuit and the SRD gaussian narrow pulse generation circuit which are sequentially connected to form a narrow pulse signal; a second-order differential gaussian pulse shaping circuit is positioned between the SRD gaussian narrow pulse generation circuit and a load; and the narrow pulse signal outputs a subnanosecond-level second-order differential gaussian pulse signal through the second-order differential gaussian pulse shaping circuit. With the adoption of the technical scheme, the second-order differential gaussian pulse generator has the benefits that a direct current component and a low frequency component of a pulse are smaller; a spectrum utilization rate is high; a planar circuit design is adopted; the circuits are simple, small in size and easy to integrate; and the second-order differential gaussian pulse generator is suitable for a short-range ultra-wide band wireless communication system.

The present invention discloses an adjustable pulse width pulse generating circuit for a semiconductor laser. The adjustable pulse width pulse generating circuit comprises trigger signals, an avalanche transistor pulse generating circuit and a step recovery diode shaping circuit; the avalanche transistor pulse generating circuit receives the trigger signals; and the step recovery diode shaping circuit is connected with the avalanche transistor pulse generating circuit. According to the adjustable pulse width pulse generating circuit for the semiconductor laser of the invention, the avalanche characteristic of an avalanche transistor and the step characteristic of a step recovery diode are utilized to generate large-amplitude narrow pulse signals; and the pulse width of the narrow pulse signals can be as low as 165ps and can be adjusted. The adjustable pulse width pulse generating circuit for the semiconductor laser can be conveniently applied to the driving of the semiconductor laser.

An ultra-wideband (UWB) dual impulse transmitter is made up of a trigger edge selection circuit actuated by a single trigger input pulse; a first step recovery diode (SRD) based pulser connected to the trigger edge selection circuit to generate a first impulse output; and a second step recovery diode (SRD) based pulser connected to the trigger edge selection circuit in parallel to the first pulser to generate a second impulse output having a selected delay from the first impulse output.

The invention relates to a coaxial channel lightning protection device circuit, which comprises a gas discharge tube I, a transient voltage suppressor diode (also called TVS diode) II, a coupling resistor R and a fast recovery diode D; the gas discharge tube I is connected with the transient voltage suppressor diode II through the coupling resistor R. Compared with the prior art, the circuit provided by the invention has the advantages of large through-flow capacity (5KA), fast response speed (nano-second level), small volume, convenience in installation and the like; as a multi-level protection circuit is adopted, the residual voltage is low; and moreover, the circuit is suitable for overvoltage protection of related devices which transmit videos and data signals through a coaxial cable, and can protect the device from being damaged by sensing the overvoltage and operating the overvoltage.

The invention provides a drift step recovery diode used as a switch in a nanosecond pulse source device and a preparation method thereof. A matrix is an N-type substrate (1), and a phosphorus-doped N+ region (1-1), an aluminum-doped P region (1-3) and a boron-doped P+ region (1-4) are arranged in the N-type substrate (1) through doping, wherein the N+ region (1-1) and the P+ region (1-4) are positioned on the two sides of the N-type substrate (1); the P+ region (1-4) is adjacent to the P region (1-3); and the P region (1-3) is separated from the N+ region (1-1) through an N region (1-2). The drift step recovery diode is characterized in that the total junction depth of the P+ region (1-4) and the P region (1-3) is 100-130 mu m. By changing the internal structure of a drift step recovery diode (DSRD) device, the problems such as large pulse front edge, small voltage pulse on load and large prepulse energy consumption on the DSRD device are solved so as to improve the cut-off velocity of DSRD switches.

The invention discloses a fast recovery diode with a Schottky contact terminal, belonging to the technical field of power semiconductor devices. According to the fast recovery diode with the Schottky contact terminal, equipotential ring contact metal is changed into Schottky contact metal on the basis of the conventional fast recovery diode, so that the injection efficiency at a transition region is reduced, the carrier distribution of the terminal part is optimized, the turn-off loss is reduced and the reliability in a reverse recovery process is improved. The fast recovery diode is suitable for the field of semiconductor power devices and power integrated circuits from small power to high power.

The invention discloses a passive lossless buffering circuit of a power factor correction circuit. The passive lossless buffering circuit comprises boost inductors, auxiliary coupling inductors, a main power switch, a buffering capacitor and fast recovery diodes, wherein a main boost inductor and a secondary boost inductor are connected; the secondary boost inductor is connected with a first auxiliary coupling inductor and one end of a second auxiliary coupling inductor; the other end of the second auxiliary coupling inductor, a first diode anode, a third diode anode and the main power switch are connected; the other end of the first auxiliary coupling inductor, a second diode anode and one end of the buffering capacitor are connected; the other end of the buffering capacitor and a third diode cathode are connected; the connection point of the buffering capacitor and the third diode is connected with a fourth diode anode; and the cathodes of the first diode, the second diode and the fourth diode are electrically connected. With the adoption of the passive lossless buffering circuit of the power factor correction circuit, the reverse recovery problem of the diode can be effectively controlled, the switching loss is reduced, the reverse recovery energy can be stored by the buffering capacitor and the energy is transmitted to a load, so that the conversion efficiency is improved, and at the same time, the electromagnetic interference of electric equipment is effectively reduced.

A new type of freewheeling circuit for electronically controlled fuel injectors of diesel engines, with a low-side drive MOS tube, the source of the low-side drive MOS tube is grounded, the drain is connected to one end of the injector, and the other end of the injector passes through a freewheeling diode Connect the source of the high-side driving MOS tube, the end of the injector is also grounded through an ultra-fast recovery diode, the drain of the high-side driving MOS tube is connected to the VCC power supply, and the drain of the low-side driving MOS tube is also passed through a freewheeling The diode is connected to the VCC power supply. Both ends of the injector are connected to ground through a capacitor. The self-induction electromotive force of the fuel injector of the present invention will not cause negative overshoot at the high end to damage the driving chip of the high-side MOS tube, and at the same time, the self-induction electromotive force will not produce positive overshoot exceeding VCC to destroy the low-side MOS tube. However, the conversion characteristics of the freewheeling circuit will not be affected by the above two diodes, and the safety of the freewheeling circuit can also be improved. Therefore, the control precision of the present invention also meets ideal requirements while ensuring safety and reliability.

A circuitry for generating a narrow impulse including an input device coupled to a matching circuitry that is coupled to a step recovery diode (SRD). The input device is configured to receive a succession of digital input signals, each characterized by having high level and low level portions. The signals having less than 50% duty cycle. The input device is configured to drive forward the SRD through the matching circuitry during the high level portion of the digital signal, whereby the SRD stores sufficient power for generating the narrow impulse following the falling edge of the high level portion of the digital input signal.

The invention discloses a cascade bilateral soft switch DC / DC circuit topology. The cascade bilateral soft switch DC / DC circuit topology comprises a preceding stage boosted circuit, an auxiliary circuit, a post-stage push pull transformer and a full-bridge circuit, which are connected in series in sequence, wherein the auxiliary circuit comprises a resonant inductor Lr, a resonant capacitor Cr2, an auxiliary switch VT2 containing an anti-parallel body diode VD2, fast recovery diodes VD9 and VD10, and a relay K; one end of the resonant inductor Lr is connected with the negative electrode of the fast recovery diode VD9; the other end of the resonant inductor Lr is respectively connected with the positive electrode of the fast recovery diode VD10 and the drain electrode of the auxiliary switch VT2; the source electrode of the auxiliary switch VT2 is connected with the anode of the fast recovery diode VD10; the negative electrode of the fast recovery diode VD10 is connected with one end of the relay K; the other end of the relay K is respectively connected with the negative electrode of the resonant capacitor Cr2 and the anode of the fast recovery diode VD9. The cascade bilateral soft switch DC / DC circuit topology is simple and reliable in control, simple in circuit structures, easy to realize, low in device cost, low in switch loss, low in voltage stress of the switch, high in conversion efficiency and low in circuit conduction loss.

The present invention is an indirect analog synthesizer utilizing a direct analog fractional frequency multiplier approach. A fractional frequency multiplier produces a source that is injected into an offset loop of an indirect analog synthesizer. The fractional frequency multiplier utilizes a source and a combination of multipliers, dividers, and switches to generate and select among different frequencies. This direct analog approach eliminates step recovery diodes and sample loops from the frequency synthesizer. Switching speed of the direct analog portion is less than 100 nanoseconds. This increase in switching speed of the direct analog portion greatly improves the overall switching speed of the overall frequency synthesizer. Also, the fractional frequency multiplier has phase noise 20 dB better than a sampling loop. Better phase noise of the signal feeding the offset loop pushes optimum loop bandwidth of the offset loop higher, which also improves switching speed.

A rectifier circuit includes an inductor connected to AC inputs of a diode bridge circuit, a capacitor series circuit connected to a DC output, and bi-directional switches that are connected between the series connection point of the capacitors and the AC inputs of the diode bridge circuit. In order to reduce the loss that would occur if both bi-directional switches were driven at high frequency, one of the bi-directional switches is driven at the frequency of the AC input voltage and the other bi-directional switch is driven at a high frequency, and also general rectifying diodes are used as the diodes connected to the bi-directional switch that is driven at the frequency of the AC input voltage and fast recovery diodes are used as the diodes connected to the bi-directional switch that is driven at high frequency.

The invention provides a rapid leading edge step pulse generator at least comprising one pulse signal generating circuit. The pulse signal generating circuit comprises a charging and discharging circuit, an avalanche transistor drive pulse forming circuit, a step recovery diode pulse forming circuit and a coupling circuit, wherein the charging and discharging circuit comprises a third charging and discharging capacitor C3, the avalanche transistor drive pulse forming circuit comprises an avalanche transistor Q2, the step recovery diode pulse forming circuit comprises a first step recovery diode D1, and the coupling circuit comprises a fifth coupling capacitor C5 and a sixth coupling capacitor C6. The rapid opening and closing features of a radio frequency transistor, the avalanche effect of the avalanche transistor, the step features of the step recovery diode and the like are utilized by the rapid leading edge step pulse generator for generating wide rapid leading edge step pulse signals, the leading edge is steep, the lagging edge is relatively slow, the lagging edge almost has no high-frequency overshoot, when the generator is connected with a transmitting antenna, high-frequency ringing cannot be introduced, and the shallow detection capability of the system is easily improved.

The invention discloses a repetition frequency nanosecond pulse generation circuit based on a drift step recovery diode. The output end of a charging loop is connected with the input end of a primarypulse forming loop; the output end of the primary pulse forming loop is connected with a primary winding of a saturable pulse transformer; one end of a secondary winding in the saturable pulse transformer is connected with one end of a secondary energy storage capacitor; the other end of the secondary energy storage capacitor is connected with the positive electrode of a DSRD switch assembly and one end of a resistive load; and the other end of the secondary winding in the saturable pulse transformer, the negative electrode of the DSRD switch assembly and the other end of the resistive load are all grounded. The circuit can effectively solve the problems of high amplitude output and high repetition frequency work of a DSRD-based pulse generation circuit in the prior art.

The invention discloses a digital-feed ultra-wideband antenna, belongs to the field of digital wireless communication and relates to non-modulation digital signal sending antennas. The digital-feed ultra-wideband antenna comprises a digital signal input port (1), a digitally-driven SRD (step recovery diode) narrow pulse signal generator (2) and a bow-tie slot radiating unit (3) which are in coplanar waveguide series connection, wherein the digital signal input port (1) is an SMA (sub-miniature-A) connector for feed-in of digital signals; the digitally-driven SRD narrow pulse signal generator (2) comprises a coupling circuit, a resonance matching circuit, a pulse forming circuit and a pulse shaping circuit; and the bow-tie slot radiating unit is used for radiating pulse signals. The digital-signal-driven pulse generator is used for generating pulse, and the pulse is radiated by the ultra-wideband bow-tie antenna, so that direct sending and wireless transmission of the digital signals can be achieved without pre-modulating the digital signals, and a sender structure of a digital wireless communication system can be greatly simplified. Additionally, digital information is transmitted by the ultra-wideband pulse, so that information transmission rate is increased beneficially, and channel interference is reduced.

An apparatus for generating a monocycle comprises an input signal source (76) for providing an input signal, and a step recovery diode (SRD) (80) for receiving the input signal and producing an impulse. A shunt inductor (102) is provided to act as a first differentiator and a capacitor (92) connected in series to the output of the step recovery diode acts as a second differentiator. The first and second differentiators are arranged to double differentiate the impulse to produce a monocycle.