84results about "Electric pulse generator circuits" patented technology

The invention relates to a square wave generation method and system based on a DDS signal transmitter, and belongs to the technical field of digital electronic signal synthesis. The method comprises the following steps: calculating a digital analog signal sampling frequency based on a square wave output frequency set by a user, and obtaining a digital fundamental frequency phase signal according to a phase-locked loop precision range; mapping the digital fundamental frequency phase signal into a sinusoidal amplitude signal according to a digital phase accumulation mechanism to obtain a digital-analog conversion clock, binarizing the sinusoidal amplitude signal, and outputting a square wave output period; dividing a square wave output period into a low level region and a high level region according to the precision range of the phase-locked loop, reading a square wave output frequency set by a user through a random storage address, and outputting a non-offset phase-locked square wave; and constructing an error accumulation self-checking architecture to calculate a frequency control word, and when detecting that the frequency control word has a decimal discarding error, recalculating the frequency control word.

A clock integrated circuit (100) is provided. The clock integrated circuit includes: a first clock generator (110) which includes a crystal oscillator (XTAL) configured to generate a first clock signal (fxo); and a second clock generator (120) which includes a resistance-capacitance (RC) oscillator (121) and a first frequency divider (122), and is configured to: generate a second clock signal (fRTC)using the first frequency divider (122) based on a clock signal (fRCO) output from the RC oscillator (121); perform a first calibration operation for adjusting a frequency division ratio of the first frequency divider (122) to a first frequency division ratio based on the first clock signal (fxo) ; and perform a second calibration operation for adjusting the first frequency division ratio to a second frequency division ratio based on a sensed temperature.

The utility model discloses an ultra-high-speed picosecond pulse rising edge generator, which relates to the technical field of power electronics and comprises an oscillating circuit, a multivibrator circuit and a trigger, and the oscillating circuit is electrically connected with the trigger through the multivibrator circuit. The oscillating circuit comprises a first integrated circuit, a first resistor and a first capacitor, the model of the first integrated circuit is NE555, the sixth end of the first integrated circuit is electrically connected with the third end of the first integrated circuit through the first resistor, and the sixth end of the first integrated circuit is grounded through the first capacitor; a third end of the first integrated circuit is electrically connected with an input end of the multivibrator circuit, in the ultra-high-speed picosecond pulse rising edge generator, a high-frequency oscillation circuit is output through the oscillation circuit, frequency division oscillation output is carried out through the multivibrator circuit, and therefore picosecond-level oscillation output is achieved, and finally a pulse signal is output through the trigger. The whole circuit is simple in structure, high in practicability and high in cost performance.

The utility model relates to a pulse signal generating device. The circuit comprises an ECL to TTL circuit module which is used for receiving a first clock signal input from the outside and converting the first clock signal of an ECL level into a second clock signal of a TTL level; the first driving module is used for generating a second selection control signal; the input end of the FPGA module is connected with the output end of the ECL-TTL conversion circuit module and the output end of the first driving module, and the FPGA module generates a timing pulse signal based on a second selection control signal and a second clock signal; the second driving module is connected with the output end of the FPGA and is used for performing driving processing on the timing pulse signal; the single-ended to differential module is connected with the output end of the second driving module and is used for converting the timing pulse signal subjected to driving processing into a differential signal and outputting the differential signal; and the power supply conversion module is used for converting an external input power supply into a preset voltage and providing a required working power supply for the FPGA module. And the pulse signal of the radar system can be generated more efficiently and conveniently.

The application relates to a fast edge generating device and an implementation method thereof, and the device comprises a signal generator, a fast edge generator module and an amplifier module; the signal generator is used for generating a nanosecond-level square wave or pulse signal; an input end of the fast edge generator module is connected with the signal generator, is used for receiving the nanosecond-level square wave or pulse signal sent by the signal generator, and converts the nanosecond-level square wave or pulse signal into a lower edge signal; the lower edge signal is sent to the amplifier module; an input end of the amplifier module is connected with the fast edge generator module, is used for receiving the edge signal sent by the fast edge generator module, and amplifies the edge signal to a target high-voltage specification and then outputs. An input signal with extremely fast edge characteristics is generated by an external high-performance signal source, a general signal source is used to generate a signal, and the economy, flexibility and expandability of the system are significantly improved.

An example programmable digital oscillator includes digital oscillation circuitry and a digital-to-analog converter (DAC). The digital oscillation circuitry includes exactly one digital multiplier, exactly one digital adder, and exactly two registers. The digital oscillation circuitry is configured to provide digital oscillation signals at one or more frequencies as a function of a programmable code, where the programmable code is provided as input to the exactly one digital multiplier. The DAC is communicatively coupled to the digital oscillation circuitry and is configured to convert the digital oscillation signals from the digital oscillation circuitry into analog oscillation signals.

A system includes a base PSU having a voltage output, an extender PSU having a voltage output coupled in series with the voltage output of the base PSU, and a pulse switch circuit. The pulse switch circuit includes a voltage input coupled with the voltage output of the base PSU and with the voltage output of the extender PSU, a voltage output, a base switch assembly coupled in series between the voltage output of the base PSU and the voltage output of the pulse switch circuit, an extender switch assembly coupled in series between the voltage output of the extender PSU and the voltage output of the pulse switch circuit, and a clamp circuit. A controller is configured to control the base switch assembly, the extender switch assembly, and the clamp circuit based on an input received from a load sensor coupled to a load.

This application provides a signal generation method, an electronic device, a receiver, and a computer-readable storage medium, relating to the field of data processing technology, capable of outputting PPS signals with a relatively long duration. The method is applied to an electronic device, which includes a target instruction transmitting device, an AND gate circuit, a signal generation device, and an event mask register. The target instruction transmitting device is connected to the signal generation device via the AND gate circuit, and the event mask register is also connected to the signal generation device via the AND gate circuit. The method includes: configuring the event mask register to a low level during a first time period; configuring the event mask register to a high level during a second time period; the first time period and the second time period are adjacent, the second duration is longer than the first duration, the second duration is the sum of a third duration and a fourth duration, the third duration is the duration of the first time period, the fourth duration is the duration of the second time period, and the fourth duration is shorter than the first duration.

The utility model discloses an electric pulse output circuit and a massage device. Wherein the electric pulse output circuit comprises a voltage access circuit, a high voltage generation circuit and a plurality of massage electrode circuits; the voltage access circuit is connected with an external voltage source so as to obtain power supply voltage from the external voltage source, the voltage access circuit is further connected with the high voltage generation circuit, and the high voltage generation circuit obtains the power supply voltage from the external voltage source through the voltage access circuit; the high-voltage generation circuit is connected with each massage electrode circuit and is used for boosting the power supply voltage to obtain boosted voltage and sending the boosted voltage to each massage electrode circuit; a switch circuit of the massage electrode circuit is periodically in a switch-on state or a switch-off state, when the switch circuit is switched on, the massage electrode circuit outputs boost voltage, and when the switch circuit is switched off, the massage electrode circuit stops outputting the boost voltage. According to the technical scheme disclosed by the utility model, the massage effect of the electric pulse can be improved.

Embodiments of this disclosure provide an apparatus and method for generating a circuit clock signal. The apparatus includes: a clock buffer configured to buffer an original clock signal to obtain a buffered clock signal; a clock delay unit configured to delay the original clock signal to obtain a plurality of delayed clock signals, the plurality of delayed clock signals being delayed by different amounts of time relative to the original clock signal; a broadened clock generator configured to generate a broadened clock signal based on the original clock signal and the plurality of delayed clock signals, the frequency of the broadened clock signal being lower than the frequency of the original clock signal; and a clock selector configured to select one of the buffered clock signal and the broadened clock signal as the circuit clock signal based on the selection signal.

Provided are a data transmission circuit system and a data reception circuit system, which use an edge of a pulse signal. The data transmission circuit system modulates a digital signal by using time levels determined based on time differences between rising edges and falling edges of a clock pulse signal, and rising edges and falling edges of a data pulse signal. The data reception circuit system demodulates a digital signal by using time levels determined based on time differences between rising edges and falling edges of a recovered clock pulse signal, and rising edges and falling edges of a data pulse signal.

The utility model provides a waveform generator, which comprises a microprocessor, a pulse width modulation (PWM) conversion circuit, a first waveform oscillation circuit, a second waveform oscillation circuit, an energy storage capacitor and a constant current power supply, the output end of the PWM conversion circuit is electrically connected with the input end of the first waveform oscillation circuit and the input end of the second waveform oscillation circuit, and the first waveform oscillation circuit and the second waveform oscillation circuit each comprise a high-speed semiconductor switch. The waveform generator provided by the utility model can generate multi-frequency-point damped oscillation waveforms, a high-speed semiconductor switch is adopted in the waveform oscillation circuit, the waveform rise time is short, the repetition frequency is high, and the accuracy, reliability and strict degree of test are improved; the device is simple in structure, stable in output characteristic and wide in output voltage range, can meet different test requirements, and can accurately evaluate the immunity performance of the automobile electronic equipment in a complex electromagnetic environment.

The invention discloses a trigger pulse circuit and system, and relates to the field of measurement, and a time-delay controllable trigger circuit arranged in the trigger pulse circuit can convert a received CMOS level trigger signal into a CMOS level trigger pulse signal which can be recognized by a neutron generator high-voltage circuit when a first preset time after power-on is reached. And the neutron generator high-voltage circuit generates a neutron targeting pulse signal after receiving the CMOS level trigger pulse signal and transmits the neutron targeting pulse signal to the neutron tube, so that the neutron targeting operation can be carried out only when the storage type logging instrument is electrified for a first preset time. Neutron targeting caused by abnormal work of the storage type PNN logging instrument on the ground can be prevented, personal injury is completely eradicated, and the safety of the scheme is improved.

The application relates to the technical field of pulse generators, in particular to a position pulse generation device, system and method based on an absolute encoder. The device is arranged on a rotary table carrying an optoelectronic device and comprises an absolute encoder and a circuit board. The circuit board comprises an encoder receiving circuit, an FPGA chip, a differential pulse sending chip, a serial port transceiver circuit, an FPGA configuration circuit and a power supply circuit. The FPGA chip is used for receiving an angle signal sent by the encoder receiving circuit in real time. When the current angle reaches a nearby interval, the angle of the rotary table is predicted based on the current angle, a fixed angle required by the optoelectronic device and the rotating speed of the rotary table, and a first pulse signal is emitted to the differential pulse sending chip when the rotary table is predicted to reach the fixed angle, so that the differential pulse sending chip emits a target pulse signal. The scheme can realize the function of predicting the fixed angle, thereby realizing the function of repeatedly emitting the pulse signal at the fixed position with high precision.

The utility model relates to a signal source circuit and a conducted emission signal source, and the signal source circuit comprises an oscillation circuit which is used for generating an oscillation signal with a set frequency; the signal processing circuit is used for at least amplifying the signal amplitude of the oscillation signal to obtain a comb-shaped signal; the signal processing circuit comprises a first type of phase inverter and a second type of phase inverter, the input end of the first-class inverter is connected with the output end of the oscillating circuit, and the input end of the second-class inverter is connected with the output end of the first-class inverter. Oscillation signals are subjected to primary amplification through the first-class inverter, and the oscillation signals are subjected to secondary amplification through the second-class amplifier, so that signal amplitude amplification is realized, and meanwhile, the circuit structure is simplified. Moreover, the input end of the second type of inverter is connected with the output end of the first type of inverter, so that the oscillation signal returns to an initial state after two times of phase inversion, and the signal can maintain a stable oscillation state.

The utility model provides a pulse generating unit which comprises a support and at least one pair of pulse generators installed on the support. The pair of pulse generators comprises two pulse generators, each pulse generator comprises a circuit board and a magnetic ring assembly, the two circuit boards are provided with first side faces which are oppositely arranged, each first side face is provided with a first area and a second area which are adjacent to each other, and each first area is provided with a second area; the first area is used for arranging a charging circuit for supplying power to the magnetic ring assembly, and the second area is used for arranging an mos tube, a discharging circuit and a control circuit; the first areas and the second areas of the two first side faces are arranged in a staggered mode, one magnetic ring assembly is located between one first area and one second area, and the other magnetic ring assembly is located between the other first area and the other second area.

The invention relates to the technical field of signal processing, and provides a multi-channel pulse low and medium frequency signal generation system, which comprises a signal generation unit used for generating a multi-channel pulse signal, a low frequency signal and a carrier signal; the multi-channel pulse signal modulation unit is used for modulating the multi-channel pulse signal to generate a multi-channel modulation pulse signal; the power control unit is used for performing power control on the low-frequency signal and the multi-channel modulation pulse signal to generate a target low-frequency signal and a multi-channel target pulse signal; and the low and medium frequency signal modulation unit is used for synthesizing the target low frequency signal, the multi-channel target pulse signal and a carrier signal to generate a multi-channel pulse low and medium frequency signal. According to the system, through multi-channel pulse signal modulation and power control, multi-channel pulse low and medium frequency signals are accurately generated, and the flexibility and adaptability of the signals are enhanced.

To provide a signal generator for generating a plurality of timing signals required by a quantum computing system.SOLUTION: A signal generator 1 is provided, comprising a timer configured to execute a predetermined session N times upon detection of a pulse of a first trigger signal and output a signal generation start signal having one or more pulses in each said session, a channel signal generation unit 200 configured to generate a timing signal having one or more pulses upon detection of a pulse of the signal generation start signal.SELECTED DRAWING: Figure 1

It is possible to realize an oscillator having a small area, power saving, and a wide frequency variable range.SOLUTION: A first circuit including an inverter unit including an inverter first terminal coupled to a first coupling point and an inverter second terminal coupled to a signal output unit via a second coupling point, an input terminal coupled to the second coupling point, and an output terminal coupled to the first coupling point; The first circuit includes a variable resistance unit having a voltage input terminal for determining a resistance value, and a fixed resistance unit not having a voltage input terminal for determining a resistance value, and the variable resistance unit and the fixed resistance unit are connected in series between the input terminal and the output terminal.SELECTED DRAWING: Figure 1

The invention provides a resonator device capable of realizing miniaturization. The resonator device includes: a support substrate; a vibration element disposed on the support substrate; a circuit element having an oscillation circuit for oscillating the vibration element and a timing circuit for generating time data; and a package that accommodates the support substrate, the vibration element, and the circuit element, and in which the circuit element overlaps the support substrate and the vibration element in a plan view of the support substrate. Furthermore, the oscillation circuit oscillates the oscillation element to generate a clock signal, and the timing circuit performs timing according to the clock signal to generate the time data, thereby configuring a real-time clock.

The utility model provides a high-precision-based intervisibility weapon deduction system, relates to the technical field of weapon deduction, and provides a more real signal generation and processing scheme, which comprises a waveform simulation module, a data acquisition card, a signal simulation module, an upper computer and other components. Through the combination of a waveform generator in the waveform simulation module and multiple groups of filters, the system can generate high-quality square wave signals, and the phase is adjusted through a phase shifter to ensure that the phases of fundamental waves and harmonic waves are consistent, so that the precision of the signals is improved. In addition, the design of the adjustable attenuator allows the amplitude and power of the analog waveform to be flexibly adjusted, and the adaptability of the signal in different analog scenes is ensured.

To provide electronic circuitry and a power converter, capable of suppressing degradation in performance due to transmission of a signal through electromagnetic field coupling.SOLUTION: Electronic circuitry according to the present embodiment includes: a clock generation circuit configured to generate a first clock signal; a first conversion circuit configured to convert an input signal into a first signal having a frequency corresponding to the first clock signal on the basis of the first clock signal; a first electromagnetic field coupler configured to transmit the first signal by electromagnetic field coupling; a second electromagnetic field coupler configured to transmit the first clock signal by the electromagnetic field coupling; and a second conversion circuit configured to convert the first signal transmitted by the first electromagnetic field coupler into a second signal having a frequency corresponding to the input signal, on the basis of the first clock signal transmitted by the second electromagnetic field coupler.SELECTED DRAWING: Figure 1

Method for generating a pulse (7, 9; 207, 209; 307, 309; 407, 409), wherein a predetermined first boundary curve (3) and a predetermined second boundary curve (5) are defined for a pulse shape of the pulse (7, 9; 207, 209; 307, 309; 407, 409), wherein the boundary curves (3, 5) describe the time course of a current quantity (I), and wherein the second boundary curve (5) lies completely within the first boundary curve (3), characterized in that a curve inscribed between the boundary curves (3, 5) is generated as the pulse shape for the pulse (7, 9; 207, 209; 307, 309; 407, 409) by means of a current sink (37), which – compared to a rectangular pulse inscribed between the boundary curves (3, 5) – is located in a first region of the current quantity that is away from an extremum. (I) is deformed towards the first limit curve (3), and in a second region of the current quantity (I) facing the extremum is deformed towards the second limit curve (5).

Optoelectronic device with at least two optoelectronic circuits (2, 4a, 4b) for transmitting an optical clock signal to an electronic component (40-47, 74a, 74b), a control device (78a, 78b) for controlling the propagation times of the optoelectronic circuits and at least two electronic components (40-47, 74a, 74b), each of the at least two optoelectronic circuits (2, 4a, 4b) with: - a clock generation device (25) for generating the optical clock signal, - a converter element (30-37, 73a, 73b) for converting the optical clock signal into an electrical clock signal supplied to the electronic component (40-47, 74a, 74b), and - an optical line (60, 72a, 72b) from the clock generation device (25) to the converter element (30-37, 73a, 73b), wherein the optoelectronic circuit (2, 4a, 4b) has an adjustable optical element (60, 72a, 72b) for setting a propagation delay between the clock generating device (25) and the electronic component (40-47, 74a, 74b), where the optical line (60, 72a, 72b) is the adjustable optical element (60, 72a, 72b), wherein the transit time is adjustable by changing an optical length of the optical line (60, 72a, 72b), wherein the optical line (60, 72a, 72b) has a plurality of heating elements (61, 79a, 79b) for heating the optical line (60, 72a, 72b), wherein the optical length of the optical line (60, 72a, 72b) is adjustable for setting the transit time by heating the optical line (60, 72a, 72b), and wherein the control device (78a, 78b) is configured to individually control the individual heating elements (61, 79a, 79b) to generate a temperature gradient in order to compensate for a temperature gradient (62) within the optoelectronic device by means of this temperature gradient generated as a counter-gradient.

An electrical power pulse generator system and a method of the system's operation are described herein. A main energy storage capacitor supplies a negative DC power and a kick energy storage capacitor supplies a positive DC power. A main pulse power transistor is interposed between the main energy storage capacitor and an output pulse rail and includes a main power transmission control input for controlling power transmission from the main energy storage capacitor to the output pulse rail. A positive kick pulse power transistor is interposed between the kick energy storage capacitor and the output pulse rail and includes a kick power transmission control input for controlling power transmission from the kick energy storage capacitor to the output pulse rail. A positive kick pulse power transistor control line is connected to the kick power transmission control input of the positive kick pulse transistor.

The invention provides a non-glue three-cone secondary coil structure, an assembling method of the non-glue three-cone secondary coil structure and a pulse forming line assembly. When a secondary coil adopts a multi-conical-section turn-back structure, the technical problems that the structural fixation among a plurality of conical sections and the installation process of the coil are complicated, and a paper conical-section base cylinder is poor in insulativity in a low-temperature environment are solved; the axial length is shortened by using the three-cone secondary coil, the base cylinder material is not easy to absorb moisture, and low-temperature insulation is prevented from being affected by moisture; according to the specific structural design, operation convenience in the winding and assembling process is considered, and limiting and fixing of the coil structure in all directions and the vibration resistance of the structure are considered; and the problem that insulation is affected by adhesive layer bubbles introduced by adhesive coils can be avoided.

The utility model discloses a kind of pulse charging circuit, pulse charging equipment, the pulse charging circuit includes full-bridge rectifier circuit, full-bridge resonant converter and main controller, and the full-bridge rectifier circuit is connected with load;The full-bridge resonant converter is connected with the full-bridge rectifier circuit, and the full-bridge resonant converter has full-bridge converter;The main controller is connected with the full-bridge resonant converter, and the main controller is configured to adjust the switching frequency and switching duty ratio of the full-bridge converter to switch the working state of full-bridge converter.Pulse charging circuit can effectively take into account pulse capacitor charging speed and charging accuracy, topology structure is simple, control logic is also simple, more with application prospect.

The invention discloses an ultrasonic driving device and ultrasonic treatment equipment. The ultrasonic driving device comprises a driving control module and a power detection module, the power detection module is electrically connected with the driving control module; the driving control module is used for acquiring control information and outputting an ultrasonic driving signal according to the control information, and the ultrasonic driving signal is used for driving ultrasonic equipment to work; the power detection module is used for acquiring a voltage detection signal and a current detection signal, generating a power detection signal according to the voltage detection signal and the current detection signal, and outputting the power detection signal to the driving control module; the voltage detection signal is a signal obtained by performing voltage sampling on the ultrasonic driving signal, and the current detection signal is a signal obtained by performing current sampling on the ultrasonic driving signal; and the driving control module is also used for adjusting the amplitude of the ultrasonic driving signal according to the power detection signal, so that the output power of the ultrasonic equipment is relatively consistent when the ultrasonic equipment is used by different patients, and the treatment effect of treating different patients can be improved.